- Timestamp:
- Jun 17, 2011 12:50:25 PM (13 years ago)
- File:
-
- 1 edited
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- Unmodified
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trunk/src/VBox/Devices/PC/DevHPET.cpp
r37536 r37537 40 40 * - level-triggered mode not implemented 41 41 */ 42 /* 43 * Base address for MMIO 44 */ 42 43 /** Base address for MMIO. */ 45 44 #define HPET_BASE 0xfed00000 46 45 47 /* 48 * Number of available timers, cannot be changed without 49 * breaking saved states. 50 */ 51 #define HPET_NUM_TIMERS 3 46 /** The number of timers for PIIX4 / PIIX3. */ 47 #define HPET_NUM_TIMERS_PIIX 3 48 /** The number of timers for ICH9. */ 52 49 #define HPET_NUM_TIMERS_ICH9 4 53 50 … … 226 223 227 224 /** Timer structures. */ 228 HpetTimer aTimers[ HPET_NUM_TIMERS];225 HpetTimer aTimers[RT_MAX(HPET_NUM_TIMERS_PIIX, HPET_NUM_TIMERS_ICH9)]; 229 226 230 227 /** Offset realtive to the virtual sync clock. */ … … 1331 1328 uint32_t u32Caps = (1 << 15) /* LEG_RT_CAP - LegacyReplacementRoute capable. */ 1332 1329 | (1 << 13) /* COUNTER_SIZE_CAP - Main counter is 64-bit capable. */ 1333 | (HPET_NUM_TIMERS << 8) /* NUM_TIM_CAP - Number of timers -1. 1334 Actually ICH9 has 4 timers, but to avoid breaking 1335 saved state we'll stick with 3 so far. */ /** @todo fix this ICH9 timer count bug. */ 1336 /** @todo what about the '-1' bit?? Linux thinks it has 4 timers. */ 1337 | 1 /* REV_ID - Revision, must not be 0 */ 1338 ; 1330 | 1; /* REV_ID - Revision, must not be 0 */ 1331 if (pThis->fIch9) /* NUM_TIM_CAP - Number of timers -1. */ 1332 u32Caps |= (HPET_NUM_TIMERS_ICH9 - 1) << 8; 1333 else 1334 u32Caps |= (HPET_NUM_TIMERS_PIIX - 1) << 8; 1335 AssertCompile(HPET_NUM_TIMERS_ICH9 <= RT_ELEMENTS(pThis->aTimers)); 1336 AssertCompile(HPET_NUM_TIMERS_PIIX <= RT_ELEMENTS(pThis->aTimers)); 1337 1339 1338 pThis->u64Capabilities = (u32Vendor << 16) | u32Caps; 1340 1339 pThis->u64Capabilities |= ((uint64_t)(pThis->fIch9 ? HPET_CLK_PERIOD_ICH9 : HPET_CLK_PERIOD) << 32);
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