Changeset 37636 in vbox for trunk/src/VBox
- Timestamp:
- Jun 24, 2011 2:59:59 PM (14 years ago)
- Location:
- trunk/src/VBox/Devices
- Files:
-
- 15 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Audio/DevIchIntelHDA.cpp
r37482 r37636 1903 1903 * @thread EMT 1904 1904 */ 1905 PDMBOTHCBDECL(int) hdaMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)1905 PDMBOTHCBDECL(int) hdaMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 1906 1906 { 1907 1907 int rc = VINF_SUCCESS; … … 1919 1919 if (index != -1) 1920 1920 { 1921 /** @todo r=bird: What is all this masking and shifting about? And 1922 * WHY ON EARTH are you writing to the input data?!? */ 1921 1923 uint32_t v = pThis->hda.au32Regs[index]; 1922 1924 uint32_t mask = 0; -
trunk/src/VBox/Devices/Bus/DevPciIch9.cpp
r36836 r37636 164 164 DEVINS_2_PCIBUS(pDevIns)->CTX_SUFF(pPciHlp)->pfnUnlock(pDevIns) 165 165 166 RT_C_DECLS_BEGIN167 168 PDMBOTHCBDECL(void) ich9pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel);169 PDMBOTHCBDECL(void) ich9pcibridgeSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel);170 PDMBOTHCBDECL(int) ich9pciIOPortAddressWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);171 PDMBOTHCBDECL(int) ich9pciIOPortAddressRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);172 PDMBOTHCBDECL(int) ich9pciIOPortDataWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);173 PDMBOTHCBDECL(int) ich9pciIOPortDataRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);174 PDMBOTHCBDECL(int) ich9pciMcfgMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb);175 PDMBOTHCBDECL(int) ich9pciMcfgMMIORead (PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb);176 177 RT_C_DECLS_END178 179 166 /* Prototypes */ 180 167 static void ich9pciSetIrqInternal(PICH9PCIGLOBALS pGlobals, uint8_t uDevFn, PPCIDEVICE pPciDev, int iIrq, int iLevel); … … 602 589 } 603 590 604 PDMBOTHCBDECL(int) ich9pciMcfgMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)591 PDMBOTHCBDECL(int) ich9pciMcfgMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 605 592 { 606 593 PICH9PCIGLOBALS pGlobals = PDMINS_2_DATA(pDevIns, PICH9PCIGLOBALS); -
trunk/src/VBox/Devices/Bus/MsixCommon.cpp
r37423 r37636 29 29 30 30 #pragma pack(1) 31 typedef struct { 31 typedef struct 32 { 32 33 uint32_t u32MsgAddressLo; 33 34 uint32_t u32MsgAddressHi; … … 128 129 } 129 130 130 PDMBOTHCBDECL(int) msixMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)131 PDMBOTHCBDECL(int) msixMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 131 132 { 132 133 /// @todo: qword accesses? -
trunk/src/VBox/Devices/Graphics/DevVGA.cpp
r37466 r37636 294 294 295 295 #ifndef VBOX_DEVICE_STRUCT_TESTCASE 296 /*******************************************************************************297 * Internal Functions *298 *******************************************************************************/299 RT_C_DECLS_BEGIN300 301 PDMBOTHCBDECL(int) vgaIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);302 PDMBOTHCBDECL(int) vgaIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);303 PDMBOTHCBDECL(int) vgaIOPortWriteVBEIndex(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);304 PDMBOTHCBDECL(int) vgaIOPortWriteVBEData(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);305 PDMBOTHCBDECL(int) vgaIOPortReadVBEIndex(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);306 PDMBOTHCBDECL(int) vgaIOPortReadVBEData(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);307 PDMBOTHCBDECL(int) vgaMMIOFill(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, uint32_t u32Item, unsigned cbItem, unsigned cItems);308 PDMBOTHCBDECL(int) vgaMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb);309 PDMBOTHCBDECL(int) vgaMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb);310 PDMBOTHCBDECL(int) vgaIOPortReadBIOS(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);311 PDMBOTHCBDECL(int) vgaIOPortWriteBIOS(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);312 #ifdef IN_RC313 PDMBOTHCBDECL(int) vgaGCLFBAccessHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);314 #endif315 #ifdef IN_RING0316 PDMBOTHCBDECL(int) vgaR0LFBAccessHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);317 #endif318 #ifdef IN_RING3319 # ifdef VBE_NEW_DYN_LIST320 PDMBOTHCBDECL(int) vbeIOPortReadVBEExtra(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);321 PDMBOTHCBDECL(int) vbeIOPortWriteVBEExtra(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);322 # endif323 PDMBOTHCBDECL(int) vbeIOPortReadCMDLogo(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);324 PDMBOTHCBDECL(int) vbeIOPortWriteCMDLogo(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);325 #endif /* IN_RING3 */326 327 328 RT_C_DECLS_END329 296 330 297 … … 3267 3234 * @param cb Bytes to write. 3268 3235 */ 3269 PDMBOTHCBDECL(int) vgaMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)3236 PDMBOTHCBDECL(int) vgaMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 3270 3237 { 3271 3238 PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); -
trunk/src/VBox/Devices/Network/DevE1000.cpp
r37627 r37636 1125 1125 1126 1126 /* Forward declarations ******************************************************/ 1127 RT_C_DECLS_BEGIN1128 PDMBOTHCBDECL(int) e1kMMIORead (PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb);1129 PDMBOTHCBDECL(int) e1kMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb);1130 PDMBOTHCBDECL(int) e1kIOPortIn (PPDMDEVINS pDevIns, void *pvUser, RTIOPORT port, uint32_t *pu32, unsigned cb);1131 PDMBOTHCBDECL(int) e1kIOPortOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT port, uint32_t u32, unsigned cb);1132 RT_C_DECLS_END1133 1134 1127 static int e1kXmitPending(E1KSTATE *pState, bool fOnWorkerThread); 1135 1128 … … 4318 4311 * @thread EMT 4319 4312 */ 4320 static int e1kRegWrite(E1KSTATE *pState, uint32_t uOffset, void *pv, unsigned cb)4313 static int e1kRegWrite(E1KSTATE *pState, uint32_t uOffset, void const *pv, unsigned cb) 4321 4314 { 4322 4315 int rc = VINF_SUCCESS; … … 4421 4414 */ 4422 4415 PDMBOTHCBDECL(int) e1kMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, 4423 RTGCPHYS GCPhysAddr, void *pv, unsigned cb)4416 RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 4424 4417 { 4425 4418 NOREF(pvUser); -
trunk/src/VBox/Devices/Network/DevPCNet.cpp
r37466 r37636 1144 1144 1145 1145 RT_C_DECLS_BEGIN 1146 PDMBOTHCBDECL(int) pcnetIOPortRead(PPDMDEVINS pDevIns, void *pvUser,1147 RTIOPORT Port, uint32_t *pu32, unsigned cb);1148 PDMBOTHCBDECL(int) pcnetIOPortWrite(PPDMDEVINS pDevIns, void *pvUser,1149 RTIOPORT Port, uint32_t u32, unsigned cb);1150 PDMBOTHCBDECL(int) pcnetIOPortAPromWrite(PPDMDEVINS pDevIns, void *pvUser,1151 RTIOPORT Port, uint32_t u32, unsigned cb);1152 PDMBOTHCBDECL(int) pcnetIOPortAPromRead(PPDMDEVINS pDevIns, void *pvUser,1153 RTIOPORT Port, uint32_t *pu32, unsigned cb);1154 PDMBOTHCBDECL(int) pcnetMMIORead(PPDMDEVINS pDevIns, void *pvUser,1155 RTGCPHYS GCPhysAddr, void *pv, unsigned cb);1156 PDMBOTHCBDECL(int) pcnetMMIOWrite(PPDMDEVINS pDevIns, void *pvUser,1157 RTGCPHYS GCPhysAddr, void *pv, unsigned cb);1158 1146 #ifndef IN_RING3 1159 1147 DECLEXPORT(int) pcnetHandleRingWrite(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, … … 3865 3853 */ 3866 3854 PDMBOTHCBDECL(int) pcnetMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, 3867 RTGCPHYS GCPhysAddr, void *pv, unsigned cb)3855 RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 3868 3856 { 3869 3857 PCNetState *pThis = (PCNetState *)pvUser; -
trunk/src/VBox/Devices/PC/DevAPIC.cpp
r37582 r37636 1708 1708 } 1709 1709 1710 PDMBOTHCBDECL(int) apicMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)1710 PDMBOTHCBDECL(int) apicMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 1711 1711 { 1712 1712 APICDeviceInfo *pDev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *); -
trunk/src/VBox/Devices/PC/DevHPET.cpp
r37541 r37636 949 949 * @callback_method_impl{FNIOMMMIOWRITE} 950 950 */ 951 PDMBOTHCBDECL(int) hpetMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)951 PDMBOTHCBDECL(int) hpetMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 952 952 { 953 953 HpetState *pThis = PDMINS_2_DATA(pDevIns, HpetState*); -
trunk/src/VBox/Devices/PC/DevIoApic.cpp
r37481 r37636 394 394 } 395 395 396 PDMBOTHCBDECL(int) ioapicMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)396 PDMBOTHCBDECL(int) ioapicMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 397 397 { 398 398 IOAPICState *s = PDMINS_2_DATA(pDevIns, IOAPICState *); … … 404 404 case 4: 405 405 IOAPIC_LOCK(s, VINF_IOM_HC_MMIO_WRITE); 406 ioapic_mem_writel(s, GCPhysAddr, *(uint32_t *)pv); 406 ioapic_mem_writel(s, GCPhysAddr, *(uint32_t *)pv); /** @todo r=bird: This cannot be right for cb!=4. */ 407 407 IOAPIC_UNLOCK(s); 408 408 break; -
trunk/src/VBox/Devices/PC/DevLPC.cpp
r35353 r37636 161 161 * @thread EMT 162 162 */ 163 PDMBOTHCBDECL(int) lpcMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)163 PDMBOTHCBDECL(int) lpcMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 164 164 { 165 165 LPCState *s = PDMINS_2_DATA(pDevIns, LPCState*); -
trunk/src/VBox/Devices/Storage/DevAHCI.cpp
r37496 r37636 896 896 #ifndef VBOX_DEVICE_STRUCT_TESTCASE 897 897 RT_C_DECLS_BEGIN 898 PDMBOTHCBDECL(int) ahciMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb);899 PDMBOTHCBDECL(int) ahciMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb);900 898 static void ahciHBAReset(PAHCI pThis); 901 PDMBOTHCBDECL(int) ahciIOPortWrite1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);902 PDMBOTHCBDECL(int) ahciIOPortRead1(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);903 PDMBOTHCBDECL(int) ahciIOPortWrite2(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);904 PDMBOTHCBDECL(int) ahciIOPortRead2(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);905 PDMBOTHCBDECL(int) ahciLegacyFakeWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);906 PDMBOTHCBDECL(int) ahciLegacyFakeRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);907 899 #ifdef IN_RING3 908 900 static int ahciPostFisIntoMemory(PAHCIPort pAhciPort, unsigned uFisType, uint8_t *cmdFis); … … 2153 2145 * @param cb Number of bytes to write. 2154 2146 */ 2155 static int ahciRegisterWrite(PAHCI pAhci, uint32_t uReg, void *pv, unsigned cb)2147 static int ahciRegisterWrite(PAHCI pAhci, uint32_t uReg, void const *pv, unsigned cb) 2156 2148 { 2157 2149 int rc = VINF_SUCCESS; … … 2247 2239 * @param cb Number of bytes to write. 2248 2240 */ 2249 PDMBOTHCBDECL(int) ahciMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)2241 PDMBOTHCBDECL(int) ahciMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 2250 2242 { 2251 2243 PAHCI pAhci = PDMINS_2_DATA(pDevIns, PAHCI); -
trunk/src/VBox/Devices/Storage/DevBusLogic.cpp
r37466 r37636 779 779 #ifndef VBOX_DEVICE_STRUCT_TESTCASE 780 780 781 RT_C_DECLS_BEGIN782 PDMBOTHCBDECL(int) buslogicIOPortWrite (PPDMDEVINS pDevIns, void *pvUser,783 RTIOPORT Port, uint32_t u32, unsigned cb);784 PDMBOTHCBDECL(int) buslogicIOPortRead (PPDMDEVINS pDevIns, void *pvUser,785 RTIOPORT Port, uint32_t *pu32, unsigned cb);786 PDMBOTHCBDECL(int) buslogicMMIOWrite(PPDMDEVINS pDevIns, void *pvUser,787 RTGCPHYS GCPhysAddr, void *pv, unsigned cb);788 PDMBOTHCBDECL(int) buslogicMMIORead(PPDMDEVINS pDevIns, void *pvUser,789 RTGCPHYS GCPhysAddr, void *pv, unsigned cb);790 RT_C_DECLS_END791 792 781 #define PDMIBASE_2_PBUSLOGICDEVICE(pInterface) ( (PBUSLOGICDEVICE)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGICDEVICE, IBase)) ) 793 782 #define PDMISCSIPORT_2_PBUSLOGICDEVICE(pInterface) ( (PBUSLOGICDEVICE)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGICDEVICE, ISCSIPort)) ) … … 1799 1788 */ 1800 1789 PDMBOTHCBDECL(int) buslogicMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, 1801 RTGCPHYS GCPhysAddr, void *pv, unsigned cb)1790 RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 1802 1791 { 1803 1792 /* the linux driver does not make use of the MMIO area. */ -
trunk/src/VBox/Devices/Storage/DevLsiLogicSCSI.cpp
r37466 r37636 371 371 372 372 RT_C_DECLS_BEGIN 373 PDMBOTHCBDECL(int) lsilogicIOPortWrite (PPDMDEVINS pDevIns, void *pvUser,374 RTIOPORT Port, uint32_t u32, unsigned cb);375 PDMBOTHCBDECL(int) lsilogicIOPortRead (PPDMDEVINS pDevIns, void *pvUser,376 RTIOPORT Port, uint32_t *pu32, unsigned cb);377 PDMBOTHCBDECL(int) lsilogicMMIOWrite(PPDMDEVINS pDevIns, void *pvUser,378 RTGCPHYS GCPhysAddr, void *pv, unsigned cb);379 PDMBOTHCBDECL(int) lsilogicMMIORead(PPDMDEVINS pDevIns, void *pvUser,380 RTGCPHYS GCPhysAddr, void *pv, unsigned cb);381 PDMBOTHCBDECL(int) lsilogicDiagnosticWrite(PPDMDEVINS pDevIns, void *pvUser,382 RTGCPHYS GCPhysAddr, void *pv, unsigned cb);383 PDMBOTHCBDECL(int) lsilogicDiagnosticRead(PPDMDEVINS pDevIns, void *pvUser,384 RTGCPHYS GCPhysAddr, void *pv, unsigned cb);385 373 #ifdef IN_RING3 386 374 static void lsilogicInitializeConfigurationPages(PLSILOGICSCSI pLsiLogic); … … 964 952 * @param cb Number of bytes to write. 965 953 */ 966 static int lsilogicRegisterWrite(PLSILOGICSCSI pThis, uint32_t uOffset, void *pv, unsigned cb)954 static int lsilogicRegisterWrite(PLSILOGICSCSI pThis, uint32_t uOffset, void const *pv, unsigned cb) 967 955 { 968 956 uint32_t u32 = *(uint32_t *)pv; … … 1338 1326 1339 1327 PDMBOTHCBDECL(int) lsilogicMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, 1340 RTGCPHYS GCPhysAddr, void *pv, unsigned cb)1328 RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 1341 1329 { 1342 1330 PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI); … … 1356 1344 1357 1345 PDMBOTHCBDECL(int) lsilogicDiagnosticWrite(PPDMDEVINS pDevIns, void *pvUser, 1358 RTGCPHYS GCPhysAddr, void *pv, unsigned cb)1346 RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 1359 1347 { 1360 1348 PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI); -
trunk/src/VBox/Devices/USB/DevOHCI.cpp
r37469 r37636 766 766 static DECLCALLBACK(void) ohciR3LoadReattachDevices(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser); 767 767 #endif /* IN_RING3 */ 768 PDMBOTHCBDECL(int) ohciWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb);769 PDMBOTHCBDECL(int) ohciRead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb);770 768 RT_C_DECLS_END 771 769 … … 4825 4823 * @param cb The size of the data being written. 4826 4824 */ 4827 PDMBOTHCBDECL(int) ohciWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)4825 PDMBOTHCBDECL(int) ohciWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 4828 4826 { 4829 4827 POHCI pOhci = PDMINS_2_DATA(pDevIns, POHCI); -
trunk/src/VBox/Devices/VMMDev/VMMDevTesting.cpp
r31109 r37636 42 42 * @callback_method_impl{FNIOMMMIOWRITE} 43 43 */ 44 PDMBOTHCBDECL(int) vmmdevTestingMmioWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)44 PDMBOTHCBDECL(int) vmmdevTestingMmioWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 45 45 { 46 46 switch (GCPhysAddr)
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