VirtualBox

Changeset 37702 in vbox


Ignore:
Timestamp:
Jun 30, 2011 10:09:59 AM (14 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
72562
Message:

REM/VMM: Don't flush the TLB if you don't hold the EM/REM lock, some other EMT may be executing code in the recompiler and could be really surprised by a TLB flush.

Location:
trunk
Files:
12 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/dis.h

    r33540 r37702  
    3232
    3333#if defined(__L4ENV__)
    34 #include <setjmp.h>
     34# include <setjmp.h>
    3535#endif
    3636
    … …  
    368368 * Operand Parameter.
    369369 */
    370 typedef struct _OP_PARAMETER
     370typedef struct OP_PARAMETER
    371371{
    372372    /** @todo switch param and parval and move disp64 and flags up here with the other 64-bit vars to get more natural alignment and save space. */
    … …  
    416416
    417417
    418 struct _OPCODE;
    419418/** Pointer to opcode. */
    420 typedef struct _OPCODE *POPCODE;
     419typedef struct OPCODE *POPCODE;
    421420/** Pointer to const opcode. */
    422 typedef const struct _OPCODE *PCOPCODE;
     421typedef const struct OPCODE *PCOPCODE;
    423422
    424423typedef DECLCALLBACK(int) FN_DIS_READBYTES(RTUINTPTR pSrc, uint8_t *pDest, unsigned size, void *pvUserdata);
    425424typedef FN_DIS_READBYTES *PFN_DIS_READBYTES;
    426 
    427 /* forward decl */
    428 struct _DISCPUSTATE;
    429 /** Pointer to the disassembler CPU state. */
    430 typedef struct _DISCPUSTATE *PDISCPUSTATE;
    431425
    432426/** Parser callback.
    … …  
    435429typedef FNDISPARSE *PFNDISPARSE;
    436430
    437 typedef struct _DISCPUSTATE
     431typedef struct DISCPUSTATE
    438432{
    439433    /* Global setting */
    … …  
    513507} DISCPUSTATE;
    514508
    515 /** Pointer to a const disassembler CPU state. */
    516 typedef DISCPUSTATE const *PCDISCPUSTATE;
    517 
    518509/** The storage padding sufficient to hold the largest DISCPUSTATE in all
    519510 * contexts (R3, R0 and RC). Used various places in the VMM internals.   */
    … …  
    522513/** Opcode. */
    523514#pragma pack(4)
    524 typedef struct _OPCODE
     515typedef struct OPCODE
    525516{
    526517#ifndef DIS_CORE_ONLY

  • trunk/include/VBox/types.h

    r36761 r37702  
    10541054} CPUMMODE;
    10551055
     1056
     1057/** Pointer to the disassembler CPU state. */
     1058typedef struct DISCPUSTATE *PDISCPUSTATE;
     1059/** Pointer to a const disassembler CPU state. */
     1060typedef struct DISCPUSTATE const *PCDISCPUSTATE;
     1061
     1062
    10561063/** @} */
    10571064

  • trunk/include/VBox/vmm/em.h

    r35361 r37702  
    2929#include <VBox/types.h>
    3030#include <VBox/vmm/trpm.h>
    31 #include <VBox/dis.h>
    3231
    3332
    … …  
    189188VMMDECL(void)       EMRemLock(PVM pVM);
    190189VMMDECL(bool)       EMRemIsLockOwner(PVM pVM);
    191 VMMDECL(int)        EMTryEnterRemLock(PVM pVM);
     190VMMDECL(int)        EMRemTryLock(PVM pVM);
    192191/** @} */
    193192

  • trunk/src/VBox/VMM/VMMAll/EMAll.cpp

    r36315 r37702  
    31363136VMMDECL(bool) EMRemIsLockOwner(PVM pVM)
    31373137{
     3138    if (!PDMCritSectIsInitialized(&pVM->em.s.CritSectREM))
     3139        return true;   /* early init */
     3140
    31383141    return PDMCritSectIsOwner(&pVM->em.s.CritSectREM);
    31393142}
    … …  
    31453148 * @param   pVM         The VM to operate on.
    31463149 */
    3147 VMMDECL(int) EMTryEnterRemLock(PVM pVM)
    3148 {
     3150VMMDECL(int) EMRemTryLock(PVM pVM)
     3151{
     3152    if (!PDMCritSectIsInitialized(&pVM->em.s.CritSectREM))
     3153        return VINF_SUCCESS; /* early init */
     3154
    31493155    return PDMCritSectTryEnter(&pVM->em.s.CritSectREM);
    31503156}

  • trunk/src/VBox/VMM/VMMAll/REMAll.cpp

    r35346 r37702  
    4747     */
    4848    if (   pVM->rem.s.cInvalidatedPages < RT_ELEMENTS(pVM->rem.s.aGCPtrInvalidatedPages)
    49         && EMTryEnterRemLock(pVM) == VINF_SUCCESS)
     49        && EMRemTryLock(pVM) == VINF_SUCCESS)
    5050    {
    5151        uint32_t iPage = pVM->rem.s.cInvalidatedPages;

  • trunk/src/VBox/VMM/include/REMInternal.h

    r36170 r37702  
    238238bool    remR3DisasInstr(CPUState *env, int f32BitCode, char *pszPrefix);
    239239void    remR3FlushPage(CPUState *env, RTGCPTR GCPtr);
    240 void    remR3SetPage(CPUState *env, CPUTLBEntry *pRead,  CPUTLBEntry *pWrite, int prot, int is_user);
    241240void    remR3FlushTLB(CPUState *env, bool fGlobal);
    242241void    remR3ProtectCode(CPUState *env, RTGCPTR GCPtr);

  • trunk/src/recompiler/VBoxRecompiler.c

    r37689 r37702  
    311311    CPUMGetGuestCpuId(pVCpu, 0x80000001, &u32Dummy, &u32Dummy, &pVM->rem.s.Env.cpuid_ext3_features, &pVM->rem.s.Env.cpuid_ext2_features);
    312312
     313    EMRemLock(pVM);
    313314    cpu_reset(&pVM->rem.s.Env);
     315    EMRemUnlock(pVM);
    314316
    315317    /* allocate code buffer for single instruction emulation. */
    … …  
    607609REMR3DECL(void) REMR3Reset(PVM pVM)
    608610{
     611    EMRemLock(pVM); /* Only pro forma, we're in a rendezvous. */
     612
    609613    /*
    610614     * Reset the REM cpu.
    … …  
    622626    /* Flush the TBs the next time we execute code here. */
    623627    pVM->rem.s.fFlushTBs = true;
     628
     629    EMRemUnlock(pVM);
    624630}
    625631
    … …  
    764770
    765771    /*
    766      * Sync the Load Flush the TLB
    767      */
    768     tlb_flush(&pRem->Env, 1);
    769 
    770     /*
    771772     * Stop ignoring ignorable notifications.
    772773     */
    … …  
    814815     */
    815816    interrupt_request = pVM->rem.s.Env.interrupt_request;
    816     Assert(!(interrupt_request & ~(CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB | CPU_INTERRUPT_TIMER  | CPU_INTERRUPT_EXTERNAL_HARD | CPU_INTERRUPT_EXTERNAL_EXIT | CPU_INTERRUPT_EXTERNAL_TIMER)));
     817    Assert(!(interrupt_request & ~(CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB | CPU_INTERRUPT_TIMER  | CPU_INTERRUPT_EXTERNAL_HARD | CPU_INTERRUPT_EXTERNAL_EXIT | CPU_INTERRUPT_EXTERNAL_FLUSH_TLB | CPU_INTERRUPT_EXTERNAL_TIMER)));
    817818    pVM->rem.s.Env.interrupt_request = 0;
    818819    cpu_single_step(&pVM->rem.s.Env, 1);
    … …  
    954955    {
    955956        int interrupt_request = pVM->rem.s.Env.interrupt_request;
    956         Assert(!(interrupt_request & ~(CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB | CPU_INTERRUPT_TIMER | CPU_INTERRUPT_EXTERNAL_HARD | CPU_INTERRUPT_EXTERNAL_EXIT | CPU_INTERRUPT_EXTERNAL_TIMER)));
     957        Assert(!(interrupt_request & ~(CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB | CPU_INTERRUPT_TIMER | CPU_INTERRUPT_EXTERNAL_HARD | CPU_INTERRUPT_EXTERNAL_EXIT | CPU_INTERRUPT_EXTERNAL_FLUSH_TLB | CPU_INTERRUPT_EXTERNAL_TIMER)));
    957958#ifdef REM_USE_QEMU_SINGLE_STEP_FOR_LOGGING
    958959        cpu_single_step(&pVM->rem.s.Env, 0);
    … …  
    16771678    int rc;
    16781679
     1680    Assert(EMRemIsLockOwner(env->pVM));
     1681
    16791682    /*
    16801683     * When we're replaying invlpg instructions or restoring a saved
    … …  
    17861789void remR3FlushTLB(CPUX86State *env, bool fGlobal)
    17871790{
    1788     PVM pVM = env->pVM;
     1791    PVM      pVM = env->pVM;
    17891792    PCPUMCTX pCtx;
     1793    Assert(EMRemIsLockOwner(pVM));
    17901794
    17911795    /*

  • trunk/src/recompiler/cpu-all.h

    r37693 r37702  
    945945#ifdef VBOX
    946946/** Executes a single instruction. cpu_exec() will normally return EXCP_SINGLE_INSTR. */
    947 # define CPU_INTERRUPT_SINGLE_INSTR             0x02000000
     947# define CPU_INTERRUPT_SINGLE_INSTR             0x01000000
    948948/** Executing a CPU_INTERRUPT_SINGLE_INSTR request, quit the cpu_loop. (for exceptions and suchlike) */
    949 # define CPU_INTERRUPT_SINGLE_INSTR_IN_FLIGHT   0x04000000
     949# define CPU_INTERRUPT_SINGLE_INSTR_IN_FLIGHT   0x02000000
    950950/** VM execution was interrupted by VMR3Reset, VMR3Suspend or VMR3PowerOff. */
    951 # define CPU_INTERRUPT_RC                       0x08000000
     951# define CPU_INTERRUPT_RC                       0x04000000
     952/** Exit current TB to process an external request. */
     953# define CPU_INTERRUPT_EXTERNAL_FLUSH_TLB       0x08000000
    952954/** Exit current TB to process an external request. */
    953955# define CPU_INTERRUPT_EXTERNAL_EXIT            0x10000000

  • trunk/src/recompiler/cpu-exec.c

    r37689 r37702  
    417417#if defined(TARGET_I386)
    418418# ifdef VBOX
     419                    /* Memory registration may post a tlb flush request, process it ASAP. */
     420                    if (interrupt_request & (CPU_INTERRUPT_EXTERNAL_FLUSH_TLB)) {
     421                        tlb_flush(env, true); /* (clears the flush flag) */
     422                    }
     423
    419424                    /* Single instruction exec request, we execute it and return (one way or the other).
    420425                       The caller will always reschedule after doing this operation! */

  • trunk/src/recompiler/exec-all.h

    r37689 r37702  
    3434# include <VBox/vmm/tm.h>
    3535# include <VBox/vmm/pgm.h> /* PGM_DYNAMIC_RAM_ALLOC */
     36# include <VBox/vmm/em.h>  /* EMRemIsLockOwner */
    3637# ifndef LOG_GROUP
    3738#  define LOG_GROUP LOG_GROUP_REM

  • trunk/src/recompiler/exec.c

    r37696 r37702  
    21082108    int i;
    21092109
     2110#ifdef VBOX
     2111    Assert(EMRemIsLockOwner(env->pVM));
     2112    ASMAtomicAndS32((int32_t volatile *)&env->interrupt_request, ~CPU_INTERRUPT_EXTERNAL_FLUSH_TLB);
     2113#endif
     2114
    21102115#if defined(DEBUG_TLB)
    21112116    printf("tlb_flush:\n");
    … …  
    21512156    int mmu_idx;
    21522157
     2158    Assert(EMRemIsLockOwner(env->pVM));
    21532159#if defined(DEBUG_TLB)
    21542160    printf("tlb_flush_page: " TARGET_FMT_lx "\n", addr);
    … …  
    29232929    /* since each CPU stores ram addresses in its TLB cache, we must
    29242930       reset the modified entries */
     2931#ifndef VBOX
    29252932    /* XXX: slow ! */
    29262933    for(env = first_cpu; env != NULL; env = env->next_cpu) {
    29272934        tlb_flush(env, 1);
    29282935    }
     2936#else
     2937    /* We have one thread per CPU, so, one of the other EMTs might be executing
     2938       code right now and flushing the TLB may crash it. */
     2939    env = first_cpu;
     2940    if (EMRemIsLockOwner(env->pVM))
     2941        tlb_flush(env, 1);
     2942    else
     2943        ASMAtomicOrS32((int32_t volatile *)&env->interrupt_request,
     2944                       CPU_INTERRUPT_EXTERNAL_FLUSH_TLB);
     2945#endif
    29292946}
    29302947

  • trunk/src/recompiler/target-i386/op_helper.c

    r37689 r37702  
    679679void helper_check_external_event()
    680680{
    681     if (    (env->interrupt_request & (  CPU_INTERRUPT_EXTERNAL_EXIT
     681    if (    (env->interrupt_request & (  CPU_INTERRUPT_EXTERNAL_FLUSH_TLB
     682                                       | CPU_INTERRUPT_EXTERNAL_EXIT
    682683                                       | CPU_INTERRUPT_EXTERNAL_TIMER
    683684                                       | CPU_INTERRUPT_EXTERNAL_DMA))
    … …  
    14761477                        ~CPU_INTERRUPT_EXTERNAL_TIMER);
    14771478        remR3TimersRun(env);
     1479    }
     1480    if (env->interrupt_request & CPU_INTERRUPT_EXTERNAL_FLUSH_TLB)
     1481    {
     1482        ASMAtomicAndS32((int32_t volatile *)&env->interrupt_request,
     1483                        ~CPU_INTERRUPT_EXTERNAL_HARD);
     1484        cpu_interrupt(env, CPU_INTERRUPT_HARD);
    14781485    }
    14791486}
    … …  
    58365843         * Exit once we detect an external interrupt and interrupts are enabled
    58375844         */
    5838         if (   (env->interrupt_request & (CPU_INTERRUPT_EXTERNAL_EXIT|CPU_INTERRUPT_EXTERNAL_TIMER))
     5845        if (   (env->interrupt_request & (CPU_INTERRUPT_EXTERNAL_EXIT | CPU_INTERRUPT_EXTERNAL_TIMER))
    58395846            || (   (env->eflags & IF_MASK)
    58405847                && !(env->hflags & HF_INHIBIT_IRQ_MASK)
    … …  
    58435850        {
    58445851            break;
     5852        }
     5853        if (env->interrupt_request & CPU_INTERRUPT_EXTERNAL_FLUSH_TLB) {
     5854            tlb_flush(env, true);
    58455855        }
    58465856    }
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