VirtualBox

Changeset 39154 in vbox for trunk/src/VBox/Devices/USB


Ignore:
Timestamp:
Oct 31, 2011 3:36:29 PM (13 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
74616
Message:

IOM: Added flags for dropping into the vbox debugger on complicated MMIO accesses. DBGF: some namespace cleanups.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/USB/DevOHCI.cpp

    r39151 r39154  
    351351    /** A flag indicating that the bulk list may have in-flight URBs. */
    352352    bool                fBulkNeedsCleaning;
     353
     354    /** Whether RC/R0 is enabled. */
     355    bool                fRZEnabled;
    353356
    354357    uint32_t            Alignment3;     /**< Align size on a 8 byte boundary. */
     
    47904793 * @param   cb          The size of the read.
    47914794 */
    4792 PDMBOTHCBDECL(int) ohciRead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)
     4795PDMBOTHCBDECL(int) ohciMmioRead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)
    47934796{
    47944797    POHCI pOhci = PDMINS_2_DATA(pDevIns, POHCI);
     
    48294832 * @param   cb          The size of the data being written.
    48304833 */
    4831 PDMBOTHCBDECL(int) ohciWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb)
     4834PDMBOTHCBDECL(int) ohciMmioWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb)
    48324835{
    48334836    POHCI pOhci = PDMINS_2_DATA(pDevIns, POHCI);
     
    48384841    if (cb != sizeof(uint32_t))
    48394842    {
    4840         Log2(("ohciWrite: Bad write size!!! GCPhysAddr=%RGp cb=%d\n", GCPhysAddr, cb));
     4843        Log2(("ohciMmioWrite: Bad write size!!! GCPhysAddr=%RGp cb=%d\n", GCPhysAddr, cb));
    48414844        return VINF_SUCCESS;
    48424845    }
    48434846    if (GCPhysAddr & 0x3)
    48444847    {
    4845         Log2(("ohciWrite: Unaligned write!!! GCPhysAddr=%RGp cb=%d\n", GCPhysAddr, cb));
     4848        Log2(("ohciMmioWrite: Unaligned write!!! GCPhysAddr=%RGp cb=%d\n", GCPhysAddr, cb));
    48464849        return VINF_SUCCESS;
    48474850    }
     
    48744877    POHCI pOhci = (POHCI)pPciDev;
    48754878    int rc = PDMDevHlpMMIORegister(pOhci->CTX_SUFF(pDevIns), GCPhysAddress, cb, NULL /*pvUser*/,
    4876                                    IOMMMIO_FLAGS_READ_DWORD | IOMMMIO_FLAGS_WRITE_PASSTHRU,
    4877                                    ohciWrite, ohciRead, "USB OHCI");
     4879                                   IOMMMIO_FLAGS_READ_DWORD | IOMMMIO_FLAGS_WRITE_DWORD_ZEROED
     4880                                   | IOMMMIO_FLAGS_DBGSTOP_ON_COMPLICATED_WRITE,
     4881                                   ohciMmioWrite, ohciMmioRead, "USB OHCI");
    48784882    if (RT_FAILURE(rc))
    48794883        return rc;
    48804884
    4881 # if 1 /* this enabled / disabled GC/R0 stuff */
    4882     rc = PDMDevHlpMMIORegisterRC(pOhci->CTX_SUFF(pDevIns), GCPhysAddress, cb, NIL_RTRCPTR /*pvUser*/, "ohciWrite", "ohciRead");
    4883     if (RT_FAILURE(rc))
    4884         return rc;
    4885 
    4886     rc = PDMDevHlpMMIORegisterR0(pOhci->CTX_SUFF(pDevIns), GCPhysAddress, cb, NIL_RTR0PTR /*pvUser*/, "ohciWrite", "ohciRead");
    4887     if (RT_FAILURE(rc))
    4888         return rc;
    4889 # endif
     4885    if (pOhci->fRZEnabled)
     4886    {
     4887        rc = PDMDevHlpMMIORegisterRC(pOhci->CTX_SUFF(pDevIns), GCPhysAddress, cb,
     4888                                     NIL_RTRCPTR /*pvUser*/, "ohciMmioWrite", "ohciMmioRead");
     4889        if (RT_FAILURE(rc))
     4890            return rc;
     4891
     4892        rc = PDMDevHlpMMIORegisterR0(pOhci->CTX_SUFF(pDevIns), GCPhysAddress, cb,
     4893                                     NIL_RTR0PTR /*pvUser*/, "ohciMmioWrite", "ohciMmioRead");
     4894        if (RT_FAILURE(rc))
     4895            return rc;
     4896    }
    48904897
    48914898    pOhci->MMIOBase = GCPhysAddress;
     
    53665373static DECLCALLBACK(int) ohciR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
    53675374{
    5368     POHCI   pOhci = PDMINS_2_DATA(pDevIns, POHCI);
    5369     int     rc;
     5375    POHCI pOhci = PDMINS_2_DATA(pDevIns, POHCI);
    53705376    PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
    5371 
    5372     /*
    5373      * Read configuration. No configuration keys are currently supported.
    5374      */
    5375     if (!CFGMR3AreValuesValid(pCfg, "\0"))
    5376         return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
    5377                                 N_("Configuration error: Unknown config key"));
    53785377
    53795378    /*
     
    54095408    pOhci->RootHub.ILeds.pfnQueryStatusLed       = ohciRhQueryStatusLed;
    54105409
     5410
     5411    /*
     5412     * Read configuration. No configuration keys are currently supported.
     5413     */
     5414    PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "RZEnabled", "");
     5415    int rc = CFGMR3QueryBoolDef(pCfg, "RZEnabled", &pOhci->fRZEnabled, true);
     5416    AssertLogRelRCReturn(rc, rc);
     5417
     5418
    54115419    /*
    54125420     * Register PCI device and I/O region.
     
    54235431    aMsiReg.iMsiNextOffset = 0x0;
    54245432    rc = PDMDevHlpPCIRegisterMsi(pDevIns, &aMsiReg);
    5425     if (RT_FAILURE (rc))
     5433    if (RT_FAILURE(rc))
    54265434    {
    54275435        PCIDevSetCapabilityList(&pOhci->PciDev, 0x0);
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