VirtualBox

Changeset 39402 in vbox for trunk/src/VBox/VMM/VMMAll


Ignore:
Timestamp:
Nov 23, 2011 4:25:04 PM (13 years ago)
Author:
vboxsync
Message:

VMM: don't use generic IPE status codes, use specific ones. Part 1.

Location:
trunk/src/VBox/VMM/VMMAll
Files:
14 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/EMAll.cpp

    r39078 r39402  
    218218 * @returns VBox status code, see SELMToFlatEx and EMInterpretDisasOneEx for
    219219 *          details.
    220  * @retval  VERR_INTERNAL_ERROR on DISCoreOneEx failure.
     220 * @retval  VERR_EM_INTERNAL_DISAS_ERROR on DISCoreOneEx failure.
    221221 *
    222222 * @param   pVM             The VM handle.
     
    246246 *
    247247 * @returns VBox status code.
    248  * @retval  VERR_INTERNAL_ERROR on DISCoreOneEx failure.
     248 * @retval  VERR_EM_INTERNAL_DISAS_ERROR on DISCoreOneEx failure.
    249249 *
    250250 * @param   pVM             The VM handle.
     
    291291        return VINF_SUCCESS;
    292292    AssertMsgFailed(("DISCoreOne failed to GCPtrInstr=%RGv rc=%Rrc\n", GCPtrInstr, rc));
    293     return VERR_INTERNAL_ERROR;
     293    return VERR_EM_INTERNAL_DISAS_ERROR;
    294294}
    295295
  • trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

    r39302 r39402  
    154154/** Used to shut up GCC warnings about variables that 'may be used uninitialized'
    155155 * due to GCC lacking knowledge about the value range of a switch. */
    156 #define IEM_NOT_REACHED_DEFAULT_CASE_RET() default: AssertFailedReturn(VERR_INTERNAL_ERROR_4)
     156#define IEM_NOT_REACHED_DEFAULT_CASE_RET() default: AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE)
    157157
    158158/**
  • trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp

    r39178 r39402  
    9595    AssertReturn(   (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) != IOMMMIO_FLAGS_WRITE_PASSTHRU
    9696                 || (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) <= IOMMMIO_FLAGS_WRITE_DWORD_QWORD_READ_MISSING,
    97                  VERR_INTERNAL_ERROR_5);
    98     AssertReturn(cbValue != 0 && cbValue <= 16, VERR_INTERNAL_ERROR_4);
     97                 VERR_IOM_MMIO_IPE_1);
     98    AssertReturn(cbValue != 0 && cbValue <= 16, VERR_IOM_MMIO_IPE_2);
    9999    RTGCPHYS const GCPhysStart  = GCPhys; NOREF(GCPhysStart);
    100100    bool const     fReadMissing = (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) >= IOMMMIO_FLAGS_WRITE_DWORD_READ_MISSING;
     
    189189                break;
    190190            default:
    191                 AssertFailedReturn(VERR_INTERNAL_ERROR_3);
     191                AssertFailedReturn(VERR_IOM_MMIO_IPE_3);
    192192        }
    193193        if (offAccess)
     
    296296    AssertReturn(   (pRange->fFlags & IOMMMIO_FLAGS_READ_MODE) == IOMMMIO_FLAGS_READ_DWORD
    297297                 || (pRange->fFlags & IOMMMIO_FLAGS_READ_MODE) == IOMMMIO_FLAGS_READ_DWORD_QWORD,
    298                  VERR_INTERNAL_ERROR_5);
    299     AssertReturn(cbValue != 0 && cbValue <= 16, VERR_INTERNAL_ERROR_4);
     298                 VERR_IOM_MMIO_IPE_1);
     299    AssertReturn(cbValue != 0 && cbValue <= 16, VERR_IOM_MMIO_IPE_2);
    300300    RTGCPHYS const GCPhysStart = GCPhys; NOREF(GCPhysStart);
    301301
     
    17881788     */
    17891789    PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhys);
    1790     AssertMsg(pRange, ("Handlers and page tables are out of sync or something! GCPhys=%RGp cbValue=%d\n", GCPhys, cbValue));
    17911790    if (!pRange)
    17921791    {
     1792        AssertMsgFailed(("Handlers and page tables are out of sync or something! GCPhys=%RGp cbValue=%d\n", GCPhys, cbValue));
    17931793        IOM_UNLOCK(pVM);
    1794         return VERR_INTERNAL_ERROR;
     1794        return VERR_IOM_MMIO_RANGE_NOT_FOUND;
    17951795    }
    17961796#ifdef VBOX_WITH_STATISTICS
     
    19171917     */
    19181918    PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhys);
    1919     AssertMsg(pRange, ("Handlers and page tables are out of sync or something! GCPhys=%RGp cbValue=%d\n", GCPhys, cbValue));
    19201919    if (!pRange)
    19211920    {
     1921        AssertMsgFailed(("Handlers and page tables are out of sync or something! GCPhys=%RGp cbValue=%d\n", GCPhys, cbValue));
    19221922        IOM_UNLOCK(pVM);
    1923         return VERR_INTERNAL_ERROR;
     1923        return VERR_IOM_MMIO_RANGE_NOT_FOUND;
    19241924    }
    19251925#ifdef VBOX_WITH_STATISTICS
  • trunk/src/VBox/VMM/VMMAll/PDMAll.cpp

    r39060 r39402  
    352352{
    353353#ifdef IN_RING3
    354     int rc = PDMCritSectEnter(&pVM->pdm.s.CritSect, VERR_INTERNAL_ERROR);
     354    int rc = PDMCritSectEnter(&pVM->pdm.s.CritSect, VERR_IGNORED);
    355355#else
    356356    int rc = PDMCritSectEnter(&pVM->pdm.s.CritSect, VERR_GENERAL_FAILURE);
     
    402402        Log(("PDMVMMDevHeapR3ToGCPhys: pv=%p pvVMMDevHeap=%p cbVMMDevHeap=%#x\n",
    403403             pv, pVM->pdm.s.pvVMMDevHeap, pVM->pdm.s.cbVMMDevHeap));
    404         return VERR_INTERNAL_ERROR_3;
     404        return VERR_PDM_DEV_HEAP_R3_TO_GCPHYS;
    405405    }
    406406
  • trunk/src/VBox/VMM/VMMAll/PDMAllCritSect.cpp

    r39078 r39402  
    482482VMMR3DECL(int) PDMR3CritSectEnterEx(PPDMCRITSECT pCritSect, bool fCallRing3)
    483483{
    484     int rc = PDMCritSectEnter(pCritSect, VERR_INTERNAL_ERROR);
     484    int rc = PDMCritSectEnter(pCritSect, VERR_IGNORED);
    485485    if (    rc == VINF_SUCCESS
    486486        &&  fCallRing3
  • trunk/src/VBox/VMM/VMMAll/PGMAll.cpp

    r39078 r39402  
    996996    {
    997997        pShwPage = pgmPoolGetPage(pPool, pPdpe->u & X86_PDPE_PG_MASK);
    998         AssertReturn(pShwPage, VERR_INTERNAL_ERROR);
     998        AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED);
    999999        Assert((pPdpe->u & X86_PDPE_PG_MASK) == pShwPage->Core.Key);
    10001000
     
    10321032    /* Fetch the pgm pool shadow descriptor. */
    10331033    PPGMPOOLPAGE pShwPde = pgmPoolGetPage(pVM->pgm.s.CTX_SUFF(pPool), pPdpt->a[iPdPt].u & X86_PDPE_PG_MASK);
    1034     AssertReturn(pShwPde, VERR_INTERNAL_ERROR);
     1034    AssertReturn(pShwPde, VERR_PGM_POOL_GET_PAGE_FAILED);
    10351035
    10361036    *ppShwPde = pShwPde;
     
    10951095    {
    10961096        pShwPage = pgmPoolGetPage(pPool, pPml4e->u & X86_PML4E_PG_MASK);
    1097         AssertReturn(pShwPage, VERR_INTERNAL_ERROR);
     1097        AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED);
    10981098
    10991099        pgmPoolCacheUsed(pPool, pShwPage);
     
    11321132    {
    11331133        pShwPage = pgmPoolGetPage(pPool, pPdpe->u & X86_PDPE_PG_MASK);
    1134         AssertReturn(pShwPage, VERR_INTERNAL_ERROR);
     1134        AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED);
    11351135
    11361136        pgmPoolCacheUsed(pPool, pShwPage);
     
    11601160    PGM_LOCK_ASSERT_OWNER(pVCpu->CTX_SUFF(pVM));
    11611161
    1162     AssertReturn(pPml4e, VERR_INTERNAL_ERROR);
     1162    AssertReturn(pPml4e, VERR_PGM_PML4_MAPPING);
    11631163    if (ppPml4e)
    11641164        *ppPml4e = (PX86PML4E)pPml4e;
     
    11721172    PPGMPOOL        pPool    = pVM->pgm.s.CTX_SUFF(pPool);
    11731173    PPGMPOOLPAGE    pShwPage = pgmPoolGetPage(pPool, pPml4e->u & X86_PML4E_PG_MASK);
    1174     AssertReturn(pShwPage, VERR_INTERNAL_ERROR);
     1174    AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED);
    11751175
    11761176    const unsigned  iPdPt = (GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_AMD64;
     
    11801180
    11811181    pShwPage = pgmPoolGetPage(pPool, pPdpt->a[iPdPt].u & X86_PDPE_PG_MASK);
    1182     AssertReturn(pShwPage, VERR_INTERNAL_ERROR);
     1182    AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED);
    11831183
    11841184    *ppPD = (PX86PDPAE)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPage);
     
    12281228    {
    12291229        pShwPage = pgmPoolGetPage(pPool, pPml4e->u & EPT_PML4E_PG_MASK);
    1230         AssertReturn(pShwPage, VERR_INTERNAL_ERROR);
     1230        AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED);
    12311231
    12321232        pgmPoolCacheUsed(pPool, pShwPage);
     
    12571257    {
    12581258        pShwPage = pgmPoolGetPage(pPool, pPdpe->u & EPT_PDPTE_PG_MASK);
    1259         AssertReturn(pShwPage, VERR_INTERNAL_ERROR);
     1259        AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED);
    12601260
    12611261        pgmPoolCacheUsed(pPool, pShwPage);
     
    13231323
    13241324        default:
    1325             AssertMsgFailedReturn(("%d\n", enmShwPagingMode), VERR_INTERNAL_ERROR_5);
     1325            AssertMsgFailedReturn(("%d\n", enmShwPagingMode), VERR_IPE_NOT_REACHED_DEFAULT_CASE);
    13261326    }
    13271327    return rc;
     
    20542054        }
    20552055        AssertRCReturn(rc, rc);
    2056         AssertRCSuccessReturn(rc, VERR_INTERNAL_ERROR);
     2056        AssertRCSuccessReturn(rc, VERR_IPE_UNEXPECTED_INFO_STATUS);
    20572057    }
    20582058
  • trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

    r39301 r39402  
    588588    rc = pgmShwSyncPaePDPtr(pVCpu, pvFault, X86_PDPE_P, &pPDDst);       /* RW, US and A are reserved in PAE mode. */
    589589#   endif
    590     AssertMsgReturn(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_INTERNAL_ERROR_4);
     590    AssertMsgReturn(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
    591591
    592592#  elif PGM_SHW_TYPE == PGM_TYPE_AMD64
     
    599599    rc = pgmShwSyncLongModePDPtr(pVCpu, pvFault, GstWalk.Pml4e.u, GstWalk.Pdpe.u, &pPDDst);
    600600#   endif
    601     AssertMsgReturn(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_INTERNAL_ERROR_4);
     601    AssertMsgReturn(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
    602602
    603603#  elif PGM_SHW_TYPE == PGM_TYPE_EPT
     
    605605    PEPTPD          pPDDst;
    606606    rc = pgmShwGetEPTPDPtr(pVCpu, pvFault, NULL, &pPDDst);
    607     AssertMsgReturn(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_INTERNAL_ERROR_4);
     607    AssertMsgReturn(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
    608608#  endif
    609609    Assert(pPDDst);
     
    10911091    NOREF(uErr); NOREF(pRegFrame); NOREF(pvFault);
    10921092    AssertReleaseMsgFailed(("Shw=%d Gst=%d is not implemented!\n", PGM_GST_TYPE, PGM_SHW_TYPE));
    1093     return VERR_INTERNAL_ERROR;
     1093    return VERR_PGM_NOT_USED_IN_MODE;
    10941094# endif
    10951095}
     
    22762276    NOREF(PdeSrc);
    22772277    AssertReleaseMsgFailed(("Shw=%d Gst=%d is not implemented!\n", PGM_GST_TYPE, PGM_SHW_TYPE));
    2278     return VERR_INTERNAL_ERROR;
     2278    return VERR_PGM_NOT_USED_IN_MODE;
    22792279#endif
    22802280}
     
    27412741        }
    27422742        else
    2743             AssertMsgFailedReturn(("rc=%Rrc\n", rc), VERR_INTERNAL_ERROR);
     2743            AssertMsgFailedReturn(("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
    27442744        /** @todo Why do we bother preserving X86_PDE_AVL_MASK here?
    27452745         * Both PGM_PDFLAGS_MAPPING and PGM_PDFLAGS_TRACK_DIRTY should be
     
    31703170    {
    31713171       STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,SyncPT), a);
    3172        AssertMsgFailedReturn(("rc=%Rrc\n", rc), VERR_INTERNAL_ERROR);
     3172       AssertMsgFailedReturn(("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
    31733173    }
    31743174
     
    32193219    NOREF(iPDSrc); NOREF(pPDSrc);
    32203220    AssertReleaseMsgFailed(("Shw=%d Gst=%d is not implemented!\n", PGM_SHW_TYPE, PGM_GST_TYPE));
    3221     return VERR_INTERNAL_ERROR;
     3221    return VERR_PGM_NOT_USED_IN_MODE;
    32223222#endif
    32233223}
     
    35533553
    35543554    AssertReleaseMsgFailed(("Shw=%d Gst=%d is not implemented!\n", PGM_GST_TYPE, PGM_SHW_TYPE));
    3555     return VERR_INTERNAL_ERROR;
     3555    return VERR_PGM_NOT_USED_IN_MODE;
    35563556#endif /* PGM_SHW_TYPE == PGM_TYPE_EPT || PGM_SHW_TYPE == PGM_TYPE_NESTED */
    35573557}
     
    44354435    pgmLock(pVM);
    44364436    PPGMPAGE    pPageCR3 = pgmPhysGetPage(pVM, GCPhysCR3);
    4437     AssertReturn(pPageCR3, VERR_INTERNAL_ERROR_2);
     4437    AssertReturn(pPageCR3, VERR_PGM_INVALID_CR3_ADDR);
    44384438    HCPhysGuestCR3 = PGM_PAGE_GET_HCPHYS(pPageCR3);
    44394439    /** @todo this needs some reworking wrt. locking?  */
     
    44844484                    pgmLock(pVM);
    44854485                    PPGMPAGE    pPage  = pgmPhysGetPage(pVM, GCPhys);
    4486                     AssertReturn(pPage, VERR_INTERNAL_ERROR_2);
     4486                    AssertReturn(pPage, VERR_PGM_INVALID_PDPE_ADDR);
    44874487                    HCPhys = PGM_PAGE_GET_HCPHYS(pPage);
    44884488#  if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
  • trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp

    r39078 r39402  
    727727            }
    728728            AssertMsgFailed(("whu?\n"));
    729             rc = VERR_INTERNAL_ERROR;
     729            rc = VERR_PGM_PHYS_HANDLER_IPE;
    730730        }
    731731        else
     
    792792
    793793                    Assert(pCur3 == pCur2);
    794                     rc = VERR_INTERNAL_ERROR;
     794                    rc = VERR_PGM_PHYS_HANDLER_IPE;
    795795                }
    796796                else
     
    915915            default:
    916916                AssertMsgFailed(("Invalid type %d! Corruption!\n",  pCur->enmType));
    917                 rc = VERR_INTERNAL_ERROR;
     917                rc = VERR_PGM_PHYS_HANDLER_IPE;
    918918                break;
    919919        }
  • trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp

    r39294 r39402  
    116116                }
    117117            }
    118             else if (RT_UNLIKELY(rc == VERR_INTERNAL_ERROR))
     118            else if (RT_UNLIKELY(rc == VERR_EM_INTERNAL_DISAS_ERROR))
    119119                return rc;
    120120            break;
     
    135135            AssertMsgFailedReturn(("enmProt=%d iPage=%d GCPhysFault=%RGp\n",
    136136                                   pRom->aPages[iPage].enmProt, iPage, GCPhysFault),
    137                                   VERR_INTERNAL_ERROR);
     137                                  VERR_IPE_NOT_REACHED_DEFAULT_CASE);
    138138    }
    139139
     
    513513                            &&  pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages),
    514514                            ("%u\n", pVM->pgm.s.cHandyPages),
    515                             VERR_INTERNAL_ERROR);
     515                            VERR_PGM_HANDY_PAGE_IPE);
    516516        }
    517517        else
     
    10291029    if (idChunk == NIL_GMM_CHUNKID)
    10301030    {
    1031         AssertMsgReturn(PGM_PAGE_GET_PAGEID(pPage) == NIL_GMM_PAGEID, ("pPage=%R[pgmpage]\n", pPage), VERR_INTERNAL_ERROR_2);
     1031        AssertMsgReturn(PGM_PAGE_GET_PAGEID(pPage) == NIL_GMM_PAGEID, ("pPage=%R[pgmpage]\n", pPage), VERR_PGM_PHYS_PAGE_MAP_IPE_1);
    10321032        if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2)
    10331033        {
    10341034            /* Lookup the MMIO2 range and use pvR3 to calc the address. */
    10351035            PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
    1036             AssertMsgReturn(pRam || !pRam->pvR3, ("pRam=%p pPage=%R[pgmpage]\n", pRam, pPage), VERR_INTERNAL_ERROR_2);
     1036            AssertMsgReturn(pRam || !pRam->pvR3, ("pRam=%p pPage=%R[pgmpage]\n", pRam, pPage), VERR_PGM_PHYS_PAGE_MAP_IPE_2);
    10371037            *ppv = (void *)((uintptr_t)pRam->pvR3 + (uintptr_t)((GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK) - pRam->GCPhys));
    10381038        }
     
    10431043             * them, that would also avoid this mess. It would actually be kind of
    10441044             * elegant... */
    1045             AssertLogRelMsgFailedReturn(("%RGp\n", GCPhys), VERR_INTERNAL_ERROR_3);
     1045            AssertLogRelMsgFailedReturn(("%RGp\n", GCPhys), VERR_PGM_MAP_MMIO2_ALIAS_MMIO);
    10461046        }
    10471047        else
    10481048        {
    10491049            /** @todo handle MMIO2 */
    1050             AssertMsgReturn(PGM_PAGE_IS_ZERO(pPage), ("pPage=%R[pgmpage]\n", pPage), VERR_INTERNAL_ERROR_2);
     1050            AssertMsgReturn(PGM_PAGE_IS_ZERO(pPage), ("pPage=%R[pgmpage]\n", pPage), VERR_PGM_PHYS_PAGE_MAP_IPE_3);
    10511051            AssertMsgReturn(PGM_PAGE_GET_HCPHYS(pPage) == pVM->pgm.s.HCPhysZeroPg,
    10521052                            ("pPage=%R[pgmpage]\n", pPage),
    1053                             VERR_INTERNAL_ERROR_2);
     1053                            VERR_PGM_PHYS_PAGE_MAP_IPE_4);
    10541054            *ppv = pVM->pgm.s.CTXALLSUFF(pvZeroPg);
    10551055        }
     
    13061306{
    13071307    int rc;
    1308     AssertReturn(pPage, VERR_INTERNAL_ERROR);
     1308    AssertReturn(pPage, VERR_PGM_PHYS_NULL_PAGE_PARAM);
    13091309    PGM_LOCK_ASSERT_OWNER(pVM);
    13101310    pVM->pgm.s.cDeprecatedPageLocks++;
     
    14361436{
    14371437    int rc;
    1438     AssertReturn(pPage, VERR_INTERNAL_ERROR);
     1438    AssertReturn(pPage, VERR_PGM_PHYS_NULL_PAGE_PARAM);
    14391439    PGM_LOCK_ASSERT_OWNER(pVM);
    14401440
     
    14991499int pgmPhysGCPhys2CCPtrInternalReadOnly(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, const void **ppv, PPGMPAGEMAPLOCK pLock)
    15001500{
    1501     AssertReturn(pPage, VERR_INTERNAL_ERROR);
     1501    AssertReturn(pPage, VERR_PGM_PHYS_NULL_PAGE_PARAM);
    15021502    PGM_LOCK_ASSERT_OWNER(pVM);
    15031503    Assert(PGM_PAGE_GET_HCPHYS(pPage) != 0);
  • trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

    r39078 r39402  
    20302030        LogFlow(("pgmPoolCacheFreeOne: refuse CR3 mapping\n"));
    20312031        pgmPoolCacheUsed(pPool, pPage);
    2032         AssertLogRelReturn(iLoop < 8192, VERR_INTERNAL_ERROR);
     2032        AssertLogRelReturn(iLoop < 8192, VERR_PGM_POOL_TOO_MANY_LOOPS);
    20332033    }
    20342034
     
    49984998        }
    49994999        iNew = pPool->iFreeHead;
    5000         AssertReleaseReturn(iNew != NIL_PGMPOOL_IDX, VERR_INTERNAL_ERROR);
     5000        AssertReleaseReturn(iNew != NIL_PGMPOOL_IDX, VERR_PGM_POOL_IPE);
    50015001    }
    50025002
  • trunk/src/VBox/VMM/VMMAll/PGMAllShw.h

    r39078 r39402  
    306306
    307307        PPGMMAPPING pMap = pgmGetMapping(pVM, (RTGCPTR)GCPtr);
    308         AssertMsgReturn(pMap, ("GCPtr=%RGv\n", GCPtr), VERR_INTERNAL_ERROR);
     308        AssertMsgReturn(pMap, ("GCPtr=%RGv\n", GCPtr), VERR_PGM_MAPPING_IPE);
    309309#  if PGM_SHW_TYPE == PGM_TYPE_32BIT
    310310        pPT = pMap->aPTs[(GCPtr - pMap->GCPtr) >> X86_PD_SHIFT].CTX_SUFF(pPT);
  • trunk/src/VBox/VMM/VMMAll/TMAll.cpp

    r39078 r39402  
    13471347    AssertMsgFailed(("Failed waiting for stable state. state=%d (%s)\n", pTimer->enmState, R3STRING(pTimer->pszDesc)));
    13481348    STAM_PROFILE_STOP(&pVM->tm.s.CTX_SUFF_Z(StatTimerSet), a);
    1349     return VERR_INTERNAL_ERROR;
     1349    return VERR_TM_TIMER_UNSTABLE_STATE;
    13501350}
    13511351
     
    16931693        {
    16941694            AssertMsgFailed(("Failed waiting for stable state. state=%d (%s)\n", pTimer->enmState, R3STRING(pTimer->pszDesc)));
    1695             rc = VERR_INTERNAL_ERROR;
     1695            rc = VERR_TM_TIMER_UNSTABLE_STATE;
    16961696            tmTimerSetRelativeNowWorker(pVM, enmClock, pu64Now);
    16971697            break;
     
    19221922    AssertMsgFailed(("Failed waiting for stable state. state=%d (%s)\n", pTimer->enmState, R3STRING(pTimer->pszDesc)));
    19231923    STAM_PROFILE_STOP(&pVM->tm.s.CTX_SUFF_Z(StatTimerStop), a);
    1924     return VERR_INTERNAL_ERROR;
     1924    return VERR_TM_TIMER_UNSTABLE_STATE;
    19251925}
    19261926
     
    21192119        default:
    21202120            AssertMsgFailed(("Invalid enmClock=%d\n", pTimer->enmClock));
    2121             return VERR_INTERNAL_ERROR;
     2121            return VERR_TM_TIMER_BAD_CLOCK;
    21222122    }
    21232123}
     
    21492149        default:
    21502150            AssertMsgFailed(("Invalid enmClock=%d\n", pTimer->enmClock));
    2151             return VERR_INTERNAL_ERROR;
     2151            return VERR_TM_TIMER_BAD_CLOCK;
    21522152    }
    21532153}
     
    21792179        default:
    21802180            AssertMsgFailed(("Invalid enmClock=%d\n", pTimer->enmClock));
    2181             return VERR_INTERNAL_ERROR;
     2181            return VERR_TM_TIMER_BAD_CLOCK;
    21822182    }
    21832183}
  • trunk/src/VBox/VMM/VMMAll/TMAllCpu.cpp

    r39078 r39402  
    7676    }
    7777    AssertFailed();
    78     return VERR_INTERNAL_ERROR;
     78    return VERR_TM_TSC_ALREADY_TICKING;
    7979}
    8080
     
    9696    }
    9797    AssertFailed();
    98     return VERR_INTERNAL_ERROR;
     98    return VERR_TM_TSC_ALREADY_PAUSED;
    9999}
    100100
  • trunk/src/VBox/VMM/VMMAll/TMAllVirtual.cpp

    r39078 r39402  
    964964 * Worker for TMR3PauseClocks.
    965965 *
    966  * @returns VINF_SUCCESS or VERR_INTERNAL_ERROR (asserted).
     966 * @returns VINF_SUCCESS or VERR_TM_VIRTUAL_TICKING_IPE (asserted).
    967967 * @param   pVM     The VM handle.
    968968 */
     
    970970{
    971971    uint32_t c = ASMAtomicDecU32(&pVM->tm.s.cVirtualTicking);
    972     AssertMsgReturn(c < pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_INTERNAL_ERROR);
     972    AssertMsgReturn(c < pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_TM_VIRTUAL_TICKING_IPE);
    973973    if (c == 0)
    974974    {
     
    984984 * Worker for TMR3ResumeClocks.
    985985 *
    986  * @returns VINF_SUCCESS or VERR_INTERNAL_ERROR (asserted).
     986 * @returns VINF_SUCCESS or VERR_TM_VIRTUAL_TICKING_IPE (asserted).
    987987 * @param   pVM     The VM handle.
    988988 */
     
    990990{
    991991    uint32_t c = ASMAtomicIncU32(&pVM->tm.s.cVirtualTicking);
    992     AssertMsgReturn(c <= pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_INTERNAL_ERROR);
     992    AssertMsgReturn(c <= pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_TM_VIRTUAL_TICKING_IPE);
    993993    if (c == 1)
    994994    {
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