Changeset 39402 in vbox for trunk/src/VBox/VMM/VMMAll
- Timestamp:
- Nov 23, 2011 4:25:04 PM (13 years ago)
- Location:
- trunk/src/VBox/VMM/VMMAll
- Files:
-
- 14 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r39078 r39402 218 218 * @returns VBox status code, see SELMToFlatEx and EMInterpretDisasOneEx for 219 219 * details. 220 * @retval VERR_ INTERNAL_ERROR on DISCoreOneEx failure.220 * @retval VERR_EM_INTERNAL_DISAS_ERROR on DISCoreOneEx failure. 221 221 * 222 222 * @param pVM The VM handle. … … 246 246 * 247 247 * @returns VBox status code. 248 * @retval VERR_ INTERNAL_ERROR on DISCoreOneEx failure.248 * @retval VERR_EM_INTERNAL_DISAS_ERROR on DISCoreOneEx failure. 249 249 * 250 250 * @param pVM The VM handle. … … 291 291 return VINF_SUCCESS; 292 292 AssertMsgFailed(("DISCoreOne failed to GCPtrInstr=%RGv rc=%Rrc\n", GCPtrInstr, rc)); 293 return VERR_ INTERNAL_ERROR;293 return VERR_EM_INTERNAL_DISAS_ERROR; 294 294 } 295 295 -
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r39302 r39402 154 154 /** Used to shut up GCC warnings about variables that 'may be used uninitialized' 155 155 * due to GCC lacking knowledge about the value range of a switch. */ 156 #define IEM_NOT_REACHED_DEFAULT_CASE_RET() default: AssertFailedReturn(VERR_I NTERNAL_ERROR_4)156 #define IEM_NOT_REACHED_DEFAULT_CASE_RET() default: AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE) 157 157 158 158 /** -
trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
r39178 r39402 95 95 AssertReturn( (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) != IOMMMIO_FLAGS_WRITE_PASSTHRU 96 96 || (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) <= IOMMMIO_FLAGS_WRITE_DWORD_QWORD_READ_MISSING, 97 VERR_I NTERNAL_ERROR_5);98 AssertReturn(cbValue != 0 && cbValue <= 16, VERR_I NTERNAL_ERROR_4);97 VERR_IOM_MMIO_IPE_1); 98 AssertReturn(cbValue != 0 && cbValue <= 16, VERR_IOM_MMIO_IPE_2); 99 99 RTGCPHYS const GCPhysStart = GCPhys; NOREF(GCPhysStart); 100 100 bool const fReadMissing = (pRange->fFlags & IOMMMIO_FLAGS_WRITE_MODE) >= IOMMMIO_FLAGS_WRITE_DWORD_READ_MISSING; … … 189 189 break; 190 190 default: 191 AssertFailedReturn(VERR_I NTERNAL_ERROR_3);191 AssertFailedReturn(VERR_IOM_MMIO_IPE_3); 192 192 } 193 193 if (offAccess) … … 296 296 AssertReturn( (pRange->fFlags & IOMMMIO_FLAGS_READ_MODE) == IOMMMIO_FLAGS_READ_DWORD 297 297 || (pRange->fFlags & IOMMMIO_FLAGS_READ_MODE) == IOMMMIO_FLAGS_READ_DWORD_QWORD, 298 VERR_I NTERNAL_ERROR_5);299 AssertReturn(cbValue != 0 && cbValue <= 16, VERR_I NTERNAL_ERROR_4);298 VERR_IOM_MMIO_IPE_1); 299 AssertReturn(cbValue != 0 && cbValue <= 16, VERR_IOM_MMIO_IPE_2); 300 300 RTGCPHYS const GCPhysStart = GCPhys; NOREF(GCPhysStart); 301 301 … … 1788 1788 */ 1789 1789 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhys); 1790 AssertMsg(pRange, ("Handlers and page tables are out of sync or something! GCPhys=%RGp cbValue=%d\n", GCPhys, cbValue));1791 1790 if (!pRange) 1792 1791 { 1792 AssertMsgFailed(("Handlers and page tables are out of sync or something! GCPhys=%RGp cbValue=%d\n", GCPhys, cbValue)); 1793 1793 IOM_UNLOCK(pVM); 1794 return VERR_I NTERNAL_ERROR;1794 return VERR_IOM_MMIO_RANGE_NOT_FOUND; 1795 1795 } 1796 1796 #ifdef VBOX_WITH_STATISTICS … … 1917 1917 */ 1918 1918 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhys); 1919 AssertMsg(pRange, ("Handlers and page tables are out of sync or something! GCPhys=%RGp cbValue=%d\n", GCPhys, cbValue));1920 1919 if (!pRange) 1921 1920 { 1921 AssertMsgFailed(("Handlers and page tables are out of sync or something! GCPhys=%RGp cbValue=%d\n", GCPhys, cbValue)); 1922 1922 IOM_UNLOCK(pVM); 1923 return VERR_I NTERNAL_ERROR;1923 return VERR_IOM_MMIO_RANGE_NOT_FOUND; 1924 1924 } 1925 1925 #ifdef VBOX_WITH_STATISTICS -
trunk/src/VBox/VMM/VMMAll/PDMAll.cpp
r39060 r39402 352 352 { 353 353 #ifdef IN_RING3 354 int rc = PDMCritSectEnter(&pVM->pdm.s.CritSect, VERR_I NTERNAL_ERROR);354 int rc = PDMCritSectEnter(&pVM->pdm.s.CritSect, VERR_IGNORED); 355 355 #else 356 356 int rc = PDMCritSectEnter(&pVM->pdm.s.CritSect, VERR_GENERAL_FAILURE); … … 402 402 Log(("PDMVMMDevHeapR3ToGCPhys: pv=%p pvVMMDevHeap=%p cbVMMDevHeap=%#x\n", 403 403 pv, pVM->pdm.s.pvVMMDevHeap, pVM->pdm.s.cbVMMDevHeap)); 404 return VERR_ INTERNAL_ERROR_3;404 return VERR_PDM_DEV_HEAP_R3_TO_GCPHYS; 405 405 } 406 406 -
trunk/src/VBox/VMM/VMMAll/PDMAllCritSect.cpp
r39078 r39402 482 482 VMMR3DECL(int) PDMR3CritSectEnterEx(PPDMCRITSECT pCritSect, bool fCallRing3) 483 483 { 484 int rc = PDMCritSectEnter(pCritSect, VERR_I NTERNAL_ERROR);484 int rc = PDMCritSectEnter(pCritSect, VERR_IGNORED); 485 485 if ( rc == VINF_SUCCESS 486 486 && fCallRing3 -
trunk/src/VBox/VMM/VMMAll/PGMAll.cpp
r39078 r39402 996 996 { 997 997 pShwPage = pgmPoolGetPage(pPool, pPdpe->u & X86_PDPE_PG_MASK); 998 AssertReturn(pShwPage, VERR_ INTERNAL_ERROR);998 AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED); 999 999 Assert((pPdpe->u & X86_PDPE_PG_MASK) == pShwPage->Core.Key); 1000 1000 … … 1032 1032 /* Fetch the pgm pool shadow descriptor. */ 1033 1033 PPGMPOOLPAGE pShwPde = pgmPoolGetPage(pVM->pgm.s.CTX_SUFF(pPool), pPdpt->a[iPdPt].u & X86_PDPE_PG_MASK); 1034 AssertReturn(pShwPde, VERR_ INTERNAL_ERROR);1034 AssertReturn(pShwPde, VERR_PGM_POOL_GET_PAGE_FAILED); 1035 1035 1036 1036 *ppShwPde = pShwPde; … … 1095 1095 { 1096 1096 pShwPage = pgmPoolGetPage(pPool, pPml4e->u & X86_PML4E_PG_MASK); 1097 AssertReturn(pShwPage, VERR_ INTERNAL_ERROR);1097 AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED); 1098 1098 1099 1099 pgmPoolCacheUsed(pPool, pShwPage); … … 1132 1132 { 1133 1133 pShwPage = pgmPoolGetPage(pPool, pPdpe->u & X86_PDPE_PG_MASK); 1134 AssertReturn(pShwPage, VERR_ INTERNAL_ERROR);1134 AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED); 1135 1135 1136 1136 pgmPoolCacheUsed(pPool, pShwPage); … … 1160 1160 PGM_LOCK_ASSERT_OWNER(pVCpu->CTX_SUFF(pVM)); 1161 1161 1162 AssertReturn(pPml4e, VERR_ INTERNAL_ERROR);1162 AssertReturn(pPml4e, VERR_PGM_PML4_MAPPING); 1163 1163 if (ppPml4e) 1164 1164 *ppPml4e = (PX86PML4E)pPml4e; … … 1172 1172 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); 1173 1173 PPGMPOOLPAGE pShwPage = pgmPoolGetPage(pPool, pPml4e->u & X86_PML4E_PG_MASK); 1174 AssertReturn(pShwPage, VERR_ INTERNAL_ERROR);1174 AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED); 1175 1175 1176 1176 const unsigned iPdPt = (GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_AMD64; … … 1180 1180 1181 1181 pShwPage = pgmPoolGetPage(pPool, pPdpt->a[iPdPt].u & X86_PDPE_PG_MASK); 1182 AssertReturn(pShwPage, VERR_ INTERNAL_ERROR);1182 AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED); 1183 1183 1184 1184 *ppPD = (PX86PDPAE)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPage); … … 1228 1228 { 1229 1229 pShwPage = pgmPoolGetPage(pPool, pPml4e->u & EPT_PML4E_PG_MASK); 1230 AssertReturn(pShwPage, VERR_ INTERNAL_ERROR);1230 AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED); 1231 1231 1232 1232 pgmPoolCacheUsed(pPool, pShwPage); … … 1257 1257 { 1258 1258 pShwPage = pgmPoolGetPage(pPool, pPdpe->u & EPT_PDPTE_PG_MASK); 1259 AssertReturn(pShwPage, VERR_ INTERNAL_ERROR);1259 AssertReturn(pShwPage, VERR_PGM_POOL_GET_PAGE_FAILED); 1260 1260 1261 1261 pgmPoolCacheUsed(pPool, pShwPage); … … 1323 1323 1324 1324 default: 1325 AssertMsgFailedReturn(("%d\n", enmShwPagingMode), VERR_I NTERNAL_ERROR_5);1325 AssertMsgFailedReturn(("%d\n", enmShwPagingMode), VERR_IPE_NOT_REACHED_DEFAULT_CASE); 1326 1326 } 1327 1327 return rc; … … 2054 2054 } 2055 2055 AssertRCReturn(rc, rc); 2056 AssertRCSuccessReturn(rc, VERR_I NTERNAL_ERROR);2056 AssertRCSuccessReturn(rc, VERR_IPE_UNEXPECTED_INFO_STATUS); 2057 2057 } 2058 2058 -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r39301 r39402 588 588 rc = pgmShwSyncPaePDPtr(pVCpu, pvFault, X86_PDPE_P, &pPDDst); /* RW, US and A are reserved in PAE mode. */ 589 589 # endif 590 AssertMsgReturn(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_I NTERNAL_ERROR_4);590 AssertMsgReturn(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS); 591 591 592 592 # elif PGM_SHW_TYPE == PGM_TYPE_AMD64 … … 599 599 rc = pgmShwSyncLongModePDPtr(pVCpu, pvFault, GstWalk.Pml4e.u, GstWalk.Pdpe.u, &pPDDst); 600 600 # endif 601 AssertMsgReturn(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_I NTERNAL_ERROR_4);601 AssertMsgReturn(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS); 602 602 603 603 # elif PGM_SHW_TYPE == PGM_TYPE_EPT … … 605 605 PEPTPD pPDDst; 606 606 rc = pgmShwGetEPTPDPtr(pVCpu, pvFault, NULL, &pPDDst); 607 AssertMsgReturn(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_I NTERNAL_ERROR_4);607 AssertMsgReturn(rc == VINF_SUCCESS, ("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS); 608 608 # endif 609 609 Assert(pPDDst); … … 1091 1091 NOREF(uErr); NOREF(pRegFrame); NOREF(pvFault); 1092 1092 AssertReleaseMsgFailed(("Shw=%d Gst=%d is not implemented!\n", PGM_GST_TYPE, PGM_SHW_TYPE)); 1093 return VERR_ INTERNAL_ERROR;1093 return VERR_PGM_NOT_USED_IN_MODE; 1094 1094 # endif 1095 1095 } … … 2276 2276 NOREF(PdeSrc); 2277 2277 AssertReleaseMsgFailed(("Shw=%d Gst=%d is not implemented!\n", PGM_GST_TYPE, PGM_SHW_TYPE)); 2278 return VERR_ INTERNAL_ERROR;2278 return VERR_PGM_NOT_USED_IN_MODE; 2279 2279 #endif 2280 2280 } … … 2741 2741 } 2742 2742 else 2743 AssertMsgFailedReturn(("rc=%Rrc\n", rc), VERR_INTERNAL_ERROR);2743 AssertMsgFailedReturn(("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS); 2744 2744 /** @todo Why do we bother preserving X86_PDE_AVL_MASK here? 2745 2745 * Both PGM_PDFLAGS_MAPPING and PGM_PDFLAGS_TRACK_DIRTY should be … … 3170 3170 { 3171 3171 STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,SyncPT), a); 3172 AssertMsgFailedReturn(("rc=%Rrc\n", rc), VERR_INTERNAL_ERROR);3172 AssertMsgFailedReturn(("rc=%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS); 3173 3173 } 3174 3174 … … 3219 3219 NOREF(iPDSrc); NOREF(pPDSrc); 3220 3220 AssertReleaseMsgFailed(("Shw=%d Gst=%d is not implemented!\n", PGM_SHW_TYPE, PGM_GST_TYPE)); 3221 return VERR_ INTERNAL_ERROR;3221 return VERR_PGM_NOT_USED_IN_MODE; 3222 3222 #endif 3223 3223 } … … 3553 3553 3554 3554 AssertReleaseMsgFailed(("Shw=%d Gst=%d is not implemented!\n", PGM_GST_TYPE, PGM_SHW_TYPE)); 3555 return VERR_ INTERNAL_ERROR;3555 return VERR_PGM_NOT_USED_IN_MODE; 3556 3556 #endif /* PGM_SHW_TYPE == PGM_TYPE_EPT || PGM_SHW_TYPE == PGM_TYPE_NESTED */ 3557 3557 } … … 4435 4435 pgmLock(pVM); 4436 4436 PPGMPAGE pPageCR3 = pgmPhysGetPage(pVM, GCPhysCR3); 4437 AssertReturn(pPageCR3, VERR_ INTERNAL_ERROR_2);4437 AssertReturn(pPageCR3, VERR_PGM_INVALID_CR3_ADDR); 4438 4438 HCPhysGuestCR3 = PGM_PAGE_GET_HCPHYS(pPageCR3); 4439 4439 /** @todo this needs some reworking wrt. locking? */ … … 4484 4484 pgmLock(pVM); 4485 4485 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhys); 4486 AssertReturn(pPage, VERR_ INTERNAL_ERROR_2);4486 AssertReturn(pPage, VERR_PGM_INVALID_PDPE_ADDR); 4487 4487 HCPhys = PGM_PAGE_GET_HCPHYS(pPage); 4488 4488 # if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) -
trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp
r39078 r39402 727 727 } 728 728 AssertMsgFailed(("whu?\n")); 729 rc = VERR_ INTERNAL_ERROR;729 rc = VERR_PGM_PHYS_HANDLER_IPE; 730 730 } 731 731 else … … 792 792 793 793 Assert(pCur3 == pCur2); 794 rc = VERR_ INTERNAL_ERROR;794 rc = VERR_PGM_PHYS_HANDLER_IPE; 795 795 } 796 796 else … … 915 915 default: 916 916 AssertMsgFailed(("Invalid type %d! Corruption!\n", pCur->enmType)); 917 rc = VERR_ INTERNAL_ERROR;917 rc = VERR_PGM_PHYS_HANDLER_IPE; 918 918 break; 919 919 } -
trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp
r39294 r39402 116 116 } 117 117 } 118 else if (RT_UNLIKELY(rc == VERR_ INTERNAL_ERROR))118 else if (RT_UNLIKELY(rc == VERR_EM_INTERNAL_DISAS_ERROR)) 119 119 return rc; 120 120 break; … … 135 135 AssertMsgFailedReturn(("enmProt=%d iPage=%d GCPhysFault=%RGp\n", 136 136 pRom->aPages[iPage].enmProt, iPage, GCPhysFault), 137 VERR_I NTERNAL_ERROR);137 VERR_IPE_NOT_REACHED_DEFAULT_CASE); 138 138 } 139 139 … … 513 513 && pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages), 514 514 ("%u\n", pVM->pgm.s.cHandyPages), 515 VERR_ INTERNAL_ERROR);515 VERR_PGM_HANDY_PAGE_IPE); 516 516 } 517 517 else … … 1029 1029 if (idChunk == NIL_GMM_CHUNKID) 1030 1030 { 1031 AssertMsgReturn(PGM_PAGE_GET_PAGEID(pPage) == NIL_GMM_PAGEID, ("pPage=%R[pgmpage]\n", pPage), VERR_ INTERNAL_ERROR_2);1031 AssertMsgReturn(PGM_PAGE_GET_PAGEID(pPage) == NIL_GMM_PAGEID, ("pPage=%R[pgmpage]\n", pPage), VERR_PGM_PHYS_PAGE_MAP_IPE_1); 1032 1032 if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2) 1033 1033 { 1034 1034 /* Lookup the MMIO2 range and use pvR3 to calc the address. */ 1035 1035 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys); 1036 AssertMsgReturn(pRam || !pRam->pvR3, ("pRam=%p pPage=%R[pgmpage]\n", pRam, pPage), VERR_ INTERNAL_ERROR_2);1036 AssertMsgReturn(pRam || !pRam->pvR3, ("pRam=%p pPage=%R[pgmpage]\n", pRam, pPage), VERR_PGM_PHYS_PAGE_MAP_IPE_2); 1037 1037 *ppv = (void *)((uintptr_t)pRam->pvR3 + (uintptr_t)((GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK) - pRam->GCPhys)); 1038 1038 } … … 1043 1043 * them, that would also avoid this mess. It would actually be kind of 1044 1044 * elegant... */ 1045 AssertLogRelMsgFailedReturn(("%RGp\n", GCPhys), VERR_ INTERNAL_ERROR_3);1045 AssertLogRelMsgFailedReturn(("%RGp\n", GCPhys), VERR_PGM_MAP_MMIO2_ALIAS_MMIO); 1046 1046 } 1047 1047 else 1048 1048 { 1049 1049 /** @todo handle MMIO2 */ 1050 AssertMsgReturn(PGM_PAGE_IS_ZERO(pPage), ("pPage=%R[pgmpage]\n", pPage), VERR_ INTERNAL_ERROR_2);1050 AssertMsgReturn(PGM_PAGE_IS_ZERO(pPage), ("pPage=%R[pgmpage]\n", pPage), VERR_PGM_PHYS_PAGE_MAP_IPE_3); 1051 1051 AssertMsgReturn(PGM_PAGE_GET_HCPHYS(pPage) == pVM->pgm.s.HCPhysZeroPg, 1052 1052 ("pPage=%R[pgmpage]\n", pPage), 1053 VERR_ INTERNAL_ERROR_2);1053 VERR_PGM_PHYS_PAGE_MAP_IPE_4); 1054 1054 *ppv = pVM->pgm.s.CTXALLSUFF(pvZeroPg); 1055 1055 } … … 1306 1306 { 1307 1307 int rc; 1308 AssertReturn(pPage, VERR_ INTERNAL_ERROR);1308 AssertReturn(pPage, VERR_PGM_PHYS_NULL_PAGE_PARAM); 1309 1309 PGM_LOCK_ASSERT_OWNER(pVM); 1310 1310 pVM->pgm.s.cDeprecatedPageLocks++; … … 1436 1436 { 1437 1437 int rc; 1438 AssertReturn(pPage, VERR_ INTERNAL_ERROR);1438 AssertReturn(pPage, VERR_PGM_PHYS_NULL_PAGE_PARAM); 1439 1439 PGM_LOCK_ASSERT_OWNER(pVM); 1440 1440 … … 1499 1499 int pgmPhysGCPhys2CCPtrInternalReadOnly(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, const void **ppv, PPGMPAGEMAPLOCK pLock) 1500 1500 { 1501 AssertReturn(pPage, VERR_ INTERNAL_ERROR);1501 AssertReturn(pPage, VERR_PGM_PHYS_NULL_PAGE_PARAM); 1502 1502 PGM_LOCK_ASSERT_OWNER(pVM); 1503 1503 Assert(PGM_PAGE_GET_HCPHYS(pPage) != 0); -
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r39078 r39402 2030 2030 LogFlow(("pgmPoolCacheFreeOne: refuse CR3 mapping\n")); 2031 2031 pgmPoolCacheUsed(pPool, pPage); 2032 AssertLogRelReturn(iLoop < 8192, VERR_ INTERNAL_ERROR);2032 AssertLogRelReturn(iLoop < 8192, VERR_PGM_POOL_TOO_MANY_LOOPS); 2033 2033 } 2034 2034 … … 4998 4998 } 4999 4999 iNew = pPool->iFreeHead; 5000 AssertReleaseReturn(iNew != NIL_PGMPOOL_IDX, VERR_ INTERNAL_ERROR);5000 AssertReleaseReturn(iNew != NIL_PGMPOOL_IDX, VERR_PGM_POOL_IPE); 5001 5001 } 5002 5002 -
trunk/src/VBox/VMM/VMMAll/PGMAllShw.h
r39078 r39402 306 306 307 307 PPGMMAPPING pMap = pgmGetMapping(pVM, (RTGCPTR)GCPtr); 308 AssertMsgReturn(pMap, ("GCPtr=%RGv\n", GCPtr), VERR_ INTERNAL_ERROR);308 AssertMsgReturn(pMap, ("GCPtr=%RGv\n", GCPtr), VERR_PGM_MAPPING_IPE); 309 309 # if PGM_SHW_TYPE == PGM_TYPE_32BIT 310 310 pPT = pMap->aPTs[(GCPtr - pMap->GCPtr) >> X86_PD_SHIFT].CTX_SUFF(pPT); -
trunk/src/VBox/VMM/VMMAll/TMAll.cpp
r39078 r39402 1347 1347 AssertMsgFailed(("Failed waiting for stable state. state=%d (%s)\n", pTimer->enmState, R3STRING(pTimer->pszDesc))); 1348 1348 STAM_PROFILE_STOP(&pVM->tm.s.CTX_SUFF_Z(StatTimerSet), a); 1349 return VERR_ INTERNAL_ERROR;1349 return VERR_TM_TIMER_UNSTABLE_STATE; 1350 1350 } 1351 1351 … … 1693 1693 { 1694 1694 AssertMsgFailed(("Failed waiting for stable state. state=%d (%s)\n", pTimer->enmState, R3STRING(pTimer->pszDesc))); 1695 rc = VERR_ INTERNAL_ERROR;1695 rc = VERR_TM_TIMER_UNSTABLE_STATE; 1696 1696 tmTimerSetRelativeNowWorker(pVM, enmClock, pu64Now); 1697 1697 break; … … 1922 1922 AssertMsgFailed(("Failed waiting for stable state. state=%d (%s)\n", pTimer->enmState, R3STRING(pTimer->pszDesc))); 1923 1923 STAM_PROFILE_STOP(&pVM->tm.s.CTX_SUFF_Z(StatTimerStop), a); 1924 return VERR_ INTERNAL_ERROR;1924 return VERR_TM_TIMER_UNSTABLE_STATE; 1925 1925 } 1926 1926 … … 2119 2119 default: 2120 2120 AssertMsgFailed(("Invalid enmClock=%d\n", pTimer->enmClock)); 2121 return VERR_ INTERNAL_ERROR;2121 return VERR_TM_TIMER_BAD_CLOCK; 2122 2122 } 2123 2123 } … … 2149 2149 default: 2150 2150 AssertMsgFailed(("Invalid enmClock=%d\n", pTimer->enmClock)); 2151 return VERR_ INTERNAL_ERROR;2151 return VERR_TM_TIMER_BAD_CLOCK; 2152 2152 } 2153 2153 } … … 2179 2179 default: 2180 2180 AssertMsgFailed(("Invalid enmClock=%d\n", pTimer->enmClock)); 2181 return VERR_ INTERNAL_ERROR;2181 return VERR_TM_TIMER_BAD_CLOCK; 2182 2182 } 2183 2183 } -
trunk/src/VBox/VMM/VMMAll/TMAllCpu.cpp
r39078 r39402 76 76 } 77 77 AssertFailed(); 78 return VERR_ INTERNAL_ERROR;78 return VERR_TM_TSC_ALREADY_TICKING; 79 79 } 80 80 … … 96 96 } 97 97 AssertFailed(); 98 return VERR_ INTERNAL_ERROR;98 return VERR_TM_TSC_ALREADY_PAUSED; 99 99 } 100 100 -
trunk/src/VBox/VMM/VMMAll/TMAllVirtual.cpp
r39078 r39402 964 964 * Worker for TMR3PauseClocks. 965 965 * 966 * @returns VINF_SUCCESS or VERR_ INTERNAL_ERROR(asserted).966 * @returns VINF_SUCCESS or VERR_TM_VIRTUAL_TICKING_IPE (asserted). 967 967 * @param pVM The VM handle. 968 968 */ … … 970 970 { 971 971 uint32_t c = ASMAtomicDecU32(&pVM->tm.s.cVirtualTicking); 972 AssertMsgReturn(c < pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_ INTERNAL_ERROR);972 AssertMsgReturn(c < pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_TM_VIRTUAL_TICKING_IPE); 973 973 if (c == 0) 974 974 { … … 984 984 * Worker for TMR3ResumeClocks. 985 985 * 986 * @returns VINF_SUCCESS or VERR_ INTERNAL_ERROR(asserted).986 * @returns VINF_SUCCESS or VERR_TM_VIRTUAL_TICKING_IPE (asserted). 987 987 * @param pVM The VM handle. 988 988 */ … … 990 990 { 991 991 uint32_t c = ASMAtomicIncU32(&pVM->tm.s.cVirtualTicking); 992 AssertMsgReturn(c <= pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_ INTERNAL_ERROR);992 AssertMsgReturn(c <= pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_TM_VIRTUAL_TICKING_IPE); 993 993 if (c == 1) 994 994 {
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