Changeset 39970 in vbox for trunk/src/VBox

Timestamp:

Feb 2, 2012 9:29:12 PM (13 years ago)

Author:

vboxsync

Message:

IEM: Implemented bswap. Fixed verification of INS.

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/IEMAll.cpp (modified) (3 diffs)
• VMMAll/IEMAllAImpl.asm (modified) (1 diff)
• VMMAll/IEMAllCImplStrInstr.cpp.h (modified) (1 diff)
• VMMAll/IEMAllInstructions.cpp.h (modified) (5 diffs)
• include/IEMInternal.h (modified) (1 diff)
• testcase/tstIEMCheckMc.cpp (modified) (2 diffs)

trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

@@ -5002 +5002 @@
 #define IEM_MC_STORE_GREG_U64_CONST                     IEM_MC_STORE_GREG_U64
 #define IEM_MC_CLEAR_HIGH_GREG_U64(a_iGReg)             *(uint64_t *)iemGRegRef(pIemCpu, (a_iGReg)) &= UINT32_MAX
+#define IEM_MC_CLEAR_HIGH_GREG_U64_BY_REF(a_pu32Dst)    do { (a_pu32Dst)[1] = 0; } while (0)
 
 #define IEM_MC_REF_GREG_U8(a_pu8Dst, a_iGReg)           (a_pu8Dst) = iemGRegRefU8(pIemCpu, (a_iGReg))
 #define IEM_MC_REF_GREG_U16(a_pu16Dst, a_iGReg)         (a_pu16Dst) = (uint16_t *)iemGRegRef(pIemCpu, (a_iGReg))
-/** @todo User of IEM_MC_REF_GREG_U32 needs to clear the high bits on
- *        commit. */
+/** @todo User of IEM_MC_REF_GREG_U32 needs to clear the high bits on commit.
+ *        Use IEM_MC_CLEAR_HIGH_GREG_U64_BY_REF! */
 #define IEM_MC_REF_GREG_U32(a_pu32Dst, a_iGReg)         (a_pu32Dst) = (uint32_t *)iemGRegRef(pIemCpu, (a_iGReg))
 #define IEM_MC_REF_GREG_U64(a_pu64Dst, a_iGReg)         (a_pu64Dst) = (uint64_t *)iemGRegRef(pIemCpu, (a_iGReg))
@@ -5239 +5240 @@
     IEM_MC_RETURN_ON_FAILURE(iemOpHlpCalcRmEffAddr(pIemCpu, (bRm), &(a_GCPtrEff)))
 
+#define IEM_MC_CALL_VOID_AIMPL_1(a_pfn, a0)               (a_pfn)((a0))
 #define IEM_MC_CALL_VOID_AIMPL_2(a_pfn, a0, a1)           (a_pfn)((a0), (a1))
 #define IEM_MC_CALL_VOID_AIMPL_3(a_pfn, a0, a1, a2)       (a_pfn)((a0), (a1), (a2))
@@ -6000 +6002 @@
     }
     pIemCpu->cIOReads++;
-    *pu32Value = 0xffffffff;
+    *pu32Value = 0xcccccccc;
     return VINF_SUCCESS;
 }

trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm

@@ -1234 +1234 @@
 IEMIMPL_DIV_OP idiv, 0, (X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF)
 
+
+;
+; BSWAP. No flag changes.
+;
+; Each function takes one argument, pointer to the value to bswap
+; (input/output). They all return void.
+;
+BEGINPROC_FASTCALL iemAImpl_bswap_u16, 4
+        PROLOGUE_1_ARGS
+        mov     T0_32, [A0]             ; just in case any of the upper bits are used.
+        db 66h
+        bswap   T0_32
+        mov     [A0], T0_32
+        EPILOGUE_1_ARGS 0
+ENDPROC iemAImpl_bswap_u16
+
+BEGINPROC_FASTCALL iemAImpl_bswap_u32, 4
+        PROLOGUE_1_ARGS
+        mov     T0_32, [A0]
+        bswap   T0_32
+        mov     [A0], T0_32
+        EPILOGUE_1_ARGS 0
+ENDPROC iemAImpl_bswap_u32
+
+BEGINPROC_FASTCALL iemAImpl_bswap_u64, 4
+%ifdef RT_ARCH_AMD64
+        PROLOGUE_1_ARGS
+        mov     T0, [A0]
+        bswap   T0
+        mov     [A0], T0
+        EPILOGUE_1_ARGS 0
+%else
+        PROLOGUE_1_ARGS
+        mov     T0, [A0]
+        mov     T1, [A0 + 4]
+        bswap   T0
+        bswap   T1
+        mov     [A0 + 4], T0
+        mov     [A0], T1
+        EPILOGUE_1_ARGS 0
+%endif
+ENDPROC iemAImpl_bswap_u64
+

trunk/src/VBox/VMM/VMMAll/IEMAllCImplStrInstr.cpp.h

@@ -1158 +1158 @@
                 return rcStrict;
 
-            *puMem = u32Value;
+            *puMem = (OP_TYPE)u32Value;
             VBOXSTRICTRC rcStrict2 = iemMemCommitAndUnmap(pIemCpu, puMem, IEM_ACCESS_DATA_W);
             AssertLogRelReturn(rcStrict2 == VINF_SUCCESS, VERR_IEM_IPE_1); /* See non-rep version. */

trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h

@@ -4103 +4103 @@
 FNIEMOP_STUB(iemOp_Grp9);
 
-#if 0
+
 /**
  * Common 'bswap register' helper.
  */
-FNIEMOP_DEF_2(iemOpCommonBswapGReg, PCIEMOPUNARYSIZES, pImpl, uint8_t, iReg)
+FNIEMOP_DEF_1(iemOpCommonBswapGReg, uint8_t, iReg)
 {
     IEMOP_HLP_NO_LOCK_PREFIX();
@@ -4113 +4113 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(2, 0);
-            IEM_MC_ARG(uint16_t *,  pu16Dst, 0);
-            IEM_MC_ARG(uint32_t *,  pEFlags, 1);
-            IEM_MC_REF_GREG_U16(pu16Dst, iReg);
-            IEM_MC_REF_EFLAGS(pEFlags);
-            IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnNormalU16, pu16Dst, pEFlags);
+            IEM_MC_BEGIN(1, 0);
+            IEM_MC_ARG(uint32_t *,  pu32Dst, 0);
+            IEM_MC_REF_GREG_U32(pu32Dst, iReg);     /* Don't clear the high dword! */
+            IEM_MC_CALL_VOID_AIMPL_1(iemAImpl_bswap_u16, pu32Dst);
             IEM_MC_ADVANCE_RIP();
             IEM_MC_END();
@@ -4124 +4122 @@
 
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(2, 0);
+            IEM_MC_BEGIN(1, 0);
             IEM_MC_ARG(uint32_t *,  pu32Dst, 0);
-            IEM_MC_ARG(uint32_t *,  pEFlags, 1);
             IEM_MC_REF_GREG_U32(pu32Dst, iReg);
-            IEM_MC_REF_EFLAGS(pEFlags);
-            IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnNormalU32, pu32Dst, pEFlags);
+            IEM_MC_CLEAR_HIGH_GREG_U64_BY_REF(pu32Dst);
+            IEM_MC_CALL_VOID_AIMPL_1(iemAImpl_bswap_u32, pu32Dst);
             IEM_MC_ADVANCE_RIP();
             IEM_MC_END();
@@ -4135 +4132 @@
 
         case IEMMODE_64BIT:
-            IEM_MC_BEGIN(2, 0);
+            IEM_MC_BEGIN(1, 0);
             IEM_MC_ARG(uint64_t *,  pu64Dst, 0);
-            IEM_MC_ARG(uint32_t *,  pEFlags, 1);
             IEM_MC_REF_GREG_U64(pu64Dst, iReg);
-            IEM_MC_REF_EFLAGS(pEFlags);
-            IEM_MC_CALL_VOID_AIMPL_2(pImpl->pfnNormalU64, pu64Dst, pEFlags);
+            IEM_MC_CALL_VOID_AIMPL_1(iemAImpl_bswap_u64, pu64Dst);
             IEM_MC_ADVANCE_RIP();
             IEM_MC_END();
             return VINF_SUCCESS;
-    }
-    return VINF_SUCCESS;
+
+        IEM_NOT_REACHED_DEFAULT_CASE_RET();
+    }
 }
 
@@ -4153 +4149 @@
 {
     IEMOP_MNEMONIC("bswap rAX/r8");
-    return FNIEMOP_CALL_2(iemOpCommonUnaryGReg, &g_iemAImpl_inc, X86_GREG_xAX | pIemCpu->uRexReg);
-}
-
-
-#else
-FNIEMOP_STUB(iemOp_bswap_rAX_r8);
-#endif
+    return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xAX | pIemCpu->uRexReg);
+}
+
+
 /** Opcode 0x0f 0xc9. */
-FNIEMOP_STUB(iemOp_bswap_rCX_r9);
+FNIEMOP_DEF(iemOp_bswap_rCX_r9)
+{
+    IEMOP_MNEMONIC("bswap rCX/r9");
+    return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xCX | pIemCpu->uRexReg);
+}
+
+
 /** Opcode 0x0f 0xca. */
-FNIEMOP_STUB(iemOp_bswap_rDX_r10);
+FNIEMOP_DEF(iemOp_bswap_rDX_r10)
+{
+    IEMOP_MNEMONIC("bswap rDX/r9");
+    return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xDX | pIemCpu->uRexReg);
+}
+
+
 /** Opcode 0x0f 0xcb. */
-FNIEMOP_STUB(iemOp_bswap_rBX_r11);
+FNIEMOP_DEF(iemOp_bswap_rBX_r11)
+{
+    IEMOP_MNEMONIC("bswap rBX/r9");
+    return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xBX | pIemCpu->uRexReg);
+}
+
+
 /** Opcode 0x0f 0xcc. */
-FNIEMOP_STUB(iemOp_bswap_rSP_r12);
+FNIEMOP_DEF(iemOp_bswap_rSP_r12)
+{
+    IEMOP_MNEMONIC("bswap rSP/r12");
+    return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xSP | pIemCpu->uRexReg);
+}
+
+
 /** Opcode 0x0f 0xcd. */
-FNIEMOP_STUB(iemOp_bswap_rBP_r13);
+FNIEMOP_DEF(iemOp_bswap_rBP_r13)
+{
+    IEMOP_MNEMONIC("bswap rBP/r13");
+    return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xBP | pIemCpu->uRexReg);
+}
+
+
 /** Opcode 0x0f 0xce. */
-FNIEMOP_STUB(iemOp_bswap_rSI_r14);
+FNIEMOP_DEF(iemOp_bswap_rSI_r14)
+{
+    IEMOP_MNEMONIC("bswap rSI/r14");
+    return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xSI | pIemCpu->uRexReg);
+}
+
+
 /** Opcode 0x0f 0xcf. */
-FNIEMOP_STUB(iemOp_bswap_rDI_r15);
+FNIEMOP_DEF(iemOp_bswap_rDI_r15)
+{
+    IEMOP_MNEMONIC("bswap rDI/r15");
+    return FNIEMOP_CALL_1(iemOpCommonBswapGReg, X86_GREG_xDI | pIemCpu->uRexReg);
+}
+
+
 
 /** Opcode 0x0f 0xd0. */

trunk/src/VBox/VMM/include/IEMInternal.h

@@ -671 +671 @@
 /** @} */
 
+/** @name Byte Swap.
+ * @{  */
+IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t *pu32Dst)); /* Yes, 32-bit register access. */
+IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
+IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
+/** @}  */
+
 
 /** @name Function tables.

trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp

@@ -268 +268 @@
 #define IEM_MC_STORE_GREG_U64_CONST(a_iGReg, a_u64C)    do { AssertCompile((uint64_t)(a_u64C) == (a_u64C)); } while (0)
 #define IEM_MC_CLEAR_HIGH_GREG_U64(a_iGReg)             do {  } while (0)
+#define IEM_MC_CLEAR_HIGH_GREG_U64_BY_REF(a_pu32Dst)    do { CHK_PTYPE(uint32_t *, a_pu32Dst); } while (0)
 #define IEM_MC_REF_GREG_U8(a_pu8Dst, a_iGReg)           do { (a_pu8Dst)  = (uint8_t  *)((uintptr_t)0); CHK_PTYPE(uint8_t  *, a_pu8Dst);  } while (0)
 #define IEM_MC_REF_GREG_U16(a_pu16Dst, a_iGReg)         do { (a_pu16Dst) = (uint16_t *)((uintptr_t)0); CHK_PTYPE(uint16_t *, a_pu16Dst); } while (0)
@@ -372 +373 @@
 #define IEM_MC_MEM_COMMIT_AND_UNMAP(a_pvMem, a_fAccess)                 do {} while (0)
 #define IEM_MC_CALC_RM_EFF_ADDR(a_GCPtrEff, bRm)                        do { (a_GCPtrEff) = 0; CHK_GCPTR(a_GCPtrEff); } while (0)
+#define IEM_MC_CALL_VOID_AIMPL_1(a_pfn, a0)                             do {} while (0)
 #define IEM_MC_CALL_VOID_AIMPL_2(a_pfn, a0, a1)                         do {} while (0)
 #define IEM_MC_CALL_VOID_AIMPL_3(a_pfn, a0, a1, a2)                     do {} while (0)