Changeset 40017 in vbox for trunk

Timestamp:

Feb 7, 2012 11:50:01 AM (13 years ago)

Author:

vboxsync

Message:

fxsave + fxrstor is underways => laptop.

Location:

trunk/src/VBox/VMM/VMMAll

Files:

• IEMAllCImpl.cpp.h (modified) (1 diff)
• IEMAllInstructions.cpp.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h

@@ -3300 +3300 @@
 
 
+/**
+ * Implements 'FXSAVE'.
+ *
+ * @param   GCPtrEff        The address of the image.
+ * @param   enmEffOpSize    The operand size (only REX.W really matters).
+ */
+IEM_CIMPL_DEF_2(iemCImpl_fxsave, RTGCPTR, GCPtrEff, IEMMODE, enmEffOpSize)
+{
+    PCPUMCTX pCtx = pIemCpu->CTX_SUFF(pCtx);
+
+    if (pCtx->cr0 & (X86_CR0_TS | X86_CR0_EM))
+        return iemRaiseDeviceNotAvailable(pIemCpu);
+    if (GCPtrEff & 15) /** @todo \#AC */
+        return iemRaiseGeneralProtectionFault0(pIemCpu);
+
+
+    return VERR_IEM_INSTR_NOT_IMPLEMENTED;
+}
+
+
+/**
+ * Implements 'FXRSTOR'.
+ *
+ * @param   GCPtrEff        The address of the image.
+ * @param   enmEffOpSize    The operand size (only REX.W really matters).
+ */
+IEM_CIMPL_DEF_2(iemCImpl_fxrstor, RTGCPTR, GCPtrEff, IEMMODE, enmEffOpSize)
+{
+    PCPUMCTX pCtx = pIemCpu->CTX_SUFF(pCtx);
+
+    if (pCtx->cr0 & (X86_CR0_TS | X86_CR0_EM))
+        return iemRaiseDeviceNotAvailable(pIemCpu);
+    if (GCPtrEff & 15) /** @todo \#AC */
+        return iemRaiseGeneralProtectionFault0(pIemCpu);
+
+
+    return VERR_IEM_INSTR_NOT_IMPLEMENTED;
+}
+
 /** @} */
 

trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h

@@ -3360 +3360 @@
 }
 
+
 /** Opcode 0x0f 0xae mem/0. */
-FNIEMOP_STUB_1(iemOp_Grp15_fxsave,   uint8_t, bRm);
+FNIEMOP_DEF_1(iemOp_Grp15_fxsave,   uint8_t, bRm)
+{
+    IEMOP_MNEMONIC("fxsave m512");
+    IEMOP_HLP_NO_LOCK_PREFIX();
+    if (!IEM_IS_INTEL_CPUID_FEATURE_PRESENT_EDX(X86_CPUID_FEATURE_EDX_FXSR))
+        return IEMOP_RAISE_INVALID_LOCK_PREFIX();
+
+    IEM_MC_BEGIN(2, 1);
+    IEM_MC_ARG(RTGCPTR,         GCPtrEff,                                0);
+    IEM_MC_ARG_CONST(IEMMODE,   enmEffOpSize,/*=*/pIemCpu->enmEffOpSize, 1);
+    IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm);
+    IEM_MC_CALL_CIMPL_2(iemCImpl_fxsave, GCPtrEff, enmEffOpSize);
+    IEM_MC_END();
+    return VINF_SUCCESS;
+}
+
 
 /** Opcode 0x0f 0xae mem/1. */
-FNIEMOP_STUB_1(iemOp_Grp15_fxrstor,  uint8_t, bRm);
+FNIEMOP_DEF_1(iemOp_Grp15_fxrstor,  uint8_t, bRm)
+{
+    IEMOP_MNEMONIC("fxrstor m512");
+    IEMOP_HLP_NO_LOCK_PREFIX();
+    if (!IEM_IS_INTEL_CPUID_FEATURE_PRESENT_EDX(X86_CPUID_FEATURE_EDX_FXSR))
+        return IEMOP_RAISE_INVALID_LOCK_PREFIX();
+
+    IEM_MC_BEGIN(2, 1);
+    IEM_MC_ARG(RTGCPTR,         GCPtrEff,                                0);
+    IEM_MC_ARG_CONST(IEMMODE,   enmEffOpSize,/*=*/pIemCpu->enmEffOpSize, 1);
+    IEM_MC_CALC_RM_EFF_ADDR(GCPtrEff, bRm);
+    IEM_MC_CALL_CIMPL_2(iemCImpl_fxrstor, GCPtrEff, enmEffOpSize);
+    IEM_MC_END();
+    return VINF_SUCCESS;
+}
+
 
 /** Opcode 0x0f 0xae mem/2. */