Changeset 40089 in vbox for trunk/src

Timestamp:

Feb 13, 2012 1:40:24 AM (13 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

76227

Message:

0xdf 11/1 seems to behave like fxch st(i), while 0xdf 11/2 and 11/3 both behave like fstp st(i).

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/IEMAllInstructions.cpp.h (modified) (1 diff)
• testcase/tstX86-1A.asm (modified) (2 diffs)

trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h

@@ -11084 +11084 @@
         {
             case 0: return FNIEMOP_CALL_1(iemOp_ffreep_stN, bRm); /* ffree + pop afterwards, since forever according to AMD. */
-            case 1: return FNIEMOP_CALL(iemOp_fnop);
-            case 2: return FNIEMOP_CALL(iemOp_fnop);
-            case 3: return FNIEMOP_CALL(iemOp_fnop);
+            case 1: return FNIEMOP_CALL_1(iemOp_fxch_stN,   bRm); /* Reserved, behaves like FXCH ST(i) on intel. */
+            case 2: return FNIEMOP_CALL_1(iemOp_fstp_stN,   bRm); /* Reserved, behaves like FSTP ST(i) on intel. */
+            case 3: return FNIEMOP_CALL_1(iemOp_fstp_stN,   bRm); /* Reserved, behaves like FSTP ST(i) on intel. */
             case 4: if (bRm == 0xe0)
                         return FNIEMOP_CALL(iemOp_fnstsw_ax);

trunk/src/VBox/VMM/testcase/tstX86-1A.asm

@@ -1543 +1543 @@
         fld tword REF(.r80V1)
         fld qword REF(.r64V1)
+        fld dword REF(.r32V2)
         fld dword REF(.r32V1)
-        fld qword REF(.r64V1)
 
         ; Test the nop check.
         FpuNopEncoding fnop
-
-;FpuNopEncoding db 0dch, 0d8h
-;int3
-;db 0dch, 0d0h
-;        fld dword REF(.r32V2)
-;        fld dword REF(.r32V2)
-;        fld dword REF(.r32V2)
-;        fld dword REF(.r32V2)
-;fnclex
-;call SetFSW_C0_thru_C3
-;int3
-;db 0deh, 0d0h
-;db 0deh, 0d1h
-;db 0deh, 0d2h
-;db 0deh, 0d3h
-;int3
-
 
         ; the 0xd9 block
@@ -1716 +1699 @@
 
         ; the 0xdf block
-        FpuUnknownEncoding db 0dfh, 0c8h ; fnop?
-        FpuUnknownEncoding db 0dfh, 0c9h ; fnop?
-        FpuUnknownEncoding db 0dfh, 0cah ; fnop?
-        FpuUnknownEncoding db 0dfh, 0cbh ; fnop?
-        FpuUnknownEncoding db 0dfh, 0cch ; fnop?
-        FpuUnknownEncoding db 0dfh, 0cdh ; fnop?
-        FpuUnknownEncoding db 0dfh, 0ceh ; fnop?
-        FpuUnknownEncoding db 0dfh, 0cfh ; fnop?
-        FpuUnknownEncoding db 0dfh, 0d0h ; fnop?
-        FpuUnknownEncoding db 0dfh, 0d1h ; fnop?
-        FpuUnknownEncoding db 0dfh, 0d2h ; fnop?
-        FpuUnknownEncoding db 0dfh, 0d3h ; fnop?
-        FpuUnknownEncoding db 0dfh, 0d4h ; fnop?
-        FpuUnknownEncoding db 0dfh, 0d5h ; fnop?
-        FpuUnknownEncoding db 0dfh, 0d6h ; fnop?
-        FpuUnknownEncoding db 0dfh, 0d7h ; fnop?
-        FpuUnknownEncoding db 0dfh, 0d8h ; fnop?
-        FpuUnknownEncoding db 0dfh, 0d9h ; fnop?
-        FpuUnknownEncoding db 0dfh, 0dah ; fnop?
-        FpuUnknownEncoding db 0dfh, 0dbh ; fnop?
-        FpuUnknownEncoding db 0dfh, 0dch ; fnop?
-        FpuUnknownEncoding db 0dfh, 0ddh ; fnop?
-        FpuUnknownEncoding db 0dfh, 0deh ; fnop?
-        FpuUnknownEncoding db 0dfh, 0dfh ; fnop?
+        ;FpuUnknownEncoding db 0dfh, 0c8h ; fxch?
+        ;FpuUnknownEncoding db 0dfh, 0c9h ; fxch?
+        ;FpuUnknownEncoding db 0dfh, 0cah ; fxch?
+        ;FpuUnknownEncoding db 0dfh, 0cbh ; fxch?
+        ;FpuUnknownEncoding db 0dfh, 0cch ; fxch?
+        ;FpuUnknownEncoding db 0dfh, 0cdh ; fxch?
+        ;FpuUnknownEncoding db 0dfh, 0ceh ; fxch?
+        ;FpuUnknownEncoding db 0dfh, 0cfh ; fxch?
+        ;FpuUnknownEncoding db 0dfh, 0d0h ; fstp?
+        ;FpuUnknownEncoding db 0dfh, 0d1h ; fstp?
+        ;FpuUnknownEncoding db 0dfh, 0d2h ; fstp?
+        ;FpuUnknownEncoding db 0dfh, 0d3h ; fstp?
+        ;FpuUnknownEncoding db 0dfh, 0d4h ; fstp?
+        ;FpuUnknownEncoding db 0dfh, 0d5h ; fstp?
+        ;FpuUnknownEncoding db 0dfh, 0d6h ; fstp?
+        ;FpuUnknownEncoding db 0dfh, 0d7h ; fstp?
+        ;FpuUnknownEncoding db 0dfh, 0d8h ; fstp?
+        ;FpuUnknownEncoding db 0dfh, 0d9h ; fstp?
+        ;FpuUnknownEncoding db 0dfh, 0dah ; fstp?
+        ;FpuUnknownEncoding db 0dfh, 0dbh ; fstp?
+        ;FpuUnknownEncoding db 0dfh, 0dch ; fstp?
+        ;FpuUnknownEncoding db 0dfh, 0ddh ; fstp?
+        ;FpuUnknownEncoding db 0dfh, 0deh ; fstp?
+        ;FpuUnknownEncoding db 0dfh, 0dfh ; fstp?
         ShouldTrap X86_XCPT_UD, db 0dfh, 0e1h
         ShouldTrap X86_XCPT_UD, db 0dfh, 0e2h