- Timestamp:
- Aug 3, 2007 12:44:13 AM (17 years ago)
- Location:
- trunk
- Files:
-
- 42 edited
- 1 copied
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/pdmdev.h
r4012 r4014 26 26 #include <VBox/pdmthread.h> 27 27 #include <VBox/pdmifs.h> 28 #include <VBox/pdmins.h> 28 29 #include <VBox/iom.h> 29 30 #include <VBox/tm.h> … … 31 32 #include <VBox/cfgm.h> 32 33 #include <VBox/dbgf.h> 34 #include <VBox/mm.h> 33 35 #include <VBox/err.h> 34 36 #include <VBox/pci.h> … … 41 43 * @{ 42 44 */ 43 44 /** @def PDMBOTHCBDECL45 * Macro for declaring a callback which is static in HC and exported in GC.46 */47 #if defined(IN_GC) || defined(IN_RING0)48 # define PDMBOTHCBDECL(type) DECLEXPORT(type)49 #else50 # define PDMBOTHCBDECL(type) static type51 #endif52 53 45 54 46 /** … … 2904 2896 PDMDevHlpVMSetRuntimeError(pDevIns, fFatal, pszErrorID, "%s", pszError) 2905 2897 2906 /** @def PDMINS2DATA2907 * Converts a PDM Device or Driver instance pointer to a pointer to the instance data.2908 */2909 #define PDMINS2DATA(pIns, type) ( (type)(void *)&(pIns)->achInstanceData[0] )2910 2911 /** @def PDMINS2DATA_GCPTR2912 * Converts a PDM Device or Driver instance pointer to a GC pointer to the instance data.2913 */2914 #define PDMINS2DATA_GCPTR(pIns) ( (pIns)->pvInstanceDataGC )2915 2916 /** @def PDMINS2DATA_R3PTR2917 * Converts a PDM Device or Driver instance pointer to a HC pointer to the instance data.2918 */2919 #define PDMINS2DATA_R3PTR(pIns) ( (pIns)->pvInstanceDataR3 )2920 2921 /** @def PDMINS2DATA_R0PTR2922 * Converts a PDM Device or Driver instance pointer to a R0 pointer to the instance data.2923 */2924 #define PDMINS2DATA_R0PTR(pIns) ( (pIns)->pvInstanceDataR0 )2925 2926 2898 /** @def PDMDEVINS_2_GCPTR 2927 2899 * Converts a PDM Device instance pointer a GC PDM Device instance pointer. -
trunk/include/VBox/pdmdrv.h
r4012 r4014 26 26 #include <VBox/pdmthread.h> 27 27 #include <VBox/pdmifs.h> 28 #include <VBox/pdmins.h> 28 29 #include <VBox/tm.h> 29 30 #include <VBox/ssm.h> 30 31 #include <VBox/cfgm.h> 31 32 #include <VBox/dbgf.h> 33 #include <VBox/mm.h> 32 34 #include <VBox/err.h> 33 35 #include <iprt/stdarg.h> -
trunk/include/VBox/pdmins.h
r4012 r4014 1 1 /** @file 2 * PDM - Pluggable Device Manager, Devices.2 * PDM - Pluggable Device Manager, Common Instance Macros. 3 3 */ 4 4 … … 19 19 */ 20 20 21 #ifndef ___VBox_pdm dev_h22 #define ___VBox_pdm dev_h21 #ifndef ___VBox_pdmins_h 22 #define ___VBox_pdmins_h 23 23 24 #include <VBox/pdmqueue.h> 25 #include <VBox/pdmcritsect.h> 26 #include <VBox/pdmthread.h> 27 #include <VBox/pdmifs.h> 28 #include <VBox/iom.h> 29 #include <VBox/tm.h> 30 #include <VBox/ssm.h> 31 #include <VBox/cfgm.h> 32 #include <VBox/dbgf.h> 33 #include <VBox/err.h> 34 #include <VBox/pci.h> 35 #include <iprt/stdarg.h> 36 37 __BEGIN_DECLS 38 39 /** @defgroup grp_pdm_device Devices 24 /** @defgroup grp_pdm_ins Common Instance Macros 40 25 * @ingroup grp_pdm 41 26 * @{ … … 51 36 #endif 52 37 53 54 /**55 * Construct a device instance for a VM.56 *57 * @returns VBox status.58 * @param pDevIns The device instance data.59 * If the registration structure is needed, pDevIns->pDevReg points to it.60 * @param iInstance Instance number. Use this to figure out which registers and such to use.61 * The instance number is also found in pDevIns->iInstance, but since it's62 * likely to be freqently used PDM passes it as parameter.63 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration64 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's65 * primary usage will in this function it's passed as a parameter.66 */67 typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);68 /** Pointer to a FNPDMDEVCONSTRUCT() function. */69 typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;70 71 /**72 * Destruct a device instance.73 *74 * Most VM resources are freed by the VM. This callback is provided so that any non-VM75 * resources can be freed correctly.76 *77 * @returns VBox status.78 * @param pDevIns The device instance data.79 */80 typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);81 /** Pointer to a FNPDMDEVDESTRUCT() function. */82 typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;83 84 /**85 * Device relocation callback.86 *87 * When this callback is called the device instance data, and if the88 * device have a GC component, is being relocated, or/and the selectors89 * have been changed. The device must use the chance to perform the90 * necessary pointer relocations and data updates.91 *92 * Before the GC code is executed the first time, this function will be93 * called with a 0 delta so GC pointer calculations can be one in one place.94 *95 * @param pDevIns Pointer to the device instance.96 * @param offDelta The relocation delta relative to the old location.97 *98 * @remark A relocation CANNOT fail.99 */100 typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);101 /** Pointer to a FNPDMDEVRELOCATE() function. */102 typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;103 104 105 /**106 * Device I/O Control interface.107 *108 * This is used by external components, such as the COM interface, to109 * communicate with devices using a class wide interface or a device110 * specific interface.111 *112 * @returns VBox status code.113 * @param pDevIns Pointer to the device instance.114 * @param uFunction Function to perform.115 * @param pvIn Pointer to input data.116 * @param cbIn Size of input data.117 * @param pvOut Pointer to output data.118 * @param cbOut Size of output data.119 * @param pcbOut Where to store the actual size of the output data.120 */121 typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,122 void *pvIn, RTUINT cbIn,123 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);124 /** Pointer to a FNPDMDEVIOCTL() function. */125 typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;126 127 /**128 * Power On notification.129 *130 * @returns VBox status.131 * @param pDevIns The device instance data.132 */133 typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);134 /** Pointer to a FNPDMDEVPOWERON() function. */135 typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;136 137 /**138 * Reset notification.139 *140 * @returns VBox status.141 * @param pDevIns The device instance data.142 */143 typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);144 /** Pointer to a FNPDMDEVRESET() function. */145 typedef FNPDMDEVRESET *PFNPDMDEVRESET;146 147 /**148 * Suspend notification.149 *150 * @returns VBox status.151 * @param pDevIns The device instance data.152 */153 typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);154 /** Pointer to a FNPDMDEVSUSPEND() function. */155 typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;156 157 /**158 * Resume notification.159 *160 * @returns VBox status.161 * @param pDevIns The device instance data.162 */163 typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);164 /** Pointer to a FNPDMDEVRESUME() function. */165 typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;166 167 /**168 * Power Off notification.169 *170 * @param pDevIns The device instance data.171 */172 typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);173 /** Pointer to a FNPDMDEVPOWEROFF() function. */174 typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;175 176 /**177 * Attach command.178 *179 * This is called to let the device attach to a driver for a specified LUN180 * at runtime. This is not called during VM construction, the device181 * constructor have to attach to all the available drivers.182 *183 * This is like plugging in the keyboard or mouse after turning on the PC.184 *185 * @returns VBox status code.186 * @param pDevIns The device instance.187 * @param iLUN The logical unit which is being detached.188 */189 typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN);190 /** Pointer to a FNPDMDEVATTACH() function. */191 typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;192 193 /**194 * Detach notification.195 *196 * This is called when a driver is detaching itself from a LUN of the device.197 * The device should adjust it's state to reflect this.198 *199 * This is like unplugging the network cable to use it for the laptop or200 * something while the PC is still running.201 *202 * @param pDevIns The device instance.203 * @param iLUN The logical unit which is being detached.204 */205 typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN);206 /** Pointer to a FNPDMDEVDETACH() function. */207 typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;208 209 /**210 * Query the base interface of a logical unit.211 *212 * @returns VBOX status code.213 * @param pDevIns The device instance.214 * @param iLUN The logicial unit to query.215 * @param ppBase Where to store the pointer to the base interface of the LUN.216 */217 typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);218 /** Pointer to a FNPDMDEVQUERYINTERFACE() function. */219 typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;220 221 /**222 * Init complete notification.223 * This can be done to do communication with other devices and other224 * initialization which requires everything to be in place.225 *226 * @returns VBOX status code.227 * @param pDevIns The device instance.228 */229 typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);230 /** Pointer to a FNPDMDEVINITCOMPLETE() function. */231 typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;232 233 234 235 /** PDM Device Registration Structure,236 * This structure is used when registering a device from237 * VBoxInitDevices() in HC Ring-3. PDM will continue use till238 * the VM is terminated.239 */240 typedef struct PDMDEVREG241 {242 /** Structure version. PDM_DEVREG_VERSION defines the current version. */243 uint32_t u32Version;244 /** Device name. */245 char szDeviceName[32];246 /** Name of guest context module (no path).247 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */248 char szGCMod[32];249 /** Name of guest context module (no path).250 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */251 char szR0Mod[32];252 /** The description of the device. The UTF-8 string pointed to shall, like this structure,253 * remain unchanged from registration till VM destruction. */254 const char *pszDescription;255 256 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */257 RTUINT fFlags;258 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */259 RTUINT fClass;260 /** Maximum number of instances (per VM). */261 RTUINT cMaxInstances;262 /** Size of the instance data. */263 RTUINT cbInstance;264 265 /** Construct instance - required. */266 PFNPDMDEVCONSTRUCT pfnConstruct;267 /** Destruct instance - optional. */268 PFNPDMDEVDESTRUCT pfnDestruct;269 /** Relocation command - optional. */270 PFNPDMDEVRELOCATE pfnRelocate;271 /** I/O Control interface - optional. */272 PFNPDMDEVIOCTL pfnIOCtl;273 /** Power on notification - optional. */274 PFNPDMDEVPOWERON pfnPowerOn;275 /** Reset notification - optional. */276 PFNPDMDEVRESET pfnReset;277 /** Suspend notification - optional. */278 PFNPDMDEVSUSPEND pfnSuspend;279 /** Resume notification - optional. */280 PFNPDMDEVRESUME pfnResume;281 /** Attach command - optional. */282 PFNPDMDEVATTACH pfnAttach;283 /** Detach notification - optional. */284 PFNPDMDEVDETACH pfnDetach;285 /** Query a LUN base interface - optional. */286 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;287 /** Init complete notification - optional. */288 PFNPDMDEVINITCOMPLETE pfnInitComplete;289 /** Power off notification - optional. */290 PFNPDMDEVPOWEROFF pfnPowerOff;291 } PDMDEVREG;292 /** Pointer to a PDM Device Structure. */293 typedef PDMDEVREG *PPDMDEVREG;294 /** Const pointer to a PDM Device Structure. */295 typedef PDMDEVREG const *PCPDMDEVREG;296 297 /** Current DEVREG version number. */298 #define PDM_DEVREG_VERSION 0xc0010000299 300 /** PDM Device Flags.301 * @{ */302 /** This flag is used to indicate that the device has a GC component. */303 #define PDM_DEVREG_FLAGS_GC 0x00000001304 /** This flag is used to indicate that the device has a R0 component. */305 #define PDM_DEVREG_FLAGS_R0 0x00010000306 307 /** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT308 * The bit count for the current host. */309 #if HC_ARCH_BITS == 32310 # define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000002311 #elif HC_ARCH_BITS == 64312 # define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000004313 #else314 # error Unsupported HC_ARCH_BITS value.315 #endif316 /** The host bit count mask. */317 #define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000006318 319 /** The device support only 32-bit guests. */320 #define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000008321 /** The device support only 64-bit guests. */322 #define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000010323 /** The device support both 32-bit & 64-bit guests. */324 #define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000018325 /** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT326 * The guest bit count for the current compilation. */327 #if GC_ARCH_BITS == 32328 # define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32329 #elif GC_ARCH_BITS == 64330 # define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_64331 #else332 # error Unsupported GC_ARCH_BITS value.333 #endif334 /** The guest bit count mask. */335 #define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000018336 337 /** Indicates that the devices support PAE36 on a 32-bit guest. */338 #define PDM_DEVREG_FLAGS_PAE36 0x00000020339 /** @} */340 341 342 /** PDM Device Classes.343 * The order is important, lower bit earlier instantiation.344 * @{ */345 /** Architecture device. */346 #define PDM_DEVREG_CLASS_ARCH BIT(0)347 /** Architecture BIOS device. */348 #define PDM_DEVREG_CLASS_ARCH_BIOS BIT(1)349 /** PCI bus brigde. */350 #define PDM_DEVREG_CLASS_BUS_PCI BIT(2)351 /** ISA bus brigde. */352 #define PDM_DEVREG_CLASS_BUS_ISA BIT(3)353 /** Input device (mouse, keyboard, joystick,..). */354 #define PDM_DEVREG_CLASS_INPUT BIT(4)355 /** Interrupt controller (PIC). */356 #define PDM_DEVREG_CLASS_PIC BIT(5)357 /** Interval controoler (PIT). */358 #define PDM_DEVREG_CLASS_PIT BIT(6)359 /** RTC/CMOS. */360 #define PDM_DEVREG_CLASS_RTC BIT(7)361 /** DMA controller. */362 #define PDM_DEVREG_CLASS_DMA BIT(8)363 /** VMM Device. */364 #define PDM_DEVREG_CLASS_VMM_DEV BIT(9)365 /** Graphics device, like VGA. */366 #define PDM_DEVREG_CLASS_GRAPHICS BIT(10)367 /** Storage controller device. */368 #define PDM_DEVREG_CLASS_STORAGE BIT(11)369 /** Network interface controller. */370 #define PDM_DEVREG_CLASS_NETWORK BIT(12)371 /** Audio. */372 #define PDM_DEVREG_CLASS_AUDIO BIT(13)373 /** USB HIC. */374 #define PDM_DEVREG_CLASS_BUS_USB BIT(14)375 /** ACPI. */376 #define PDM_DEVREG_CLASS_ACPI BIT(15)377 /** Serial controller device. */378 #define PDM_DEVREG_CLASS_SERIAL BIT(16)379 /** Parallel controller device */380 #define PDM_DEVREG_CLASS_PARALLEL BIT(17)381 /** Misc devices (always last). */382 #define PDM_DEVREG_CLASS_MISC BIT(31)383 /** @} */384 385 386 /** @name IRQ Level for use with the *SetIrq APIs.387 * @{388 */389 /** Assert the IRQ (can assume value 1). */390 #define PDM_IRQ_LEVEL_HIGH BIT(0)391 /** Deassert the IRQ (can assume value 0). */392 #define PDM_IRQ_LEVEL_LOW 0393 /** flip-flop - assert and then deassert it again immediately. */394 #define PDM_IRQ_LEVEL_FLIP_FLOP (BIT(1) | PDM_IRQ_LEVEL_HIGH)395 /** @} */396 397 398 /**399 * PCI Bus registaration structure.400 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.401 */402 typedef struct PDMPCIBUSREG403 {404 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */405 uint32_t u32Version;406 407 /**408 * Registers the device with the default PCI bus.409 *410 * @returns VBox status code.411 * @param pDevIns Device instance of the PCI Bus.412 * @param pPciDev The PCI device structure.413 * Any PCI enabled device must keep this in it's instance data!414 * Fill in the PCI data config before registration, please.415 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.416 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.417 * If negative, the pci bus device will assign one.418 */419 DECLR3CALLBACKMEMBER(int, pfnRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));420 421 /**422 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.423 *424 * @returns VBox status code.425 * @param pDevIns Device instance of the PCI Bus.426 * @param pPciDev The PCI device structure.427 * @param iRegion The region number.428 * @param cbRegion Size of the region.429 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.430 * @param pfnCallback Callback for doing the mapping.431 */432 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));433 434 /**435 * Register PCI configuration space read/write callbacks.436 *437 * @param pDevIns Device instance of the PCI Bus.438 * @param pPciDev The PCI device structure.439 * @param pfnRead Pointer to the user defined PCI config read function.440 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)441 * PCI config read function. This way, user can decide when (and if)442 * to call default PCI config read function. Can be NULL.443 * @param pfnWrite Pointer to the user defined PCI config write function.444 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)445 * PCI config write function. This way, user can decide when (and if)446 * to call default PCI config write function. Can be NULL.447 * @thread EMT448 */449 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,450 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));451 452 /**453 * Set the IRQ for a PCI device.454 *455 * @param pDevIns Device instance of the PCI Bus.456 * @param pPciDev The PCI device structure.457 * @param iIrq IRQ number to set.458 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.459 */460 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));461 462 /**463 * Saves a state of the PCI device.464 *465 * @returns VBox status code.466 * @param pDevIns Device instance of the PCI Bus.467 * @param pPciDev Pointer to PCI device.468 * @param pSSMHandle The handle to save the state to.469 */470 DECLR3CALLBACKMEMBER(int, pfnSaveExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));471 472 /**473 * Loads a saved PCI device state.474 *475 * @returns VBox status code.476 * @param pDevIns Device instance of the PCI Bus.477 * @param pPciDev Pointer to PCI device.478 * @param pSSMHandle The handle to the saved state.479 */480 DECLR3CALLBACKMEMBER(int, pfnLoadExecHC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));481 482 /**483 * Called to perform the job of the bios.484 * This is only called for the first PCI Bus - it is expected to485 * service all the PCI buses.486 *487 * @returns VBox status.488 * @param pDevIns Device instance of the first bus.489 */490 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSHC,(PPDMDEVINS pDevIns));491 492 /** The name of the SetIrq GC entry point. */493 const char *pszSetIrqGC;494 495 /** The name of the SetIrq R0 entry point. */496 const char *pszSetIrqR0;497 498 } PDMPCIBUSREG;499 /** Pointer to a PCI bus registration structure. */500 typedef PDMPCIBUSREG *PPDMPCIBUSREG;501 502 /** Current PDMPCIBUSREG version number. */503 #define PDM_PCIBUSREG_VERSION 0xd0020000504 505 /**506 * PCI Bus GC helpers.507 */508 typedef struct PDMPCIHLPGC509 {510 /** Structure version. PDM_PCIHLPGC_VERSION defines the current version. */511 uint32_t u32Version;512 513 /**514 * Set an ISA IRQ.515 *516 * @param pDevIns PCI device instance.517 * @param iIrq IRQ number to set.518 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.519 * @thread EMT only.520 */521 DECLGCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));522 523 /**524 * Set an I/O-APIC IRQ.525 *526 * @param pDevIns PCI device instance.527 * @param iIrq IRQ number to set.528 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.529 * @thread EMT only.530 */531 DECLGCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));532 533 #ifdef VBOX_WITH_PDM_LOCK534 /**535 * Acquires the PDM lock.536 *537 * @returns VINF_SUCCESS on success.538 * @returns rc if we failed to acquire the lock.539 * @param pDevIns The PCI device instance.540 * @param rc What to return if we fail to acquire the lock.541 */542 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));543 544 /**545 * Releases the PDM lock.546 *547 * @param pDevIns The PCI device instance.548 */549 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));550 #endif551 /** Just a safety precaution. */552 uint32_t u32TheEnd;553 } PDMPCIHLPGC;554 /** Pointer to PCI helpers. */555 typedef GCPTRTYPE(PDMPCIHLPGC *) PPDMPCIHLPGC;556 /** Pointer to const PCI helpers. */557 typedef GCPTRTYPE(const PDMPCIHLPGC *) PCPDMPCIHLPGC;558 559 /** Current PDMPCIHLPR3 version number. */560 #define PDM_PCIHLPGC_VERSION 0xe1010000561 562 563 /**564 * PCI Bus R0 helpers.565 */566 typedef struct PDMPCIHLPR0567 {568 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */569 uint32_t u32Version;570 571 /**572 * Set an ISA IRQ.573 *574 * @param pDevIns PCI device instance.575 * @param iIrq IRQ number to set.576 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.577 * @thread EMT only.578 */579 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));580 581 /**582 * Set an I/O-APIC IRQ.583 *584 * @param pDevIns PCI device instance.585 * @param iIrq IRQ number to set.586 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.587 * @thread EMT only.588 */589 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));590 591 #ifdef VBOX_WITH_PDM_LOCK592 /**593 * Acquires the PDM lock.594 *595 * @returns VINF_SUCCESS on success.596 * @returns rc if we failed to acquire the lock.597 * @param pDevIns The PCI device instance.598 * @param rc What to return if we fail to acquire the lock.599 */600 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));601 602 /**603 * Releases the PDM lock.604 *605 * @param pDevIns The PCI device instance.606 */607 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));608 #endif609 610 /** Just a safety precaution. */611 uint32_t u32TheEnd;612 } PDMPCIHLPR0;613 /** Pointer to PCI helpers. */614 typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;615 /** Pointer to const PCI helpers. */616 typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;617 618 /** Current PDMPCIHLPR0 version number. */619 #define PDM_PCIHLPR0_VERSION 0xe1010000620 621 /**622 * PCI device helpers.623 */624 typedef struct PDMPCIHLPR3625 {626 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */627 uint32_t u32Version;628 629 /**630 * Set an ISA IRQ.631 *632 * @param pDevIns The PCI device instance.633 * @param iIrq IRQ number to set.634 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.635 * @thread EMT only.636 */637 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));638 639 /**640 * Set an I/O-APIC IRQ.641 *642 * @param pDevIns The PCI device instance.643 * @param iIrq IRQ number to set.644 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.645 * @thread EMT only.646 */647 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));648 649 #ifdef VBOX_WITH_PDM_LOCK650 /**651 * Acquires the PDM lock.652 *653 * @returns VINF_SUCCESS on success.654 * @returns Fatal error on failure.655 * @param pDevIns The PCI device instance.656 * @param rc Dummy for making the interface identical to the GC and R0 versions.657 */658 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));659 660 /**661 * Releases the PDM lock.662 *663 * @param pDevIns The PCI device instance.664 */665 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));666 #endif667 668 /**669 * Gets the address of the GC PCI Bus helpers.670 *671 * This should be called at both construction and relocation time672 * to obtain the correct address of the GC helpers.673 *674 * @returns GC pointer to the PCI Bus helpers.675 * @param pDevIns Device instance of the PCI Bus.676 * @thread EMT only.677 */678 DECLR3CALLBACKMEMBER(PCPDMPCIHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));679 680 /**681 * Gets the address of the R0 PCI Bus helpers.682 *683 * This should be called at both construction and relocation time684 * to obtain the correct address of the GC helpers.685 *686 * @returns R0 pointer to the PCI Bus helpers.687 * @param pDevIns Device instance of the PCI Bus.688 * @thread EMT only.689 */690 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));691 692 /** Just a safety precaution. */693 uint32_t u32TheEnd;694 } PDMPCIHLPR3;695 /** Pointer to PCI helpers. */696 typedef HCPTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;697 /** Pointer to const PCI helpers. */698 typedef HCPTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;699 700 /** Current PDMPCIHLPR3 version number. */701 #define PDM_PCIHLPR3_VERSION 0xf1010000702 703 704 /**705 * Programmable Interrupt Controller registration structure.706 */707 typedef struct PDMPICREG708 {709 /** Structure version number. PDM_PICREG_VERSION defines the current version. */710 uint32_t u32Version;711 712 /**713 * Set the an IRQ.714 *715 * @param pDevIns Device instance of the PIC.716 * @param iIrq IRQ number to set.717 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.718 */719 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));720 721 /**722 * Get a pending interrupt.723 *724 * @returns Pending interrupt number.725 * @param pDevIns Device instance of the PIC.726 */727 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));728 729 /** The name of the GC SetIrq entry point. */730 const char *pszSetIrqGC;731 /** The name of the GC GetInterrupt entry point. */732 const char *pszGetInterruptGC;733 734 /** The name of the R0 SetIrq entry point. */735 const char *pszSetIrqR0;736 /** The name of the R0 GetInterrupt entry point. */737 const char *pszGetInterruptR0;738 } PDMPICREG;739 /** Pointer to a PIC registration structure. */740 typedef PDMPICREG *PPDMPICREG;741 742 /** Current PDMPICREG version number. */743 #define PDM_PICREG_VERSION 0xe0020000744 745 /**746 * PIC GC helpers.747 */748 typedef struct PDMPICHLPGC749 {750 /** Structure version. PDM_PICHLPGC_VERSION defines the current version. */751 uint32_t u32Version;752 753 /**754 * Set the interrupt force action flag.755 *756 * @param pDevIns Device instance of the PIC.757 */758 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));759 760 /**761 * Clear the interrupt force action flag.762 *763 * @param pDevIns Device instance of the PIC.764 */765 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));766 767 #ifdef VBOX_WITH_PDM_LOCK768 /**769 * Acquires the PDM lock.770 *771 * @returns VINF_SUCCESS on success.772 * @returns rc if we failed to acquire the lock.773 * @param pDevIns The PIC device instance.774 * @param rc What to return if we fail to acquire the lock.775 */776 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));777 778 /**779 * Releases the PDM lock.780 *781 * @param pDevIns The PIC device instance.782 */783 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));784 #endif785 /** Just a safety precaution. */786 uint32_t u32TheEnd;787 } PDMPICHLPGC;788 789 /** Pointer to PIC GC helpers. */790 typedef GCPTRTYPE(PDMPICHLPGC *) PPDMPICHLPGC;791 /** Pointer to const PIC GC helpers. */792 typedef GCPTRTYPE(const PDMPICHLPGC *) PCPDMPICHLPGC;793 794 /** Current PDMPICHLPGC version number. */795 #define PDM_PICHLPGC_VERSION 0xfc010000796 797 798 /**799 * PIC R0 helpers.800 */801 typedef struct PDMPICHLPR0802 {803 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */804 uint32_t u32Version;805 806 /**807 * Set the interrupt force action flag.808 *809 * @param pDevIns Device instance of the PIC.810 */811 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));812 813 /**814 * Clear the interrupt force action flag.815 *816 * @param pDevIns Device instance of the PIC.817 */818 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));819 820 #ifdef VBOX_WITH_PDM_LOCK821 /**822 * Acquires the PDM lock.823 *824 * @returns VINF_SUCCESS on success.825 * @returns rc if we failed to acquire the lock.826 * @param pDevIns The PIC device instance.827 * @param rc What to return if we fail to acquire the lock.828 */829 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));830 831 /**832 * Releases the PDM lock.833 *834 * @param pDevIns The PCI device instance.835 */836 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));837 #endif838 839 /** Just a safety precaution. */840 uint32_t u32TheEnd;841 } PDMPICHLPR0;842 843 /** Pointer to PIC R0 helpers. */844 typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;845 /** Pointer to const PIC R0 helpers. */846 typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;847 848 /** Current PDMPICHLPR0 version number. */849 #define PDM_PICHLPR0_VERSION 0xfc010000850 851 /**852 * PIC HC helpers.853 */854 typedef struct PDMPICHLPR3855 {856 /** Structure version. PDM_PICHLP_VERSION defines the current version. */857 uint32_t u32Version;858 859 /**860 * Set the interrupt force action flag.861 *862 * @param pDevIns Device instance of the PIC.863 */864 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));865 866 /**867 * Clear the interrupt force action flag.868 *869 * @param pDevIns Device instance of the PIC.870 */871 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));872 873 #ifdef VBOX_WITH_PDM_LOCK874 /**875 * Acquires the PDM lock.876 *877 * @returns VINF_SUCCESS on success.878 * @returns Fatal error on failure.879 * @param pDevIns The PIC device instance.880 * @param rc Dummy for making the interface identical to the GC and R0 versions.881 */882 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));883 884 /**885 * Releases the PDM lock.886 *887 * @param pDevIns The PIC device instance.888 */889 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));890 #endif891 892 /**893 * Gets the address of the GC PIC helpers.894 *895 * This should be called at both construction and relocation time896 * to obtain the correct address of the GC helpers.897 *898 * @returns GC pointer to the PIC helpers.899 * @param pDevIns Device instance of the PIC.900 */901 DECLR3CALLBACKMEMBER(PCPDMPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));902 903 /**904 * Gets the address of the R0 PIC helpers.905 *906 * This should be called at both construction and relocation time907 * to obtain the correct address of the GC helpers.908 *909 * @returns R0 pointer to the PIC helpers.910 * @param pDevIns Device instance of the PIC.911 */912 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));913 914 /** Just a safety precaution. */915 uint32_t u32TheEnd;916 } PDMPICHLPR3;917 918 /** Pointer to PIC HC helpers. */919 typedef HCPTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;920 /** Pointer to const PIC HC helpers. */921 typedef HCPTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;922 923 /** Current PDMPICHLPR3 version number. */924 #define PDM_PICHLPR3_VERSION 0xf0010000925 926 927 928 /**929 * Advanced Programmable Interrupt Controller registration structure.930 */931 typedef struct PDMAPICREG932 {933 /** Structure version number. PDM_APICREG_VERSION defines the current version. */934 uint32_t u32Version;935 936 /**937 * Get a pending interrupt.938 *939 * @returns Pending interrupt number.940 * @param pDevIns Device instance of the APIC.941 */942 DECLR3CALLBACKMEMBER(int, pfnGetInterruptHC,(PPDMDEVINS pDevIns));943 944 /**945 * Set the APIC base.946 *947 * @param pDevIns Device instance of the APIC.948 * @param u64Base The new base.949 */950 DECLR3CALLBACKMEMBER(void, pfnSetBaseHC,(PPDMDEVINS pDevIns, uint64_t u64Base));951 952 /**953 * Get the APIC base.954 *955 * @returns Current base.956 * @param pDevIns Device instance of the APIC.957 */958 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseHC,(PPDMDEVINS pDevIns));959 960 /**961 * Set the TPR (task priority register?).962 *963 * @param pDevIns Device instance of the APIC.964 * @param u8TPR The new TPR.965 */966 DECLR3CALLBACKMEMBER(void, pfnSetTPRHC,(PPDMDEVINS pDevIns, uint8_t u8TPR));967 968 /**969 * Get the TPR (task priority register?).970 *971 * @returns The current TPR.972 * @param pDevIns Device instance of the APIC.973 */974 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRHC,(PPDMDEVINS pDevIns));975 976 /**977 * Private interface between the IOAPIC and APIC.978 *979 * This is a low-level, APIC/IOAPIC implementation specific interface980 * which is registered with PDM only because it makes life so much981 * simpler right now (GC bits). This is a bad bad hack! The correct982 * way of doing this would involve some way of querying GC interfaces983 * and relocating them. Perhaps doing some kind of device init in GC...984 *985 * @returns The current TPR.986 * @param pDevIns Device instance of the APIC.987 * @param u8Dest See APIC implementation.988 * @param u8DestMode See APIC implementation.989 * @param u8DeliveryMode See APIC implementation.990 * @param iVector See APIC implementation.991 * @param u8Polarity See APIC implementation.992 * @param u8TriggerMode See APIC implementation.993 */994 DECLR3CALLBACKMEMBER(void, pfnBusDeliverHC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,995 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));996 997 /** The name of the GC GetInterrupt entry point. */998 const char *pszGetInterruptGC;999 /** The name of the GC SetBase entry point. */1000 const char *pszSetBaseGC;1001 /** The name of the GC GetBase entry point. */1002 const char *pszGetBaseGC;1003 /** The name of the GC SetTPR entry point. */1004 const char *pszSetTPRGC;1005 /** The name of the GC GetTPR entry point. */1006 const char *pszGetTPRGC;1007 /** The name of the GC BusDeliver entry point. */1008 const char *pszBusDeliverGC;1009 1010 /** The name of the R0 GetInterrupt entry point. */1011 const char *pszGetInterruptR0;1012 /** The name of the R0 SetBase entry point. */1013 const char *pszSetBaseR0;1014 /** The name of the R0 GetBase entry point. */1015 const char *pszGetBaseR0;1016 /** The name of the R0 SetTPR entry point. */1017 const char *pszSetTPRR0;1018 /** The name of the R0 GetTPR entry point. */1019 const char *pszGetTPRR0;1020 /** The name of the R0 BusDeliver entry point. */1021 const char *pszBusDeliverR0;1022 1023 } PDMAPICREG;1024 /** Pointer to an APIC registration structure. */1025 typedef PDMAPICREG *PPDMAPICREG;1026 1027 /** Current PDMAPICREG version number. */1028 #define PDM_APICREG_VERSION 0x700100001029 1030 1031 /**1032 * APIC GC helpers.1033 */1034 typedef struct PDMAPICHLPGC1035 {1036 /** Structure version. PDM_APICHLPGC_VERSION defines the current version. */1037 uint32_t u32Version;1038 1039 /**1040 * Set the interrupt force action flag.1041 *1042 * @param pDevIns Device instance of the APIC.1043 */1044 DECLGCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));1045 1046 /**1047 * Clear the interrupt force action flag.1048 *1049 * @param pDevIns Device instance of the APIC.1050 */1051 DECLGCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));1052 1053 /**1054 * Sets or clears the APIC bit in the CPUID feature masks.1055 *1056 * @param pDevIns Device instance of the APIC.1057 * @param fEnabled If true the bit is set, else cleared.1058 */1059 DECLGCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));1060 1061 #ifdef VBOX_WITH_PDM_LOCK1062 /**1063 * Acquires the PDM lock.1064 *1065 * @returns VINF_SUCCESS on success.1066 * @returns rc if we failed to acquire the lock.1067 * @param pDevIns The APIC device instance.1068 * @param rc What to return if we fail to acquire the lock.1069 */1070 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));1071 1072 /**1073 * Releases the PDM lock.1074 *1075 * @param pDevIns The APIC device instance.1076 */1077 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));1078 #endif1079 /** Just a safety precaution. */1080 uint32_t u32TheEnd;1081 } PDMAPICHLPGC;1082 /** Pointer to APIC GC helpers. */1083 typedef GCPTRTYPE(PDMAPICHLPGC *) PPDMAPICHLPGC;1084 /** Pointer to const APIC helpers. */1085 typedef GCPTRTYPE(const PDMAPICHLPGC *) PCPDMAPICHLPGC;1086 1087 /** Current PDMAPICHLPGC version number. */1088 #define PDM_APICHLPGC_VERSION 0x600100001089 1090 1091 /**1092 * APIC R0 helpers.1093 */1094 typedef struct PDMAPICHLPR01095 {1096 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */1097 uint32_t u32Version;1098 1099 /**1100 * Set the interrupt force action flag.1101 *1102 * @param pDevIns Device instance of the APIC.1103 */1104 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));1105 1106 /**1107 * Clear the interrupt force action flag.1108 *1109 * @param pDevIns Device instance of the APIC.1110 */1111 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));1112 1113 /**1114 * Sets or clears the APIC bit in the CPUID feature masks.1115 *1116 * @param pDevIns Device instance of the APIC.1117 * @param fEnabled If true the bit is set, else cleared.1118 */1119 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));1120 1121 #ifdef VBOX_WITH_PDM_LOCK1122 /**1123 * Acquires the PDM lock.1124 *1125 * @returns VINF_SUCCESS on success.1126 * @returns rc if we failed to acquire the lock.1127 * @param pDevIns The APIC device instance.1128 * @param rc What to return if we fail to acquire the lock.1129 */1130 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));1131 1132 /**1133 * Releases the PDM lock.1134 *1135 * @param pDevIns The APIC device instance.1136 */1137 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));1138 #endif1139 1140 /** Just a safety precaution. */1141 uint32_t u32TheEnd;1142 } PDMAPICHLPR0;1143 /** Pointer to APIC GC helpers. */1144 typedef GCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;1145 /** Pointer to const APIC helpers. */1146 typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;1147 1148 /** Current PDMAPICHLPR0 version number. */1149 #define PDM_APICHLPR0_VERSION 0x600100001150 1151 /**1152 * APIC HC helpers.1153 */1154 typedef struct PDMAPICHLPR31155 {1156 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */1157 uint32_t u32Version;1158 1159 /**1160 * Set the interrupt force action flag.1161 *1162 * @param pDevIns Device instance of the APIC.1163 */1164 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));1165 1166 /**1167 * Clear the interrupt force action flag.1168 *1169 * @param pDevIns Device instance of the APIC.1170 */1171 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));1172 1173 /**1174 * Sets or clears the APIC bit in the CPUID feature masks.1175 *1176 * @param pDevIns Device instance of the APIC.1177 * @param fEnabled If true the bit is set, else cleared.1178 */1179 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));1180 1181 #ifdef VBOX_WITH_PDM_LOCK1182 /**1183 * Acquires the PDM lock.1184 *1185 * @returns VINF_SUCCESS on success.1186 * @returns Fatal error on failure.1187 * @param pDevIns The APIC device instance.1188 * @param rc Dummy for making the interface identical to the GC and R0 versions.1189 */1190 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));1191 1192 /**1193 * Releases the PDM lock.1194 *1195 * @param pDevIns The APIC device instance.1196 */1197 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));1198 #endif1199 1200 /**1201 * Gets the address of the GC APIC helpers.1202 *1203 * This should be called at both construction and relocation time1204 * to obtain the correct address of the GC helpers.1205 *1206 * @returns GC pointer to the APIC helpers.1207 * @param pDevIns Device instance of the APIC.1208 */1209 DECLR3CALLBACKMEMBER(PCPDMAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));1210 1211 /**1212 * Gets the address of the R0 APIC helpers.1213 *1214 * This should be called at both construction and relocation time1215 * to obtain the correct address of the R0 helpers.1216 *1217 * @returns R0 pointer to the APIC helpers.1218 * @param pDevIns Device instance of the APIC.1219 */1220 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));1221 1222 /** Just a safety precaution. */1223 uint32_t u32TheEnd;1224 } PDMAPICHLPR3;1225 /** Pointer to APIC helpers. */1226 typedef HCPTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;1227 /** Pointer to const APIC helpers. */1228 typedef HCPTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;1229 1230 /** Current PDMAPICHLP version number. */1231 #define PDM_APICHLPR3_VERSION 0xfd0100001232 1233 1234 /**1235 * I/O APIC registration structure.1236 */1237 typedef struct PDMIOAPICREG1238 {1239 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */1240 uint32_t u32Version;1241 1242 /**1243 * Set the an IRQ.1244 *1245 * @param pDevIns Device instance of the I/O APIC.1246 * @param iIrq IRQ number to set.1247 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.1248 */1249 DECLR3CALLBACKMEMBER(void, pfnSetIrqHC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));1250 1251 /** The name of the GC SetIrq entry point. */1252 const char *pszSetIrqGC;1253 1254 /** The name of the R0 SetIrq entry point. */1255 const char *pszSetIrqR0;1256 } PDMIOAPICREG;1257 /** Pointer to an APIC registration structure. */1258 typedef PDMIOAPICREG *PPDMIOAPICREG;1259 1260 /** Current PDMAPICREG version number. */1261 #define PDM_IOAPICREG_VERSION 0x500100001262 1263 1264 /**1265 * IOAPIC GC helpers.1266 */1267 typedef struct PDMIOAPICHLPGC1268 {1269 /** Structure version. PDM_IOAPICHLPGC_VERSION defines the current version. */1270 uint32_t u32Version;1271 1272 /**1273 * Private interface between the IOAPIC and APIC.1274 *1275 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.1276 *1277 * @returns The current TPR.1278 * @param pDevIns Device instance of the IOAPIC.1279 * @param u8Dest See APIC implementation.1280 * @param u8DestMode See APIC implementation.1281 * @param u8DeliveryMode See APIC implementation.1282 * @param iVector See APIC implementation.1283 * @param u8Polarity See APIC implementation.1284 * @param u8TriggerMode See APIC implementation.1285 */1286 DECLGCCALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,1287 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));1288 1289 #ifdef VBOX_WITH_PDM_LOCK1290 /**1291 * Acquires the PDM lock.1292 *1293 * @returns VINF_SUCCESS on success.1294 * @returns rc if we failed to acquire the lock.1295 * @param pDevIns The IOAPIC device instance.1296 * @param rc What to return if we fail to acquire the lock.1297 */1298 DECLGCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));1299 1300 /**1301 * Releases the PDM lock.1302 *1303 * @param pDevIns The IOAPIC device instance.1304 */1305 DECLGCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));1306 #endif1307 1308 /** Just a safety precaution. */1309 uint32_t u32TheEnd;1310 } PDMIOAPICHLPGC;1311 /** Pointer to IOAPIC GC helpers. */1312 typedef GCPTRTYPE(PDMAPICHLPGC *)PPDMIOAPICHLPGC;1313 /** Pointer to const IOAPIC helpers. */1314 typedef GCPTRTYPE(const PDMIOAPICHLPGC *) PCPDMIOAPICHLPGC;1315 1316 /** Current PDMIOAPICHLPGC version number. */1317 #define PDM_IOAPICHLPGC_VERSION 0xfe0100001318 1319 1320 /**1321 * IOAPIC R0 helpers.1322 */1323 typedef struct PDMIOAPICHLPR01324 {1325 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */1326 uint32_t u32Version;1327 1328 /**1329 * Private interface between the IOAPIC and APIC.1330 *1331 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.1332 *1333 * @returns The current TPR.1334 * @param pDevIns Device instance of the IOAPIC.1335 * @param u8Dest See APIC implementation.1336 * @param u8DestMode See APIC implementation.1337 * @param u8DeliveryMode See APIC implementation.1338 * @param iVector See APIC implementation.1339 * @param u8Polarity See APIC implementation.1340 * @param u8TriggerMode See APIC implementation.1341 */1342 DECLR0CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,1343 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));1344 1345 #ifdef VBOX_WITH_PDM_LOCK1346 /**1347 * Acquires the PDM lock.1348 *1349 * @returns VINF_SUCCESS on success.1350 * @returns rc if we failed to acquire the lock.1351 * @param pDevIns The IOAPIC device instance.1352 * @param rc What to return if we fail to acquire the lock.1353 */1354 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));1355 1356 /**1357 * Releases the PDM lock.1358 *1359 * @param pDevIns The IOAPIC device instance.1360 */1361 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));1362 #endif1363 1364 /** Just a safety precaution. */1365 uint32_t u32TheEnd;1366 } PDMIOAPICHLPR0;1367 /** Pointer to IOAPIC R0 helpers. */1368 typedef R0PTRTYPE(PDMAPICHLPGC *) PPDMIOAPICHLPR0;1369 /** Pointer to const IOAPIC helpers. */1370 typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;1371 1372 /** Current PDMIOAPICHLPR0 version number. */1373 #define PDM_IOAPICHLPR0_VERSION 0xfe0100001374 1375 /**1376 * IOAPIC HC helpers.1377 */1378 typedef struct PDMIOAPICHLPR31379 {1380 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */1381 uint32_t u32Version;1382 1383 /**1384 * Private interface between the IOAPIC and APIC.1385 *1386 * See comments about this hack on PDMAPICREG::pfnBusDeliverHC.1387 *1388 * @returns The current TPR.1389 * @param pDevIns Device instance of the IOAPIC.1390 * @param u8Dest See APIC implementation.1391 * @param u8DestMode See APIC implementation.1392 * @param u8DeliveryMode See APIC implementation.1393 * @param iVector See APIC implementation.1394 * @param u8Polarity See APIC implementation.1395 * @param u8TriggerMode See APIC implementation.1396 */1397 DECLR3CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,1398 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));1399 1400 #ifdef VBOX_WITH_PDM_LOCK1401 /**1402 * Acquires the PDM lock.1403 *1404 * @returns VINF_SUCCESS on success.1405 * @returns Fatal error on failure.1406 * @param pDevIns The IOAPIC device instance.1407 * @param rc Dummy for making the interface identical to the GC and R0 versions.1408 */1409 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));1410 1411 /**1412 * Releases the PDM lock.1413 *1414 * @param pDevIns The IOAPIC device instance.1415 */1416 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));1417 #endif1418 1419 /**1420 * Gets the address of the GC IOAPIC helpers.1421 *1422 * This should be called at both construction and relocation time1423 * to obtain the correct address of the GC helpers.1424 *1425 * @returns GC pointer to the IOAPIC helpers.1426 * @param pDevIns Device instance of the IOAPIC.1427 */1428 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPGC, pfnGetGCHelpers,(PPDMDEVINS pDevIns));1429 1430 /**1431 * Gets the address of the R0 IOAPIC helpers.1432 *1433 * This should be called at both construction and relocation time1434 * to obtain the correct address of the R0 helpers.1435 *1436 * @returns R0 pointer to the IOAPIC helpers.1437 * @param pDevIns Device instance of the IOAPIC.1438 */1439 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));1440 1441 /** Just a safety precaution. */1442 uint32_t u32TheEnd;1443 } PDMIOAPICHLPR3;1444 /** Pointer to IOAPIC HC helpers. */1445 typedef HCPTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;1446 /** Pointer to const IOAPIC helpers. */1447 typedef HCPTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;1448 1449 /** Current PDMIOAPICHLPR3 version number. */1450 #define PDM_IOAPICHLPR3_VERSION 0xff0100001451 1452 1453 1454 #ifdef IN_RING31455 1456 /**1457 * DMA Transfer Handler.1458 *1459 * @returns Number of bytes transferred.1460 * @param pDevIns Device instance of the DMA.1461 * @param pvUser User pointer.1462 * @param uChannel Channel number.1463 * @param off DMA position.1464 * @param cb Block size.1465 */1466 typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);1467 /** Pointer to a FNDMATRANSFERHANDLER(). */1468 typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;1469 1470 /**1471 * DMA Controller registration structure.1472 */1473 typedef struct PDMDMAREG1474 {1475 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */1476 uint32_t u32Version;1477 1478 /**1479 * Execute pending transfers.1480 *1481 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.1482 * @param pDevIns Device instance of the DMAC.1483 */1484 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));1485 1486 /**1487 * Register transfer function for DMA channel.1488 *1489 * @param pDevIns Device instance of the DMAC.1490 * @param uChannel Channel number.1491 * @param pfnTransferHandler Device specific transfer function.1492 * @param pvUSer User pointer to be passed to the callback.1493 */1494 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));1495 1496 /**1497 * Read memory1498 *1499 * @returns Number of bytes read.1500 * @param pDevIns Device instance of the DMAC.1501 * @param pvBuffer Pointer to target buffer.1502 * @param off DMA position.1503 * @param cbBlock Block size.1504 */1505 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));1506 1507 /**1508 * Write memory1509 *1510 * @returns Number of bytes written.1511 * @param pDevIns Device instance of the DMAC.1512 * @param pvBuffer Memory to write.1513 * @param off DMA position.1514 * @param cbBlock Block size.1515 */1516 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));1517 1518 /**1519 * Set the DREQ line.1520 *1521 * @param pDevIns Device instance of the DMAC.1522 * @param uChannel Channel number.1523 * @param uLevel Level of the line.1524 */1525 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));1526 1527 /**1528 * Get channel mode1529 *1530 * @returns Channel mode.1531 * @param pDevIns Device instance of the DMAC.1532 * @param uChannel Channel number.1533 */1534 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));1535 1536 } PDMDMACREG;1537 /** Pointer to a DMAC registration structure. */1538 typedef PDMDMACREG *PPDMDMACREG;1539 1540 /** Current PDMDMACREG version number. */1541 #define PDM_DMACREG_VERSION 0xf50100001542 1543 1544 /**1545 * DMA Controller device helpers.1546 */1547 typedef struct PDMDMACHLP1548 {1549 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */1550 uint32_t u32Version;1551 1552 /* to-be-defined */1553 1554 } PDMDMACHLP;1555 /** Pointer to DMAC helpers. */1556 typedef PDMDMACHLP *PPDMDMACHLP;1557 /** Pointer to const DMAC helpers. */1558 typedef const PDMDMACHLP *PCPDMDMACHLP;1559 1560 /** Current PDMDMACHLP version number. */1561 #define PDM_DMACHLP_VERSION 0xf60100001562 1563 #endif /* IN_RING3 */1564 1565 1566 1567 /**1568 * RTC registration structure.1569 */1570 typedef struct PDMRTCREG1571 {1572 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */1573 uint32_t u32Version;1574 uint32_t u32Alignment; /**< structure size alignment. */1575 1576 /**1577 * Write to a CMOS register and update the checksum if necessary.1578 *1579 * @returns VBox status code.1580 * @param pDevIns Device instance of the RTC.1581 * @param iReg The CMOS register index.1582 * @param u8Value The CMOS register value.1583 */1584 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));1585 1586 /**1587 * Read a CMOS register.1588 *1589 * @returns VBox status code.1590 * @param pDevIns Device instance of the RTC.1591 * @param iReg The CMOS register index.1592 * @param pu8Value Where to store the CMOS register value.1593 */1594 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));1595 1596 } PDMRTCREG;1597 /** Pointer to a RTC registration structure. */1598 typedef PDMRTCREG *PPDMRTCREG;1599 /** Pointer to a const RTC registration structure. */1600 typedef const PDMRTCREG *PCPDMRTCREG;1601 1602 /** Current PDMRTCREG version number. */1603 #define PDM_RTCREG_VERSION 0xfa0100001604 1605 1606 /**1607 * RTC device helpers.1608 */1609 typedef struct PDMRTCHLP1610 {1611 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */1612 uint32_t u32Version;1613 1614 /* to-be-defined */1615 1616 } PDMRTCHLP;1617 /** Pointer to RTC helpers. */1618 typedef PDMRTCHLP *PPDMRTCHLP;1619 /** Pointer to const RTC helpers. */1620 typedef const PDMRTCHLP *PCPDMRTCHLP;1621 1622 /** Current PDMRTCHLP version number. */1623 #define PDM_RTCHLP_VERSION 0xf60100001624 1625 1626 1627 #ifdef IN_RING31628 1629 /**1630 * PDM Device API.1631 */1632 typedef struct PDMDEVHLP1633 {1634 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */1635 uint32_t u32Version;1636 1637 /**1638 * Register a number of I/O ports with a device.1639 *1640 * These callbacks are of course for the host context (HC).1641 * Register HC handlers before guest context (GC) handlers! There must be a1642 * HC handler for every GC handler!1643 *1644 * @returns VBox status.1645 * @param pDevIns The device instance to register the ports with.1646 * @param Port First port number in the range.1647 * @param cPorts Number of ports to register.1648 * @param pvUser User argument.1649 * @param pfnOut Pointer to function which is gonna handle OUT operations.1650 * @param pfnIn Pointer to function which is gonna handle IN operations.1651 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.1652 * @param pfnInStr Pointer to function which is gonna handle string IN operations.1653 * @param pszDesc Pointer to description string. This must not be freed.1654 */1655 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,1656 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,1657 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));1658 1659 /**1660 * Register a number of I/O ports with a device for GC.1661 *1662 * These callbacks are for the host context (GC).1663 * Register host context (HC) handlers before guest context handlers! There must be a1664 * HC handler for every GC handler!1665 *1666 * @returns VBox status.1667 * @param pDevIns The device instance to register the ports with and which GC module1668 * to resolve the names against.1669 * @param Port First port number in the range.1670 * @param cPorts Number of ports to register.1671 * @param pvUser User argument.1672 * @param pszOut Name of the GC function which is gonna handle OUT operations.1673 * @param pszIn Name of the GC function which is gonna handle IN operations.1674 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.1675 * @param pszInStr Name of the GC function which is gonna handle string IN operations.1676 * @param pszDesc Pointer to description string. This must not be freed.1677 */1678 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser,1679 const char *pszOut, const char *pszIn,1680 const char *pszOutStr, const char *pszInStr, const char *pszDesc));1681 1682 /**1683 * Register a number of I/O ports with a device.1684 *1685 * These callbacks are of course for the ring-0 host context (R0).1686 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!1687 *1688 * @returns VBox status.1689 * @param pDevIns The device instance to register the ports with.1690 * @param Port First port number in the range.1691 * @param cPorts Number of ports to register.1692 * @param pvUser User argument. (if pointer, then it must be in locked memory!)1693 * @param pszOut Name of the R0 function which is gonna handle OUT operations.1694 * @param pszIn Name of the R0 function which is gonna handle IN operations.1695 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.1696 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.1697 * @param pszDesc Pointer to description string. This must not be freed.1698 */1699 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,1700 const char *pszOut, const char *pszIn,1701 const char *pszOutStr, const char *pszInStr, const char *pszDesc));1702 1703 /**1704 * Deregister I/O ports.1705 *1706 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.1707 *1708 * @returns VBox status.1709 * @param pDevIns The device instance owning the ports.1710 * @param Port First port number in the range.1711 * @param cPorts Number of ports to deregister.1712 */1713 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));1714 1715 1716 /**1717 * Register a Memory Mapped I/O (MMIO) region.1718 *1719 * These callbacks are of course for the host context (HC).1720 * Register HC handlers before guest context (GC) handlers! There must be a1721 * HC handler for every GC handler!1722 *1723 * @returns VBox status.1724 * @param pDevIns The device instance to register the MMIO with.1725 * @param GCPhysStart First physical address in the range.1726 * @param cbRange The size of the range (in bytes).1727 * @param pvUser User argument.1728 * @param pfnWrite Pointer to function which is gonna handle Write operations.1729 * @param pfnRead Pointer to function which is gonna handle Read operations.1730 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)1731 * @param pszDesc Pointer to description string. This must not be freed.1732 */1733 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,1734 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,1735 const char *pszDesc));1736 1737 /**1738 * Register a Memory Mapped I/O (MMIO) region for GC.1739 *1740 * These callbacks are for the guest context (GC).1741 * Register host context (HC) handlers before guest context handlers! There must be a1742 * HC handler for every GC handler!1743 *1744 * @returns VBox status.1745 * @param pDevIns The device instance to register the MMIO with.1746 * @param GCPhysStart First physical address in the range.1747 * @param cbRange The size of the range (in bytes).1748 * @param pvUser User argument.1749 * @param pszWrite Name of the GC function which is gonna handle Write operations.1750 * @param pszRead Name of the GC function which is gonna handle Read operations.1751 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)1752 * @param pszDesc Pointer to description string. This must not be freed.1753 */1754 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,1755 const char *pszWrite, const char *pszRead, const char *pszFill,1756 const char *pszDesc));1757 1758 /**1759 * Register a Memory Mapped I/O (MMIO) region for R0.1760 *1761 * These callbacks are for the ring-0 host context (R0).1762 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!1763 *1764 * @returns VBox status.1765 * @param pDevIns The device instance to register the MMIO with.1766 * @param GCPhysStart First physical address in the range.1767 * @param cbRange The size of the range (in bytes).1768 * @param pvUser User argument. (if pointer, then it must be in locked memory!)1769 * @param pszWrite Name of the GC function which is gonna handle Write operations.1770 * @param pszRead Name of the GC function which is gonna handle Read operations.1771 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)1772 * @param pszDesc Pointer to description string. This must not be freed.1773 */1774 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,1775 const char *pszWrite, const char *pszRead, const char *pszFill,1776 const char *pszDesc));1777 1778 /**1779 * Deregister a Memory Mapped I/O (MMIO) region.1780 *1781 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.1782 *1783 * @returns VBox status.1784 * @param pDevIns The device instance owning the MMIO region(s).1785 * @param GCPhysStart First physical address in the range.1786 * @param cbRange The size of the range (in bytes).1787 */1788 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));1789 1790 /**1791 * Register a ROM (BIOS) region.1792 *1793 * It goes without saying that this is read-only memory. The memory region must be1794 * in unassigned memory. I.e. from the top of the address space or on the PC in1795 * the 0xa0000-0xfffff range.1796 *1797 * @returns VBox status.1798 * @param pDevIns The device instance owning the ROM region.1799 * @param GCPhysStart First physical address in the range.1800 * Must be page aligned!1801 * @param cbRange The size of the range (in bytes).1802 * Must be page aligned!1803 * @param pvBinary Pointer to the binary data backing the ROM image.1804 * This must be cbRange bytes big.1805 * It will be copied and doesn't have to stick around.1806 * @param pszDesc Pointer to description string. This must not be freed.1807 * @remark There is no way to remove the rom, automatically on device cleanup or1808 * manually from the device yet. At present I doubt we need such features...1809 */1810 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, const char *pszDesc));1811 1812 /**1813 * Register a save state data unit.1814 *1815 * @returns VBox status.1816 * @param pDevIns Device instance.1817 * @param pszName Data unit name.1818 * @param u32Instance The instance identifier of the data unit.1819 * This must together with the name be unique.1820 * @param u32Version Data layout version number.1821 * @param cbGuess The approximate amount of data in the unit.1822 * Only for progress indicators.1823 * @param pfnSavePrep Prepare save callback, optional.1824 * @param pfnSaveExec Execute save callback, optional.1825 * @param pfnSaveDone Done save callback, optional.1826 * @param pfnLoadPrep Prepare load callback, optional.1827 * @param pfnLoadExec Execute load callback, optional.1828 * @param pfnLoadDone Done load callback, optional.1829 */1830 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,1831 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,1832 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));1833 1834 /**1835 * Creates a timer.1836 *1837 * @returns VBox status.1838 * @param pDevIns Device instance.1839 * @param enmClock The clock to use on this timer.1840 * @param pfnCallback Callback function.1841 * @param pszDesc Pointer to description string which must stay around1842 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).1843 * @param ppTimer Where to store the timer on success.1844 */1845 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERHC ppTimer));1846 1847 /**1848 * Creates an external timer.1849 *1850 * @returns timer pointer1851 * @param pDevIns Device instance.1852 * @param enmClock The clock to use on this timer.1853 * @param pfnCallback Callback function.1854 * @param pvUser User pointer1855 * @param pszDesc Pointer to description string which must stay around1856 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).1857 */1858 DECLR3CALLBACKMEMBER(PTMTIMERHC, pfnTMTimerCreateExternal,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc));1859 1860 /**1861 * Registers the device with the default PCI bus.1862 *1863 * @returns VBox status code.1864 * @param pDevIns Device instance.1865 * @param pPciDev The PCI device structure.1866 * Any PCI enabled device must keep this in it's instance data!1867 * Fill in the PCI data config before registration, please.1868 * @remark This is the simple interface, a Ex interface will be created if1869 * more features are needed later.1870 */1871 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));1872 1873 /**1874 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.1875 *1876 * @returns VBox status code.1877 * @param pDevIns Device instance.1878 * @param iRegion The region number.1879 * @param cbRegion Size of the region.1880 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.1881 * @param pfnCallback Callback for doing the mapping.1882 */1883 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));1884 1885 /**1886 * Register PCI configuration space read/write callbacks.1887 *1888 * @param pDevIns Device instance.1889 * @param pPciDev The PCI device structure.1890 * If NULL the default PCI device for this device instance is used.1891 * @param pfnRead Pointer to the user defined PCI config read function.1892 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)1893 * PCI config read function. This way, user can decide when (and if)1894 * to call default PCI config read function. Can be NULL.1895 * @param pfnWrite Pointer to the user defined PCI config write function.1896 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)1897 * PCI config write function. This way, user can decide when (and if)1898 * to call default PCI config write function. Can be NULL.1899 * @thread EMT1900 */1901 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,1902 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));1903 1904 /**1905 * Set the IRQ for a PCI device.1906 *1907 * @param pDevIns Device instance.1908 * @param iIrq IRQ number to set.1909 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.1910 * @thread Any thread, but will involve the emulation thread.1911 */1912 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));1913 1914 /**1915 * Set the IRQ for a PCI device, but don't wait for EMT to process1916 * the request when not called from EMT.1917 *1918 * @param pDevIns Device instance.1919 * @param iIrq IRQ number to set.1920 * @param iLevel IRQ level.1921 * @thread Any thread, but will involve the emulation thread.1922 */1923 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));1924 1925 /**1926 * Set ISA IRQ for a device.1927 *1928 * @param pDevIns Device instance.1929 * @param iIrq IRQ number to set.1930 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.1931 * @thread Any thread, but will involve the emulation thread.1932 */1933 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));1934 1935 /**1936 * Set the ISA IRQ for a device, but don't wait for EMT to process1937 * the request when not called from EMT.1938 *1939 * @param pDevIns Device instance.1940 * @param iIrq IRQ number to set.1941 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.1942 * @thread Any thread, but will involve the emulation thread.1943 */1944 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));1945 1946 /**1947 * Attaches a driver (chain) to the device.1948 *1949 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and1950 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().1951 *1952 * @returns VBox status code.1953 * @param pDevIns Device instance.1954 * @param iLun The logical unit to attach.1955 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)1956 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)1957 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid1958 * for the live of the device instance.1959 */1960 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));1961 1962 /**1963 * Allocate memory which is associated with current VM instance1964 * and automatically freed on it's destruction.1965 *1966 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.1967 * @param pDevIns Device instance.1968 * @param cb Number of bytes to allocate.1969 */1970 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));1971 1972 /**1973 * Allocate memory which is associated with current VM instance1974 * and automatically freed on it's destruction. The memory is ZEROed.1975 *1976 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.1977 * @param pDevIns Device instance.1978 * @param cb Number of bytes to allocate.1979 */1980 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));1981 1982 /**1983 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().1984 *1985 * @param pDevIns Device instance.1986 * @param pv Pointer to the memory to free.1987 */1988 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));1989 1990 /**1991 * Set the VM error message1992 *1993 * @returns rc.1994 * @param pDevIns Device instance.1995 * @param rc VBox status code.1996 * @param RT_SRC_POS_DECL Use RT_SRC_POS.1997 * @param pszFormat Error message format string.1998 * @param ... Error message arguments.1999 */2000 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));2001 2002 /**2003 * Set the VM error message2004 *2005 * @returns rc.2006 * @param pDevIns Device instance.2007 * @param rc VBox status code.2008 * @param RT_SRC_POS_DECL Use RT_SRC_POS.2009 * @param pszFormat Error message format string.2010 * @param va Error message arguments.2011 */2012 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));2013 2014 /**2015 * Set the VM runtime error message2016 *2017 * @returns VBox status code.2018 * @param pDevIns Device instance.2019 * @param fFatal Whether it is a fatal error or not.2020 * @param pszErrorID Error ID string.2021 * @param pszFormat Error message format string.2022 * @param ... Error message arguments.2023 */2024 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));2025 2026 /**2027 * Set the VM runtime error message2028 *2029 * @returns VBox status code.2030 * @param pDevIns Device instance.2031 * @param fFatal Whether it is a fatal error or not.2032 * @param pszErrorID Error ID string.2033 * @param pszFormat Error message format string.2034 * @param va Error message arguments.2035 */2036 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));2037 2038 /**2039 * Assert that the current thread is the emulation thread.2040 *2041 * @returns True if correct.2042 * @returns False if wrong.2043 * @param pDevIns Device instance.2044 * @param pszFile Filename of the assertion location.2045 * @param iLine The linenumber of the assertion location.2046 * @param pszFunction Function of the assertion location.2047 */2048 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));2049 2050 /**2051 * Assert that the current thread is NOT the emulation thread.2052 *2053 * @returns True if correct.2054 * @returns False if wrong.2055 * @param pDevIns Device instance.2056 * @param pszFile Filename of the assertion location.2057 * @param iLine The linenumber of the assertion location.2058 * @param pszFunction Function of the assertion location.2059 */2060 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));2061 2062 /**2063 * Stops the VM and enters the debugger to look at the guest state.2064 *2065 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of2066 * invoking this function directly.2067 *2068 * @returns VBox status code which must be passed up to the VMM.2069 * @param pDevIns Device instance.2070 * @param pszFile Filename of the assertion location.2071 * @param iLine The linenumber of the assertion location.2072 * @param pszFunction Function of the assertion location.2073 * @param pszFormat Message. (optional)2074 * @param args Message parameters.2075 */2076 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));2077 2078 /**2079 * Register a info handler with DBGF,2080 *2081 * @returns VBox status code.2082 * @param pDevIns Device instance.2083 * @param pszName The identifier of the info.2084 * @param pszDesc The description of the info and any arguments the handler may take.2085 * @param pfnHandler The handler function to be called to display the info.2086 */2087 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));2088 2089 /**2090 * Registers a statistics sample if statistics are enabled.2091 *2092 * @param pDevIns Device instance of the DMA.2093 * @param pvSample Pointer to the sample.2094 * @param enmType Sample type. This indicates what pvSample is pointing at.2095 * @param pszName Sample name. The name is on this form "/<component>/<sample>".2096 * Further nesting is possible.2097 * @param enmUnit Sample unit.2098 * @param pszDesc Sample description.2099 */2100 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));2101 2102 /**2103 * Same as pfnSTAMRegister except that the name is specified in a2104 * RTStrPrintf like fashion.2105 *2106 * @returns VBox status.2107 * @param pDevIns Device instance of the DMA.2108 * @param pvSample Pointer to the sample.2109 * @param enmType Sample type. This indicates what pvSample is pointing at.2110 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.2111 * @param enmUnit Sample unit.2112 * @param pszDesc Sample description.2113 * @param pszName The sample name format string.2114 * @param ... Arguments to the format string.2115 */2116 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,2117 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));2118 2119 /**2120 * Same as pfnSTAMRegister except that the name is specified in a2121 * RTStrPrintfV like fashion.2122 *2123 * @returns VBox status.2124 * @param pDevIns Device instance of the DMA.2125 * @param pvSample Pointer to the sample.2126 * @param enmType Sample type. This indicates what pvSample is pointing at.2127 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.2128 * @param enmUnit Sample unit.2129 * @param pszDesc Sample description.2130 * @param pszName The sample name format string.2131 * @param args Arguments to the format string.2132 */2133 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,2134 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));2135 2136 /**2137 * Register the RTC device.2138 *2139 * @returns VBox status code.2140 * @param pDevIns Device instance.2141 * @param pRtcReg Pointer to a RTC registration structure.2142 * @param ppRtcHlp Where to store the pointer to the helper functions.2143 */2144 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));2145 2146 /**2147 * Create a queue.2148 *2149 * @returns VBox status code.2150 * @param pDevIns The device instance.2151 * @param cbItem The size of a queue item.2152 * @param cItems The number of items in the queue.2153 * @param cMilliesInterval The number of milliseconds between polling the queue.2154 * If 0 then the emulation thread will be notified whenever an item arrives.2155 * @param pfnCallback The consumer function.2156 * @param fGCEnabled Set if the queue should work in GC too.2157 * @param ppQueue Where to store the queue handle on success.2158 * @thread The emulation thread.2159 */2160 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,2161 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue));2162 2163 /**2164 * Initializes a PDM critical section.2165 *2166 * The PDM critical sections are derived from the IPRT critical sections, but2167 * works in GC as well.2168 *2169 * @returns VBox status code.2170 * @param pDevIns Device instance.2171 * @param pCritSect Pointer to the critical section.2172 * @param pszName The name of the critical section (for statistics).2173 */2174 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));2175 2176 /**2177 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.2178 *2179 * @returns pTime.2180 * @param pDevIns Device instance.2181 * @param pTime Where to store the time.2182 */2183 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));2184 2185 /**2186 * Creates a PDM thread.2187 *2188 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,2189 * resuming, and destroying the thread as the VM state changes.2190 *2191 * @returns VBox status code.2192 * @param pDevIns The device instance.2193 * @param ppThread Where to store the thread 'handle'.2194 * @param pvUser The user argument to the thread function.2195 * @param pfnThread The thread function.2196 * @param pfnWakeup The wakup callback. This is called on the EMT thread when2197 * a state change is pending.2198 * @param cbStack See RTThreadCreate.2199 * @param enmType See RTThreadCreate.2200 * @param pszName See RTThreadCreate.2201 */2202 DECLR3CALLBACKMEMBER(int, pfnPDMThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,2203 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));2204 2205 2206 /** Space reserved for future members.2207 * @{ */2208 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));2209 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));2210 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));2211 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));2212 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));2213 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));2214 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));2215 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));2216 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));2217 /** @} */2218 2219 2220 /** API available to trusted devices only.2221 *2222 * These APIs are providing unrestricted access to the guest and the VM,2223 * or they are interacting intimately with PDM.2224 *2225 * @{2226 */2227 /**2228 * Gets the VM handle. Restricted API.2229 *2230 * @returns VM Handle.2231 * @param pDevIns Device instance.2232 */2233 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));2234 2235 /**2236 * Register the PCI Bus.2237 *2238 * @returns VBox status code.2239 * @param pDevIns Device instance.2240 * @param pPciBusReg Pointer to PCI bus registration structure.2241 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus helpers.2242 */2243 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));2244 2245 /**2246 * Register the PIC device.2247 *2248 * @returns VBox status code.2249 * @param pDevIns Device instance.2250 * @param pPicReg Pointer to a PIC registration structure.2251 * @param ppPicHlpR3 Where to store the pointer to the PIC HC helpers.2252 */2253 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));2254 2255 /**2256 * Register the APIC device.2257 *2258 * @returns VBox status code.2259 * @param pDevIns Device instance.2260 * @param pApicReg Pointer to a APIC registration structure.2261 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.2262 */2263 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));2264 2265 /**2266 * Register the I/O APIC device.2267 *2268 * @returns VBox status code.2269 * @param pDevIns Device instance.2270 * @param pIoApicReg Pointer to a I/O APIC registration structure.2271 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC helpers.2272 */2273 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));2274 2275 /**2276 * Register the DMA device.2277 *2278 * @returns VBox status code.2279 * @param pDevIns Device instance.2280 * @param pDmacReg Pointer to a DMAC registration structure.2281 * @param ppDmacHlp Where to store the pointer to the DMA helpers.2282 */2283 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));2284 2285 /**2286 * Read physical memory.2287 *2288 * @param pDevIns Device instance.2289 * @param GCPhys Physical address start reading from.2290 * @param pvBuf Where to put the read bits.2291 * @param cbRead How many bytes to read.2292 * @thread Any thread, but the call may involve the emulation thread.2293 */2294 DECLR3CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));2295 2296 /**2297 * Write to physical memory.2298 *2299 * @param pDevIns Device instance.2300 * @param GCPhys Physical address to write to.2301 * @param pvBuf What to write.2302 * @param cbWrite How many bytes to write.2303 * @thread Any thread, but the call may involve the emulation thread.2304 */2305 DECLR3CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));2306 2307 /**2308 * Read guest physical memory by virtual address.2309 *2310 * @param pDevIns Device instance.2311 * @param pvDst Where to put the read bits.2312 * @param GCVirtSrc Guest virtual address to start reading from.2313 * @param cb How many bytes to read.2314 * @thread The emulation thread.2315 */2316 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));2317 2318 /**2319 * Write to guest physical memory by virtual address.2320 *2321 * @param pDevIns Device instance.2322 * @param GCVirtDst Guest virtual address to write to.2323 * @param pvSrc What to write.2324 * @param cb How many bytes to write.2325 * @thread The emulation thread.2326 */2327 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));2328 2329 /**2330 * Reserve physical address space for ROM and MMIO ranges.2331 *2332 * @returns VBox status code.2333 * @param pDevIns Device instance.2334 * @param GCPhys Start physical address.2335 * @param cbRange The size of the range.2336 * @param pszDesc Description string.2337 * @thread The emulation thread.2338 */2339 DECLR3CALLBACKMEMBER(int, pfnPhysReserve,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc));2340 2341 /**2342 * Convert a guest physical address to a host virtual address.2343 *2344 * @returns VBox status code.2345 * @param pDevIns Device instance.2346 * @param GCPhys Start physical address.2347 * @param cbRange The size of the range. Use 0 if you don't care about the range.2348 * @param ppvHC Where to store the HC pointer corresponding to GCPhys.2349 * @thread Any thread.2350 */2351 DECLR3CALLBACKMEMBER(int, pfnPhys2HCVirt,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC));2352 2353 /**2354 * Convert a guest virtual address to a host virtual address.2355 *2356 * @returns VBox status code.2357 * @param pDevIns Device instance.2358 * @param GCPtr Guest virtual address.2359 * @param pHCPtr Where to store the HC pointer corresponding to GCPtr.2360 * @thread The emulation thread.2361 * @remark Careful with page boundraries.2362 */2363 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2HCPtr,(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr));2364 2365 /**2366 * Checks if the Gate A20 is enabled or not.2367 *2368 * @returns true if A20 is enabled.2369 * @returns false if A20 is disabled.2370 * @param pDevIns Device instance.2371 * @thread The emulation thread.2372 */2373 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));2374 2375 /**2376 * Enables or disables the Gate A20.2377 *2378 * @param pDevIns Device instance.2379 * @param fEnable Set this flag to enable the Gate A20; clear it to disable.2380 * @thread The emulation thread.2381 */2382 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));2383 2384 /**2385 * Resets the VM.2386 *2387 * @returns The appropriate VBox status code to pass around on reset.2388 * @param pDevIns Device instance.2389 * @thread The emulation thread.2390 */2391 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));2392 2393 /**2394 * Suspends the VM.2395 *2396 * @returns The appropriate VBox status code to pass around on suspend.2397 * @param pDevIns Device instance.2398 * @thread The emulation thread.2399 */2400 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));2401 2402 /**2403 * Power off the VM.2404 *2405 * @returns The appropriate VBox status code to pass around on power off.2406 * @param pDevIns Device instance.2407 * @thread The emulation thread.2408 */2409 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));2410 2411 /**2412 * Acquire global VM lock2413 *2414 * @returns VBox status code2415 * @param pDevIns Device instance.2416 */2417 DECLR3CALLBACKMEMBER(int , pfnLockVM,(PPDMDEVINS pDevIns));2418 2419 /**2420 * Release global VM lock2421 *2422 * @returns VBox status code2423 * @param pDevIns Device instance.2424 */2425 DECLR3CALLBACKMEMBER(int, pfnUnlockVM,(PPDMDEVINS pDevIns));2426 2427 /**2428 * Check that the current thread owns the global VM lock.2429 *2430 * @returns boolean2431 * @param pDevIns Device instance.2432 * @param pszFile Filename of the assertion location.2433 * @param iLine Linenumber of the assertion location.2434 * @param pszFunction Function of the assertion location.2435 */2436 DECLR3CALLBACKMEMBER(bool, pfnAssertVMLock,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));2437 2438 /**2439 * Register transfer function for DMA channel.2440 *2441 * @returns VBox status code.2442 * @param pDevIns Device instance.2443 * @param uChannel Channel number.2444 * @param pfnTransferHandler Device specific transfer callback function.2445 * @param pvUser User pointer to pass to the callback.2446 * @thread EMT2447 */2448 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));2449 2450 /**2451 * Read memory.2452 *2453 * @returns VBox status code.2454 * @param pDevIns Device instance.2455 * @param uChannel Channel number.2456 * @param pvBuffer Pointer to target buffer.2457 * @param off DMA position.2458 * @param cbBlock Block size.2459 * @param pcbRead Where to store the number of bytes which was read. optional.2460 * @thread EMT2461 */2462 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));2463 2464 /**2465 * Write memory.2466 *2467 * @returns VBox status code.2468 * @param pDevIns Device instance.2469 * @param uChannel Channel number.2470 * @param pvBuffer Memory to write.2471 * @param off DMA position.2472 * @param cbBlock Block size.2473 * @param pcbWritten Where to store the number of bytes which was written. optional.2474 * @thread EMT2475 */2476 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));2477 2478 /**2479 * Set the DREQ line.2480 *2481 * @returns VBox status code.2482 * @param pDevIns Device instance.2483 * @param uChannel Channel number.2484 * @param uLevel Level of the line.2485 * @thread EMT2486 */2487 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));2488 2489 /**2490 * Get channel mode.2491 *2492 * @returns Channel mode. See specs.2493 * @param pDevIns Device instance.2494 * @param uChannel Channel number.2495 * @thread EMT2496 */2497 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));2498 2499 /**2500 * Schedule DMA execution.2501 *2502 * @param pDevIns Device instance.2503 * @thread Any thread.2504 */2505 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));2506 2507 /**2508 * Write CMOS value and update the checksum(s).2509 *2510 * @returns VBox status code.2511 * @param pDevIns Device instance.2512 * @param iReg The CMOS register index.2513 * @param u8Value The CMOS register value.2514 * @thread EMT2515 */2516 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));2517 2518 /**2519 * Read CMOS value.2520 *2521 * @returns VBox status code.2522 * @param pDevIns Device instance.2523 * @param iReg The CMOS register index.2524 * @param pu8Value Where to store the CMOS register value.2525 * @thread EMT2526 */2527 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));2528 2529 /**2530 * Query CPUID.2531 *2532 * @param pDevIns Device instance.2533 * @param iLeaf The CPUID leaf to get.2534 * @param pEax Where to store the EAX value.2535 * @param pEbx Where to store the EBX value.2536 * @param pEcx Where to store the ECX value.2537 * @param pEdx Where to store the EDX value.2538 */2539 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));2540 2541 /** @} */2542 2543 /** Just a safety precaution. (The value is 0.) */2544 uint32_t u32TheEnd;2545 } PDMDEVHLP;2546 #endif /* !IN_RING3 */2547 /** Pointer PDM Device API. */2548 typedef HCPTRTYPE(struct PDMDEVHLP *) PPDMDEVHLP;2549 /** Pointer PDM Device API. */2550 typedef HCPTRTYPE(const struct PDMDEVHLP *) PCPDMDEVHLP;2551 2552 /** Current PDMDEVHLP version number. */2553 #define PDM_DEVHLP_VERSION 0xf20400002554 2555 2556 /**2557 * PDM Device API - GC Variant.2558 */2559 typedef struct PDMDEVHLPGC2560 {2561 /** Structure version. PDM_DEVHLPGC_VERSION defines the current version. */2562 uint32_t u32Version;2563 2564 /**2565 * Set the IRQ for a PCI device.2566 *2567 * @param pDevIns Device instance.2568 * @param iIrq IRQ number to set.2569 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.2570 * @thread Any thread, but will involve the emulation thread.2571 */2572 DECLGCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));2573 2574 /**2575 * Set ISA IRQ for a device.2576 *2577 * @param pDevIns Device instance.2578 * @param iIrq IRQ number to set.2579 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.2580 * @thread Any thread, but will involve the emulation thread.2581 */2582 DECLGCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));2583 2584 /**2585 * Read physical memory.2586 *2587 * @param pDevIns Device instance.2588 * @param GCPhys Physical address start reading from.2589 * @param pvBuf Where to put the read bits.2590 * @param cbRead How many bytes to read.2591 */2592 DECLGCCALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));2593 2594 /**2595 * Write to physical memory.2596 *2597 * @param pDevIns Device instance.2598 * @param GCPhys Physical address to write to.2599 * @param pvBuf What to write.2600 * @param cbWrite How many bytes to write.2601 */2602 DECLGCCALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));2603 2604 /**2605 * Checks if the Gate A20 is enabled or not.2606 *2607 * @returns true if A20 is enabled.2608 * @returns false if A20 is disabled.2609 * @param pDevIns Device instance.2610 * @thread The emulation thread.2611 */2612 DECLGCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));2613 2614 /**2615 * Set the VM error message2616 *2617 * @returns rc.2618 * @param pDrvIns Driver instance.2619 * @param rc VBox status code.2620 * @param RT_SRC_POS_DECL Use RT_SRC_POS.2621 * @param pszFormat Error message format string.2622 * @param ... Error message arguments.2623 */2624 DECLGCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));2625 2626 /**2627 * Set the VM error message2628 *2629 * @returns rc.2630 * @param pDrvIns Driver instance.2631 * @param rc VBox status code.2632 * @param RT_SRC_POS_DECL Use RT_SRC_POS.2633 * @param pszFormat Error message format string.2634 * @param va Error message arguments.2635 */2636 DECLGCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));2637 2638 /**2639 * Set the VM runtime error message2640 *2641 * @returns VBox status code.2642 * @param pDevIns Device instance.2643 * @param fFatal Whether it is a fatal error or not.2644 * @param pszErrorID Error ID string.2645 * @param pszFormat Error message format string.2646 * @param ... Error message arguments.2647 */2648 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));2649 2650 /**2651 * Set the VM runtime error message2652 *2653 * @returns VBox status code.2654 * @param pDevIns Device instance.2655 * @param fFatal Whether it is a fatal error or not.2656 * @param pszErrorID Error ID string.2657 * @param pszFormat Error message format string.2658 * @param va Error message arguments.2659 */2660 DECLGCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));2661 2662 /**2663 * Set parameters for pending MMIO patch operation2664 *2665 * @returns VBox status code.2666 * @param pDevIns Device instance.2667 * @param GCPhys MMIO physical address2668 * @param pCachedData GC pointer to cached data2669 */2670 DECLGCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));2671 2672 /** Just a safety precaution. */2673 uint32_t u32TheEnd;2674 } PDMDEVHLPGC;2675 /** Pointer PDM Device GC API. */2676 typedef GCPTRTYPE(struct PDMDEVHLPGC *) PPDMDEVHLPGC;2677 /** Pointer PDM Device GC API. */2678 typedef GCPTRTYPE(const struct PDMDEVHLPGC *) PCPDMDEVHLPGC;2679 2680 /** Current PDMDEVHLP version number. */2681 #define PDM_DEVHLPGC_VERSION 0xfb0100002682 2683 2684 /**2685 * PDM Device API - R0 Variant.2686 */2687 typedef struct PDMDEVHLPR02688 {2689 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */2690 uint32_t u32Version;2691 2692 /**2693 * Set the IRQ for a PCI device.2694 *2695 * @param pDevIns Device instance.2696 * @param iIrq IRQ number to set.2697 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.2698 * @thread Any thread, but will involve the emulation thread.2699 */2700 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));2701 2702 /**2703 * Set ISA IRQ for a device.2704 *2705 * @param pDevIns Device instance.2706 * @param iIrq IRQ number to set.2707 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.2708 * @thread Any thread, but will involve the emulation thread.2709 */2710 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));2711 2712 /**2713 * Read physical memory.2714 *2715 * @param pDevIns Device instance.2716 * @param GCPhys Physical address start reading from.2717 * @param pvBuf Where to put the read bits.2718 * @param cbRead How many bytes to read.2719 */2720 DECLR0CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));2721 2722 /**2723 * Write to physical memory.2724 *2725 * @param pDevIns Device instance.2726 * @param GCPhys Physical address to write to.2727 * @param pvBuf What to write.2728 * @param cbWrite How many bytes to write.2729 */2730 DECLR0CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));2731 2732 /**2733 * Checks if the Gate A20 is enabled or not.2734 *2735 * @returns true if A20 is enabled.2736 * @returns false if A20 is disabled.2737 * @param pDevIns Device instance.2738 * @thread The emulation thread.2739 */2740 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));2741 2742 /**2743 * Set the VM error message2744 *2745 * @returns rc.2746 * @param pDrvIns Driver instance.2747 * @param rc VBox status code.2748 * @param RT_SRC_POS_DECL Use RT_SRC_POS.2749 * @param pszFormat Error message format string.2750 * @param ... Error message arguments.2751 */2752 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));2753 2754 /**2755 * Set the VM error message2756 *2757 * @returns rc.2758 * @param pDrvIns Driver instance.2759 * @param rc VBox status code.2760 * @param RT_SRC_POS_DECL Use RT_SRC_POS.2761 * @param pszFormat Error message format string.2762 * @param va Error message arguments.2763 */2764 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));2765 2766 /**2767 * Set the VM runtime error message2768 *2769 * @returns VBox status code.2770 * @param pDevIns Device instance.2771 * @param fFatal Whether it is a fatal error or not.2772 * @param pszErrorID Error ID string.2773 * @param pszFormat Error message format string.2774 * @param ... Error message arguments.2775 */2776 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));2777 2778 /**2779 * Set the VM runtime error message2780 *2781 * @returns VBox status code.2782 * @param pDevIns Device instance.2783 * @param fFatal Whether it is a fatal error or not.2784 * @param pszErrorID Error ID string.2785 * @param pszFormat Error message format string.2786 * @param va Error message arguments.2787 */2788 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));2789 2790 /**2791 * Set parameters for pending MMIO patch operation2792 *2793 * @returns rc.2794 * @param pDevIns Device instance.2795 * @param GCPhys MMIO physical address2796 * @param pCachedData GC pointer to cached data2797 */2798 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));2799 2800 /** Just a safety precaution. */2801 uint32_t u32TheEnd;2802 } PDMDEVHLPR0;2803 /** Pointer PDM Device R0 API. */2804 typedef HCPTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;2805 /** Pointer PDM Device GC API. */2806 typedef HCPTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;2807 2808 /** Current PDMDEVHLP version number. */2809 #define PDM_DEVHLPR0_VERSION 0xfb0100002810 2811 2812 2813 /**2814 * PDM Device Instance.2815 */2816 typedef struct PDMDEVINS2817 {2818 /** Structure version. PDM_DEVINS_VERSION defines the current version. */2819 uint32_t u32Version;2820 /** Device instance number. */2821 RTUINT iInstance;2822 /** The base interface of the device.2823 * The device constructor initializes this if it has any2824 * device level interfaces to export. To obtain this interface2825 * call PDMR3QueryDevice(). */2826 PDMIBASE IBase;2827 2828 /** Internal data. */2829 union2830 {2831 #ifdef PDMDEVINSINT_DECLARED2832 PDMDEVINSINT s;2833 #endif2834 uint8_t padding[HC_ARCH_BITS == 32 ? 48 : 96];2835 } Internal;2836 2837 /** Pointer the HC PDM Device API. */2838 R3PTRTYPE(PCPDMDEVHLP) pDevHlp;2839 /** Pointer the R0 PDM Device API. */2840 R0PTRTYPE(PCPDMDEVHLPR0) pDevHlpR0;2841 /** Pointer to device registration structure. */2842 R3PTRTYPE(PCPDMDEVREG) pDevReg;2843 /** Configuration handle. */2844 R3PTRTYPE(PCFGMNODE) pCfgHandle;2845 /** Pointer to device instance data. */2846 R3PTRTYPE(void *) pvInstanceDataR3;2847 /** Pointer to device instance data. */2848 R0PTRTYPE(void *) pvInstanceDataR0;2849 /** Pointer the GC PDM Device API. */2850 GCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC;2851 /** Pointer to device instance data. */2852 GCPTRTYPE(void *) pvInstanceDataGC;2853 /* padding to make achInstanceData aligned at 32 byte boundrary. */2854 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 1 : 6];2855 /** Device instance data. The size of this area is defined2856 * in the PDMDEVREG::cbInstanceData field. */2857 char achInstanceData[8];2858 } PDMDEVINS;2859 2860 /** Current DEVREG version number. */2861 #define PDM_DEVINS_VERSION 0xf30100002862 2863 /** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */2864 #define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )2865 2866 2867 /** @def PDMDEV_ASSERT_EMT2868 * Assert that the current thread is the emulation thread.2869 */2870 #ifdef VBOX_STRICT2871 # define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlp->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)2872 #else2873 # define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)2874 #endif2875 2876 /** @def PDMDEV_ASSERT_OTHER2877 * Assert that the current thread is NOT the emulation thread.2878 */2879 #ifdef VBOX_STRICT2880 # define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlp->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)2881 #else2882 # define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)2883 #endif2884 2885 /** @def PDMDEV_ASSERT_VMLOCK_OWNER2886 * Assert that the current thread is owner of the VM lock.2887 */2888 #ifdef VBOX_STRICT2889 # define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlp->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)2890 #else2891 # define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)2892 #endif2893 2894 /** @def PDMDEV_SET_ERROR2895 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.2896 */2897 #define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \2898 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)2899 2900 /** @def PDMDEV_SET_RUNTIME_ERROR2901 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.2902 */2903 #define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFatal, pszErrorID, pszError) \2904 PDMDevHlpVMSetRuntimeError(pDevIns, fFatal, pszErrorID, "%s", pszError)2905 2906 38 /** @def PDMINS2DATA 2907 * Converts a PDM Device or Driver instance pointer to a pointer to the instance data.39 * Converts a PDM Device, USB Device, or Driver instance pointer to a pointer to the instance data. 2908 40 */ 2909 41 #define PDMINS2DATA(pIns, type) ( (type)(void *)&(pIns)->achInstanceData[0] ) 2910 42 2911 43 /** @def PDMINS2DATA_GCPTR 2912 * Converts a PDM Device or Driver instance pointer to a GC pointer to the instance data.44 * Converts a PDM Device, USB Device, or Driver instance pointer to a GC pointer to the instance data. 2913 45 */ 2914 46 #define PDMINS2DATA_GCPTR(pIns) ( (pIns)->pvInstanceDataGC ) 2915 47 2916 48 /** @def PDMINS2DATA_R3PTR 2917 * Converts a PDM Device or Driver instance pointer to a HC pointer to the instance data.49 * Converts a PDM Device, USB Device, or Driver instance pointer to a HC pointer to the instance data. 2918 50 */ 2919 51 #define PDMINS2DATA_R3PTR(pIns) ( (pIns)->pvInstanceDataR3 ) 2920 52 2921 53 /** @def PDMINS2DATA_R0PTR 2922 * Converts a PDM Device or Driver instance pointer to a R0 pointer to the instance data.54 * Converts a PDM Device, USB Device, or Driver instance pointer to a R0 pointer to the instance data. 2923 55 */ 2924 56 #define PDMINS2DATA_R0PTR(pIns) ( (pIns)->pvInstanceDataR0 ) 2925 57 2926 /** @def PDMDEVINS_2_GCPTR2927 * Converts a PDM Device instance pointer a GC PDM Device instance pointer.2928 */2929 #define PDMDEVINS_2_GCPTR(pDevIns) ( (GCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataGC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )2930 2931 /** @def PDMDEVINS_2_R3PTR2932 * Converts a PDM Device instance pointer a HC PDM Device instance pointer.2933 */2934 #define PDMDEVINS_2_R3PTR(pDevIns) ( (HCPTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )2935 2936 /** @def PDMDEVINS_2_R0PTR2937 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.2938 */2939 #define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )2940 2941 2942 /**2943 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.2944 *2945 * @returns VBox status code which must be passed up to the VMM.2946 * @param pDevIns Device instance.2947 * @param RT_SRC_POS_DECL Use RT_SRC_POS.2948 * @param pszFormat Message. (optional)2949 * @param ... Message parameters.2950 */2951 DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)2952 {2953 #ifdef VBOX_STRICT2954 # ifdef IN_RING32955 int rc;2956 va_list args;2957 va_start(args, pszFormat);2958 rc = pDevIns->pDevHlp->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);2959 va_end(args);2960 return rc;2961 # else2962 return VINF_EM_DBG_STOP;2963 # endif2964 #else2965 return VINF_SUCCESS;2966 58 #endif 2967 }2968 2969 2970 #ifdef IN_RING32971 /**2972 * @copydoc PDMDEVHLP::pfnIOPortRegister2973 */2974 DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,2975 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,2976 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)2977 {2978 return pDevIns->pDevHlp->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);2979 }2980 2981 /**2982 * @copydoc PDMDEVHLP::pfnIOPortRegisterGC2983 */2984 DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser,2985 const char *pszOut, const char *pszIn, const char *pszOutStr,2986 const char *pszInStr, const char *pszDesc)2987 {2988 return pDevIns->pDevHlp->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);2989 }2990 2991 /**2992 * @copydoc PDMDEVHLP::pfnIOPortRegisterR02993 */2994 DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,2995 const char *pszOut, const char *pszIn, const char *pszOutStr,2996 const char *pszInStr, const char *pszDesc)2997 {2998 return pDevIns->pDevHlp->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);2999 }3000 3001 /**3002 * @copydoc PDMDEVHLP::pfnMMIORegister3003 */3004 DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,3005 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,3006 const char *pszDesc)3007 {3008 return pDevIns->pDevHlp->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);3009 }3010 3011 /**3012 * @copydoc PDMDEVHLP::pfnMMIORegisterGC3013 */3014 DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,3015 const char *pszWrite, const char *pszRead, const char *pszFill, const char *pszDesc)3016 {3017 return pDevIns->pDevHlp->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, pszDesc);3018 }3019 3020 /**3021 * @copydoc PDMDEVHLP::pfnMMIORegisterR03022 */3023 DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,3024 const char *pszWrite, const char *pszRead, const char *pszFill, const char *pszDesc)3025 {3026 return pDevIns->pDevHlp->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, pszDesc);3027 }3028 3029 /**3030 * @copydoc PDMDEVHLP::pfnROMRegister3031 */3032 DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, const char *pszDesc)3033 {3034 return pDevIns->pDevHlp->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, pszDesc);3035 }3036 3037 /**3038 * @copydoc PDMDEVHLP::pfnSSMRegister3039 */3040 DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,3041 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,3042 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)3043 {3044 return pDevIns->pDevHlp->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,3045 pfnSavePrep, pfnSaveExec, pfnSaveDone,3046 pfnLoadPrep, pfnLoadExec, pfnLoadDone);3047 }3048 3049 /**3050 * @copydoc PDMDEVHLP::pfnTMTimerCreate3051 */3052 DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERHC ppTimer)3053 {3054 return pDevIns->pDevHlp->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);3055 }3056 3057 /**3058 * @copydoc PDMDEVHLP::pfnPCIRegister3059 */3060 DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)3061 {3062 return pDevIns->pDevHlp->pfnPCIRegister(pDevIns, pPciDev);3063 }3064 3065 /**3066 * @copydoc PDMDEVHLP::pfnPCIIORegionRegister3067 */3068 DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)3069 {3070 return pDevIns->pDevHlp->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);3071 }3072 3073 /**3074 * @copydoc PDMDEVHLP::pfnPCISetConfigCallbacks3075 */3076 DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,3077 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)3078 {3079 pDevIns->pDevHlp->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);3080 }3081 3082 /**3083 * @copydoc PDMDEVHLP::pfnDriverAttach3084 */3085 DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)3086 {3087 return pDevIns->pDevHlp->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);3088 }3089 3090 /**3091 * @copydoc PDMDEVHLP::pfnMMHeapAlloc3092 */3093 DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)3094 {3095 return pDevIns->pDevHlp->pfnMMHeapAlloc(pDevIns, cb);3096 }3097 3098 /**3099 * @copydoc PDMDEVHLP::pfnMMHeapAllocZ3100 */3101 DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)3102 {3103 return pDevIns->pDevHlp->pfnMMHeapAllocZ(pDevIns, cb);3104 }3105 3106 /**3107 * @copydoc PDMDEVHLP::pfnMMHeapFree3108 */3109 DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)3110 {3111 pDevIns->pDevHlp->pfnMMHeapFree(pDevIns, pv);3112 }3113 3114 /**3115 * @copydoc PDMDEVHLP::pfnDBGFInfoRegister3116 */3117 DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)3118 {3119 return pDevIns->pDevHlp->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);3120 }3121 3122 /**3123 * @copydoc PDMDEVHLP::pfnSTAMRegister3124 */3125 DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)3126 {3127 pDevIns->pDevHlp->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);3128 }3129 3130 /**3131 * @copydoc PDMDEVHLP::pfnSTAMRegisterF3132 */3133 DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,3134 const char *pszDesc, const char *pszName, ...)3135 {3136 va_list va;3137 va_start(va, pszName);3138 pDevIns->pDevHlp->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);3139 va_end(va);3140 }3141 3142 /**3143 * @copydoc PDMDEVHLP::pfnPDMQueueCreate3144 */3145 DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,3146 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)3147 {3148 return pDevIns->pDevHlp->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);3149 }3150 3151 /**3152 * @copydoc PDMDEVHLP::pfnCritSectInit3153 */3154 DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)3155 {3156 return pDevIns->pDevHlp->pfnCritSectInit(pDevIns, pCritSect, pszName);3157 }3158 3159 /**3160 * @copydoc PDMDEVHLP::pfnUTCNow3161 */3162 DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)3163 {3164 return pDevIns->pDevHlp->pfnUTCNow(pDevIns, pTime);3165 }3166 3167 /**3168 * @copydoc PDMDEVHLP::pfnGetVM3169 */3170 DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)3171 {3172 return pDevIns->pDevHlp->pfnGetVM(pDevIns);3173 }3174 3175 /**3176 * @copydoc PDMDEVHLP::pfnPhysReadGCVirt3177 */3178 DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)3179 {3180 return pDevIns->pDevHlp->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);3181 }3182 3183 /**3184 * @copydoc PDMDEVHLP::pfnPhysWriteGCVirt3185 */3186 DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)3187 {3188 return pDevIns->pDevHlp->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);3189 }3190 3191 /**3192 * @copydoc PDMDEVHLP::pfnPhysReserve3193 */3194 DECLINLINE(int) PDMDevHlpPhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)3195 {3196 return pDevIns->pDevHlp->pfnPhysReserve(pDevIns, GCPhys, cbRange, pszDesc);3197 }3198 3199 /**3200 * @copydoc PDMDEVHLP::pfnPhys2HCVirt3201 */3202 DECLINLINE(int) PDMDevHlpPhys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC)3203 {3204 return pDevIns->pDevHlp->pfnPhys2HCVirt(pDevIns, GCPhys, cbRange, ppvHC);3205 }3206 3207 /**3208 * @copydoc PDMDEVHLP::pfnPhysGCPtr2HCPtr3209 */3210 DECLINLINE(int) PDMDevHlpPhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr)3211 {3212 return pDevIns->pDevHlp->pfnPhysGCPtr2HCPtr(pDevIns, GCPtr, pHCPtr);3213 }3214 3215 /**3216 * @copydoc PDMDEVHLP::pfnA20Set3217 */3218 DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)3219 {3220 pDevIns->pDevHlp->pfnA20Set(pDevIns, fEnable);3221 }3222 3223 /**3224 * @copydoc PDMDEVHLP::pfnVMReset3225 */3226 DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)3227 {3228 return pDevIns->pDevHlp->pfnVMReset(pDevIns);3229 }3230 3231 /**3232 * @copydoc PDMDEVHLP::pfnVMSuspend3233 */3234 DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)3235 {3236 return pDevIns->pDevHlp->pfnVMSuspend(pDevIns);3237 }3238 3239 /**3240 * @copydoc PDMDEVHLP::pfnVMPowerOff3241 */3242 DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)3243 {3244 return pDevIns->pDevHlp->pfnVMPowerOff(pDevIns);3245 }3246 3247 /**3248 * @copydoc PDMDEVHLP::pfnDMARegister3249 */3250 DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)3251 {3252 return pDevIns->pDevHlp->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);3253 }3254 3255 /**3256 * @copydoc PDMDEVHLP::pfnDMAReadMemory3257 */3258 DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)3259 {3260 return pDevIns->pDevHlp->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);3261 }3262 3263 /**3264 * @copydoc PDMDEVHLP::pfnDMAWriteMemory3265 */3266 DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)3267 {3268 return pDevIns->pDevHlp->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);3269 }3270 3271 /**3272 * @copydoc PDMDEVHLP::pfnDMASetDREQ3273 */3274 DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)3275 {3276 return pDevIns->pDevHlp->pfnDMASetDREQ(pDevIns, uChannel, uLevel);3277 }3278 3279 /**3280 * @copydoc PDMDEVHLP::pfnDMAGetChannelMode3281 */3282 DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)3283 {3284 return pDevIns->pDevHlp->pfnDMAGetChannelMode(pDevIns, uChannel);3285 }3286 3287 /**3288 * @copydoc PDMDEVHLP::pfnDMASchedule3289 */3290 DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)3291 {3292 pDevIns->pDevHlp->pfnDMASchedule(pDevIns);3293 }3294 3295 /**3296 * @copydoc PDMDEVHLP::pfnCMOSWrite3297 */3298 DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)3299 {3300 return pDevIns->pDevHlp->pfnCMOSWrite(pDevIns, iReg, u8Value);3301 }3302 3303 /**3304 * @copydoc PDMDEVHLP::pfnCMOSRead3305 */3306 DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)3307 {3308 return pDevIns->pDevHlp->pfnCMOSRead(pDevIns, iReg, pu8Value);3309 }3310 3311 /**3312 * @copydoc PDMDEVHLP::pfnGetCpuId3313 */3314 DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)3315 {3316 pDevIns->pDevHlp->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);3317 }3318 3319 /**3320 * @copydoc PDMDEVHLP::pfnPDMThreadCreate3321 */3322 DECLINLINE(int) PDMDevHlpPDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,3323 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)3324 {3325 return pDevIns->pDevHlp->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);3326 }3327 #endif /* IN_RING3 */3328 3329 3330 /**3331 * @copydoc PDMDEVHLP::pfnPCISetIrq3332 */3333 DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)3334 {3335 #ifdef IN_GC3336 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);3337 #elif defined(IN_RING0)3338 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);3339 #else3340 pDevIns->pDevHlp->pfnPCISetIrq(pDevIns, iIrq, iLevel);3341 #endif3342 }3343 3344 /**3345 * @copydoc PDMDEVHLP::pfnPCISetIrqNoWait3346 */3347 DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)3348 {3349 #ifdef IN_GC3350 pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);3351 #elif defined(IN_RING0)3352 pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);3353 #else3354 pDevIns->pDevHlp->pfnPCISetIrqNoWait(pDevIns, iIrq, iLevel);3355 #endif3356 }3357 3358 /**3359 * @copydoc PDMDEVHLP::pfnISASetIrq3360 */3361 DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)3362 {3363 #ifdef IN_GC3364 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);3365 #elif defined(IN_RING0)3366 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);3367 #else3368 pDevIns->pDevHlp->pfnISASetIrq(pDevIns, iIrq, iLevel);3369 #endif3370 }3371 3372 /**3373 * @copydoc PDMDEVHLP::pfnISASetIrqNoWait3374 */3375 DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)3376 {3377 #ifdef IN_GC3378 pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);3379 #elif defined(IN_RING0)3380 pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);3381 #else3382 pDevIns->pDevHlp->pfnISASetIrqNoWait(pDevIns, iIrq, iLevel);3383 #endif3384 }3385 3386 /**3387 * @copydoc PDMDEVHLP::pfnPhysRead3388 */3389 DECLINLINE(void) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)3390 {3391 #ifdef IN_GC3392 pDevIns->pDevHlpGC->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);3393 #elif defined(IN_RING0)3394 pDevIns->pDevHlpR0->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);3395 #else3396 pDevIns->pDevHlp->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);3397 #endif3398 }3399 3400 /**3401 * @copydoc PDMDEVHLP::pfnPhysWrite3402 */3403 DECLINLINE(void) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)3404 {3405 #ifdef IN_GC3406 pDevIns->pDevHlpGC->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);3407 #elif defined(IN_RING0)3408 pDevIns->pDevHlpR0->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);3409 #else3410 pDevIns->pDevHlp->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);3411 #endif3412 }3413 3414 /**3415 * @copydoc PDMDEVHLP::pfnA20IsEnabled3416 */3417 DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)3418 {3419 #ifdef IN_GC3420 return pDevIns->pDevHlpGC->pfnA20IsEnabled(pDevIns);3421 #elif defined(IN_RING0)3422 return pDevIns->pDevHlpR0->pfnA20IsEnabled(pDevIns);3423 #else3424 return pDevIns->pDevHlp->pfnA20IsEnabled(pDevIns);3425 #endif3426 }3427 3428 /**3429 * @copydoc PDMDEVHLP::pfnVMSetError3430 */3431 DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)3432 {3433 va_list va;3434 va_start(va, pszFormat);3435 #ifdef IN_GC3436 pDevIns->pDevHlpGC->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);3437 #elif defined(IN_RING0)3438 pDevIns->pDevHlpR0->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);3439 #else3440 pDevIns->pDevHlp->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);3441 #endif3442 va_end(va);3443 return rc;3444 }3445 3446 /**3447 * @copydoc PDMDEVHLP::pfnVMSetRuntimeError3448 */3449 DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)3450 {3451 va_list va;3452 int rc;3453 va_start(va, pszFormat);3454 #ifdef IN_GC3455 rc = pDevIns->pDevHlpGC->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);3456 #elif defined(IN_RING0)3457 rc = pDevIns->pDevHlpR0->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);3458 #else3459 rc = pDevIns->pDevHlp->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);3460 #endif3461 va_end(va);3462 return rc;3463 }3464 3465 3466 3467 /** Pointer to callbacks provided to the VBoxDeviceRegister() call. */3468 typedef struct PDMDEVREGCB *PPDMDEVREGCB;3469 3470 /**3471 * Callbacks for VBoxDeviceRegister().3472 */3473 typedef struct PDMDEVREGCB3474 {3475 /** Interface version.3476 * This is set to PDM_DEVREG_CB_VERSION. */3477 uint32_t u32Version;3478 3479 /**3480 * Registers a device with the current VM instance.3481 *3482 * @returns VBox status code.3483 * @param pCallbacks Pointer to the callback table.3484 * @param pDevReg Pointer to the device registration record.3485 * This data must be permanent and readonly.3486 */3487 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));3488 3489 /**3490 * Allocate memory which is associated with current VM instance3491 * and automatically freed on it's destruction.3492 *3493 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.3494 * @param pCallbacks Pointer to the callback table.3495 * @param cb Number of bytes to allocate.3496 */3497 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));3498 } PDMDEVREGCB;3499 3500 /** Current version of the PDMDEVREGCB structure. */3501 #define PDM_DEVREG_CB_VERSION 0xf40100003502 3503 3504 /**3505 * The VBoxDevicesRegister callback function.3506 *3507 * PDM will invoke this function after loading a device module and letting3508 * the module decide which devices to register and how to handle conflicts.3509 *3510 * @returns VBox status code.3511 * @param pCallbacks Pointer to the callback table.3512 * @param u32Version VBox version number.3513 */3514 typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);3515 3516 /** @} */3517 3518 __END_DECLS3519 3520 #endif -
trunk/include/VBox/pdmusb.h
r4011 r4014 30 30 #include <VBox/cfgm.h> 31 31 #include <VBox/dbgf.h> 32 #include <VBox/mm.h> 32 33 #include <VBox/err.h> 33 34 #include <iprt/stdarg.h> -
trunk/src/VBox/Devices/Audio/DevIchAc97.cpp
r3666 r4014 24 24 *******************************************************************************/ 25 25 #define LOG_GROUP LOG_GROUP_DEV_AUDIO 26 #include <VBox/pdm.h> 27 #include <VBox/err.h> 28 29 #include <VBox/log.h> 26 #include <VBox/pdmdev.h> 30 27 #include <iprt/assert.h> 31 28 #include <iprt/uuid.h> 32 29 #include <iprt/string.h> 33 #include <VBox/mm.h>34 30 35 31 #include "Builtins.h" -
trunk/src/VBox/Devices/Bus/DevPCI.cpp
r3650 r4014 53 53 #define PCI_INCLUDE_PRIVATE 54 54 #include <VBox/pci.h> 55 #include <VBox/pdm.h> 56 #include <VBox/err.h> 57 58 #include <VBox/log.h> 55 #include <VBox/pdmdev.h> 59 56 #include <iprt/assert.h> 60 57 #include <iprt/string.h> -
trunk/src/VBox/Devices/Graphics/DevVGA.cpp
r3815 r4014 91 91 *******************************************************************************/ 92 92 #define LOG_GROUP LOG_GROUP_DEV_VGA 93 #include <VBox/pdm.h> 94 #include <VBox/stam.h> 93 #include <VBox/pdmdev.h> 95 94 #include <VBox/pgm.h> 96 #include <VBox/mm.h>97 #include <VBox/err.h>98 99 #include <VBox/log.h>100 95 #include <iprt/assert.h> 101 96 #include <iprt/asm.h> -
trunk/src/VBox/Devices/Input/DevPS2.cpp
r3265 r4014 55 55 #define LOG_GROUP LOG_GROUP_DEV_KBD 56 56 #include "vl_vbox.h" 57 #include <VBox/pdm.h> 58 #include <VBox/err.h> 59 60 #include <VBox/log.h> 57 #include <VBox/pdmdev.h> 61 58 #include <iprt/assert.h> 62 59 -
trunk/src/VBox/Devices/Input/DrvKeyboardQueue.cpp
r2981 r4014 26 26 *******************************************************************************/ 27 27 #define LOG_GROUP LOG_GROUP_DRV_KBD_QUEUE 28 #include <VBox/pdm.h> 29 #include <VBox/err.h> 30 31 #include <VBox/log.h> 28 #include <VBox/pdmdrv.h> 32 29 #include <iprt/assert.h> 33 30 -
trunk/src/VBox/Devices/Input/DrvMouseQueue.cpp
r2981 r4014 22 22 23 23 24 25 24 /******************************************************************************* 26 25 * Header Files * 27 26 *******************************************************************************/ 28 27 #define LOG_GROUP LOG_GROUP_DRV_MOUSE_QUEUE 29 #include <VBox/pdm.h> 30 #include <VBox/err.h> 31 32 #include <VBox/log.h> 28 #include <VBox/pdmdrv.h> 33 29 #include <iprt/assert.h> 34 30 -
trunk/src/VBox/Devices/Network/DevPCNet.cpp
r3666 r4014 56 56 *******************************************************************************/ 57 57 #define LOG_GROUP LOG_GROUP_DEV_PCNET 58 #include <VBox/err.h> 59 #include <VBox/log.h> 60 #include <VBox/mm.h> 61 #include <VBox/pdm.h> 58 #include <VBox/pdmdev.h> 62 59 #include <VBox/pgm.h> 63 #include <VBox/stam.h>64 60 #include <VBox/vm.h> /* for VM_IS_EMT */ 65 61 #include <iprt/asm.h> … … 69 65 #include <iprt/time.h> 70 66 #ifdef IN_RING3 71 # include <iprt/mem.h>72 # include <iprt/semaphore.h>67 # include <iprt/mem.h> 68 # include <iprt/semaphore.h> 73 69 #endif 74 70 -
trunk/src/VBox/Devices/Network/DrvIntNet.cpp
r2981 r4014 26 26 *******************************************************************************/ 27 27 #define LOG_GROUP LOG_GROUP_DRV_INTNET 28 #include <VBox/pdm .h>28 #include <VBox/pdmdrv.h> 29 29 #include <VBox/cfgm.h> 30 30 #include <VBox/intnet.h> -
trunk/src/VBox/Devices/Network/DrvNAT.cpp
r2981 r4014 27 27 #define LOG_GROUP LOG_GROUP_DRV_NAT 28 28 #include "Network/slirp/libslirp.h" 29 #include <VBox/pdm.h> 30 #include <VBox/cfgm.h> 31 #include <VBox/mm.h> 32 #include <VBox/err.h> 33 34 #include <VBox/log.h> 29 #include <VBox/pdmdrv.h> 35 30 #include <iprt/assert.h> 36 31 #include <iprt/file.h> -
trunk/src/VBox/Devices/Network/DrvNetSniffer.cpp
r3196 r4014 26 26 *******************************************************************************/ 27 27 #define LOG_GROUP LOG_GROUP_DRV_NAT 28 #include <VBox/pdm.h> 29 #include <VBox/cfgm.h> 30 #include <VBox/mm.h> 31 #include <VBox/err.h> 28 #include <VBox/pdmdrv.h> 32 29 33 30 #include <VBox/log.h> -
trunk/src/VBox/Devices/Network/DrvTAP.cpp
r3931 r4014 29 29 *******************************************************************************/ 30 30 #define LOG_GROUP LOG_GROUP_DRV_TUN 31 #include <VBox/cfgm.h> 32 #include <VBox/err.h> 33 #include <VBox/log.h> 34 #include <VBox/mm.h> 35 #include <VBox/pdm.h> 31 #include <VBox/pdmdrv.h> 36 32 37 33 #include <iprt/assert.h> -
trunk/src/VBox/Devices/Network/DrvTAPOs2.cpp
r3521 r4014 26 26 *******************************************************************************/ 27 27 #define LOG_GROUP LOG_GROUP_DRV_TUN 28 #include <VBox/cfgm.h> 29 #include <VBox/err.h> 30 #include <VBox/log.h> 31 #include <VBox/mm.h> 32 #include <VBox/pdm.h> 28 #include <VBox/pdmdrv.h> 33 29 34 30 #include <iprt/assert.h> -
trunk/src/VBox/Devices/Network/DrvTAPWin32.cpp
r2981 r4014 28 28 *******************************************************************************/ 29 29 #define LOG_GROUP LOG_GROUP_DRV_TUN 30 #include <VBox/pdm.h> 31 #include <VBox/cfgm.h> 32 #include <VBox/mm.h> 33 #include <VBox/err.h> 30 #include <VBox/pdmdrv.h> 34 31 #include <VBox/stam.h> 35 32 -
trunk/src/VBox/Devices/PC/DevACPI.cpp
r3645 r4014 22 22 #define LOG_GROUP LOG_GROUP_DEV_ACPI 23 23 24 #include <VBox/pdm .h>24 #include <VBox/pdmdev.h> 25 25 #include <VBox/log.h> 26 26 #include <iprt/assert.h> -
trunk/src/VBox/Devices/PC/DevAPIC.cpp
r3942 r4014 32 32 *******************************************************************************/ 33 33 #define LOG_GROUP LOG_GROUP_DEV_APIC 34 #include <VBox/pdm .h>34 #include <VBox/pdmdev.h> 35 35 36 36 #include <VBox/log.h> -
trunk/src/VBox/Devices/PC/DevDMA.cpp
r2981 r4014 51 51 * Header Files * 52 52 *******************************************************************************/ 53 #include <VBox/pdm .h>53 #include <VBox/pdmdev.h> 54 54 #include <VBox/err.h> 55 55 -
trunk/src/VBox/Devices/PC/DevPIC.cpp
r3489 r4014 24 24 *******************************************************************************/ 25 25 #define LOG_GROUP LOG_GROUP_DEV_PIC 26 #include <VBox/pdm .h>26 #include <VBox/pdmdev.h> 27 27 #include <VBox/log.h> 28 28 #include <iprt/assert.h> -
trunk/src/VBox/Devices/PC/DevPcArch.c
r2981 r4014 24 24 *******************************************************************************/ 25 25 #define LOG_GROUP LOG_GROUP_DEV_PC_ARCH 26 #include <VBox/pdm .h>26 #include <VBox/pdmdev.h> 27 27 #include <VBox/mm.h> 28 28 -
trunk/src/VBox/Devices/PC/DevPcBios.cpp
r3932 r4014 24 24 *******************************************************************************/ 25 25 #define LOG_GROUP LOG_GROUP_DEV_PC_BIOS 26 #include <VBox/pdm .h>26 #include <VBox/pdmdev.h> 27 27 #include <VBox/mm.h> 28 28 -
trunk/src/VBox/Devices/PC/DevPit-i8254.cpp
r2981 r4014 51 51 *******************************************************************************/ 52 52 #define LOG_GROUP LOG_GROUP_DEV_PIT 53 #include <VBox/pdm .h>53 #include <VBox/pdmdev.h> 54 54 #include <VBox/log.h> 55 55 #include <VBox/stam.h> -
trunk/src/VBox/Devices/PC/DevRTC.cpp
r3666 r4014 50 50 *******************************************************************************/ 51 51 #define LOG_GROUP LOG_GROUP_DEV_RTC 52 #include <VBox/pdm .h>52 #include <VBox/pdmdev.h> 53 53 #include <VBox/log.h> 54 54 #include <iprt/asm.h> -
trunk/src/VBox/Devices/PC/DrvACPI.cpp
r3666 r4014 26 26 27 27 #ifdef RT_OS_WINDOWS 28 # include <windows.h>28 # include <windows.h> 29 29 #endif 30 30 31 #include <VBox/pdm.h> 32 #include <VBox/cfgm.h> 33 #include <VBox/mm.h> 34 #include <VBox/err.h> 35 31 #include <VBox/pdmdrv.h> 36 32 #include <VBox/log.h> 37 33 #include <iprt/assert.h> … … 39 35 40 36 #ifdef RT_OS_LINUX 41 # include <iprt/string.h>42 # include <sys/types.h>43 # include <dirent.h>44 # include <stdio.h>37 # include <iprt/string.h> 38 # include <sys/types.h> 39 # include <dirent.h> 40 # include <stdio.h> 45 41 #endif 46 42 -
trunk/src/VBox/Devices/Parallel/DevParallel.cpp
r3649 r4014 26 26 *******************************************************************************/ 27 27 #define LOG_GROUP LOG_GROUP_DEV_PARALLEL 28 #include <VBox/pdm.h> 29 #include <VBox/err.h> 30 31 #include <VBox/log.h> 28 #include <VBox/pdmdev.h> 32 29 #include <iprt/assert.h> 33 30 #include <iprt/uuid.h> -
trunk/src/VBox/Devices/Parallel/DrvHostParallel.cpp
r3666 r4014 24 24 *******************************************************************************/ 25 25 #define LOG_GROUP LOG_GROUP_DRV_HOST_PARALLEL 26 #include <VBox/pdm.h> 27 #include <VBox/err.h> 28 29 #include <VBox/log.h> 26 #include <VBox/pdmdrv.h> 30 27 #include <iprt/asm.h> 31 28 #include <iprt/assert.h> … … 34 31 35 32 #ifdef RT_OS_LINUX 36 # include <sys/ioctl.h>37 # include <sys/types.h>38 # include <sys/stat.h>39 # include <fcntl.h>40 # include <unistd.h>41 # include <linux/ppdev.h>42 # include <linux/parport.h>33 # include <sys/ioctl.h> 34 # include <sys/types.h> 35 # include <sys/stat.h> 36 # include <fcntl.h> 37 # include <unistd.h> 38 # include <linux/ppdev.h> 39 # include <linux/parport.h> 43 40 #endif 44 45 41 46 42 #include "Builtins.h" 47 43 #include "ParallelIOCtlCmd.h" 44 48 45 49 46 /******************************************************************************* 50 47 * Structures and Typedefs * 51 48 *******************************************************************************/ 52 53 49 /** 54 50 * Host parallel port driver instance data. -
trunk/src/VBox/Devices/Serial/DevSerial.cpp
r2981 r4014 53 53 *******************************************************************************/ 54 54 #define LOG_GROUP LOG_GROUP_DEV_SERIAL 55 #include <VBox/pdm.h> 56 #include <VBox/err.h> 57 58 #include <VBox/log.h> 55 #include <VBox/pdmdev.h> 59 56 #include <iprt/assert.h> 60 57 #include <iprt/uuid.h> -
trunk/src/VBox/Devices/Serial/DrvChar.cpp
r2981 r4014 27 27 *******************************************************************************/ 28 28 #define LOG_GROUP LOG_GROUP_DRV_CHAR 29 #include <VBox/pdm.h> 30 #include <VBox/err.h> 31 32 #include <VBox/log.h> 29 #include <VBox/pdmdrv.h> 33 30 #include <iprt/asm.h> 34 31 #include <iprt/assert.h> -
trunk/src/VBox/Devices/Serial/DrvNamedPipe.cpp
r3666 r4014 26 26 *******************************************************************************/ 27 27 #define LOG_GROUP LOG_GROUP_DRV_NAMEDPIPE 28 #include <VBox/pdm.h> 29 #include <VBox/cfgm.h> 30 #include <VBox/err.h> 31 32 #include <VBox/log.h> 33 #include <VBox/mm.h> 28 #include <VBox/pdmdrv.h> 34 29 #include <iprt/assert.h> 35 30 #include <iprt/file.h> -
trunk/src/VBox/Devices/Storage/DevATA.cpp
r3935 r4014 26 26 *******************************************************************************/ 27 27 #define LOG_GROUP LOG_GROUP_DEV_IDE 28 #include <VBox/pdm.h> 29 #include <VBox/vmm.h> 30 #include <VBox/err.h> 31 32 #include <VBox/log.h> 28 #include <VBox/pdmdev.h> 33 29 #include <iprt/assert.h> 34 30 #include <iprt/string.h> -
trunk/src/VBox/Devices/Storage/DrvBlock.cpp
r3199 r4014 26 26 *******************************************************************************/ 27 27 #define LOG_GROUP LOG_GROUP_DRV_BLOCK 28 #include <VBox/pdm.h> 29 #include <VBox/cfgm.h> 30 #include <VBox/mm.h> 31 #include <VBox/err.h> 32 33 #include <VBox/log.h> 28 #include <VBox/pdmdrv.h> 34 29 #include <iprt/assert.h> 35 30 #include <iprt/uuid.h> -
trunk/src/VBox/Devices/Storage/DrvHostBase.cpp
r3670 r4014 98 98 #endif 99 99 100 #include <VBox/pdm.h> 101 #include <VBox/cfgm.h> 102 #include <VBox/mm.h> 103 #include <VBox/err.h> 104 105 #include <VBox/log.h> 100 #include <VBox/pdmdrv.h> 106 101 #include <iprt/assert.h> 107 102 #include <iprt/file.h> -
trunk/src/VBox/Devices/Storage/DrvHostDVD.cpp
r3670 r4014 65 65 #endif 66 66 67 #include <VBox/pdm.h> 68 #include <VBox/cfgm.h> 69 #include <VBox/err.h> 70 71 #include <VBox/log.h> 67 #include <VBox/pdmdrv.h> 72 68 #include <iprt/assert.h> 73 69 #include <iprt/file.h> -
trunk/src/VBox/Devices/Storage/DrvHostFloppy.cpp
r3670 r4014 42 42 #endif /* !RT_OS_WINDOWS nor RT_OS_LINUX nor RT_OS_L4 */ 43 43 44 #include <VBox/pdm.h> 45 #include <VBox/cfgm.h> 46 #include <VBox/mm.h> 47 #include <VBox/err.h> 48 49 #include <VBox/log.h> 44 #include <VBox/pdmdrv.h> 50 45 #include <iprt/assert.h> 51 46 #include <iprt/file.h> -
trunk/src/VBox/Devices/Storage/DrvHostRawDisk.cpp
r3666 r4014 26 26 *******************************************************************************/ 27 27 #define LOG_GROUP LOG_GROUP_DRV_HOST_HDD 28 29 #include <VBox/pdm.h> 30 #include <VBox/cfgm.h> 31 #include <VBox/err.h> 32 #include <VBox/mm.h> 33 34 #include <VBox/log.h> 28 #include <VBox/pdmdrv.h> 35 29 #include <iprt/assert.h> 36 30 #include <iprt/file.h> -
trunk/src/VBox/Devices/Storage/DrvMediaISO.cpp
r2981 r4014 25 25 *******************************************************************************/ 26 26 #define LOG_GROUP LOG_GROUP_DRV_ISO 27 #include <VBox/pdm.h> 28 #include <VBox/cfgm.h> 29 #include <VBox/mm.h> 30 #include <VBox/err.h> 31 32 #include <VBox/log.h> 27 #include <VBox/pdmdrv.h> 33 28 #include <iprt/assert.h> 34 29 #include <iprt/file.h> -
trunk/src/VBox/Devices/Storage/DrvRawImage.cpp
r2981 r4014 26 26 *******************************************************************************/ 27 27 #define LOG_GROUP LOG_GROUP_DRV_RAW_IMAGE 28 #include <VBox/pdm.h> 29 #include <VBox/cfgm.h> 30 #include <VBox/mm.h> 31 #include <VBox/err.h> 32 33 #include <VBox/log.h> 28 #include <VBox/pdmdrv.h> 34 29 #include <iprt/assert.h> 35 30 #include <iprt/file.h> -
trunk/src/VBox/Devices/Storage/DrvVD.cpp
r2981 r4014 28 28 #define LOG_GROUP LOG_GROUP_DRV_VD 29 29 #include <VBox/VBoxHDD-new.h> 30 #include <VBox/pdm.h> 31 #include <VBox/mm.h> 32 #include <VBox/err.h> 33 34 #include <VBox/log.h> 30 #include <VBox/pdmdrv.h> 35 31 #include <iprt/alloc.h> 36 32 #include <iprt/assert.h> -
trunk/src/VBox/Devices/Storage/DrvVmdk.cpp
r3647 r4014 52 52 *******************************************************************************/ 53 53 #define LOG_GROUP LOG_GROUP_DRV_VBOXHDD 54 #include <VBox/pdm.h> 55 #include <VBox/mm.h> 56 #include <VBox/err.h> 57 58 #include <VBox/log.h> 54 #include <VBox/pdmdrv.h> 59 55 #include <iprt/alloc.h> 60 56 #include <iprt/assert.h> -
trunk/src/VBox/Devices/Storage/VBoxHDD.cpp
r2981 r4014 27 27 #define LOG_GROUP LOG_GROUP_DRV_VBOXHDD 28 28 #include <VBox/VBoxHDD.h> 29 #include <VBox/pdm.h> 30 #include <VBox/mm.h> 31 #include <VBox/err.h> 32 33 #include <VBox/log.h> 29 #include <VBox/pdmdrv.h> 34 30 #include <iprt/alloc.h> 35 31 #include <iprt/assert.h> -
trunk/src/VBox/Devices/Storage/fdc.c
r3167 r4014 54 54 *******************************************************************************/ 55 55 #define LOG_GROUP LOG_GROUP_DEV_FDC 56 #include <VBox/pdm.h> 57 #include <VBox/err.h> 58 59 #include <VBox/log.h> 56 #include <VBox/pdmdev.h> 60 57 #include <iprt/assert.h> 61 58 #include <iprt/uuid.h>
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