Changeset 40185 in vbox
- Timestamp:
- Feb 20, 2012 9:26:12 PM (13 years ago)
- svn:sync-xref-src-repo-rev:
- 76349
- File:
-
- 1 edited
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- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r40182 r40185 50 50 * can trigger spurious FPU exceptions. 51 51 * 52 * 53 * @section sec_iem_logging Logging 54 * 55 * The IEM code uses the \"IEM\" log group for the main logging. The different 56 * logging levels/flags are generally used for the following purposes: 57 * - Level 1 (Log) : Errors, exceptions, interrupts and such major events. 58 * - Flow (LogFlow): Additional exception details, basic enter/exit IEM 59 * state info. 60 * - Level 2 (Log2): ? 61 * - Level 3 (Log3): More detailed enter/exit IEM state info. 62 * - Level 4 (Log4): Decoding mnemonics w/ EIP. 63 * - Level 5 (Log5): Decoding details. 64 * - Level 6 (Log6): Enables/disables the lockstep comparison with REM. 52 65 * 53 66 */ … … 796 809 } 797 810 GCPhys |= GCPtrNext & PAGE_OFFSET_MASK; 798 //Log(("GCPtrNext=%RGv GCPhys=%RGp cbOpcodes=%#x\n", GCPtrNext, GCPhys, pIemCpu->cbOpcode));811 Log5(("GCPtrNext=%RGv GCPhys=%RGp cbOpcodes=%#x\n", GCPtrNext, GCPhys, pIemCpu->cbOpcode)); 799 812 /** @todo Check reserved bits and such stuff. PGM is better at doing 800 813 * that, so do it when implementing the guest virtual address … … 820 833 } 821 834 pIemCpu->cbOpcode += cbToTryRead; 822 //Log(("%.*Rhxs\n", pIemCpu->cbOpcode, pIemCpu->abOpcode));835 Log5(("%.*Rhxs\n", pIemCpu->cbOpcode, pIemCpu->abOpcode)); 823 836 824 837 return VINF_SUCCESS; … … 1755 1768 if (RT_UNLIKELY(rcStrict != VINF_SUCCESS)) 1756 1769 return rcStrict; 1757 Log 4(("iemRaiseXcptOrIntInProtMode: vec=%#x P=%u DPL=%u DT=%u:%u A=%u %04x:%04x%04x\n",1758 u8Vector, Idte.Gate.u1Present, Idte.Gate.u2Dpl, Idte.Gate.u1DescType, Idte.Gate.u4Type,1759 Idte.Gate.u4ParmCount, Idte.Gate.u16Sel, Idte.Gate.u16OffsetHigh, Idte.Gate.u16OffsetLow));1770 LogFlow(("iemRaiseXcptOrIntInProtMode: vec=%#x P=%u DPL=%u DT=%u:%u A=%u %04x:%04x%04x\n", 1771 u8Vector, Idte.Gate.u1Present, Idte.Gate.u2Dpl, Idte.Gate.u1DescType, Idte.Gate.u4Type, 1772 Idte.Gate.u4ParmCount, Idte.Gate.u16Sel, Idte.Gate.u16OffsetHigh, Idte.Gate.u16OffsetLow)); 1760 1773 1761 1774 /* … … 2200 2213 pIemCpu->uCurXcpt = uPrevXcpt; 2201 2214 pIemCpu->fCurXcpt = fPrevXcpt; 2202 Log (("iemRaiseXcptOrInt: returns %Rrc (vec=%#x); cs:rip=%04x:%RGv ss:rsp=%04x:%RGv\n",2203 VBOXSTRICTRC_VAL(rcStrict), u8Vector, pCtx->cs, pCtx->rip, pCtx->ss, pCtx->esp));2215 LogFlow(("iemRaiseXcptOrInt: returns %Rrc (vec=%#x); cs:rip=%04x:%RGv ss:rsp=%04x:%RGv\n", 2216 VBOXSTRICTRC_VAL(rcStrict), u8Vector, pCtx->cs, pCtx->rip, pCtx->ss, pCtx->esp)); 2204 2217 return rcStrict; 2205 2218 } … … 4023 4036 || (pIemCpu->CTX_SUFF(pCtx)->cr0 & X86_CR0_WP))) 4024 4037 { 4025 Log(("iemMemPageTranslateAndCheckAccess: GCPtrMem=%RGv - read-only page \n", GCPtrMem));4038 Log(("iemMemPageTranslateAndCheckAccess: GCPtrMem=%RGv - read-only page -> #PF\n", GCPtrMem)); 4026 4039 *pGCPhysMem = NIL_RTGCPHYS; 4027 4040 return iemRaisePageFault(pIemCpu, GCPtrMem, fAccess & ~IEM_ACCESS_TYPE_READ, VERR_ACCESS_DENIED); … … 4033 4046 && !(fAccess & IEM_ACCESS_WHAT_SYS)) 4034 4047 { 4035 Log(("iemMemPageTranslateAndCheckAccess: GCPtrMem=%RGv - user access to kernel page \n", GCPtrMem));4048 Log(("iemMemPageTranslateAndCheckAccess: GCPtrMem=%RGv - user access to kernel page -> #PF\n", GCPtrMem)); 4036 4049 *pGCPhysMem = NIL_RTGCPHYS; 4037 4050 return iemRaisePageFault(pIemCpu, GCPtrMem, fAccess, VERR_ACCESS_DENIED); … … 4043 4056 && (pIemCpu->CTX_SUFF(pCtx)->msrEFER & MSR_K6_EFER_NXE) ) 4044 4057 { 4045 Log(("iemMemPageTranslateAndCheckAccess: GCPtrMem=%RGv - NX \n", GCPtrMem));4058 Log(("iemMemPageTranslateAndCheckAccess: GCPtrMem=%RGv - NX -> #PF\n", GCPtrMem)); 4046 4059 *pGCPhysMem = NIL_RTGCPHYS; 4047 4060 return iemRaisePageFault(pIemCpu, GCPtrMem, fAccess & ~(IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_WRITE), … … 6113 6126 #ifdef DEBUG 6114 6127 # define IEMOP_MNEMONIC(a_szMnemonic) \ 6115 Log 2(("decode - %04x:%RGv %s%s [#%u]\n", pIemCpu->CTX_SUFF(pCtx)->cs, pIemCpu->CTX_SUFF(pCtx)->rip, \6128 Log4(("decode - %04x:%RGv %s%s [#%u]\n", pIemCpu->CTX_SUFF(pCtx)->cs, pIemCpu->CTX_SUFF(pCtx)->rip, \ 6116 6129 pIemCpu->fPrefixes & IEM_OP_PRF_LOCK ? "lock " : "", a_szMnemonic, pIemCpu->cInstructions)) 6117 6130 # define IEMOP_MNEMONIC2(a_szMnemonic, a_szOps) \ 6118 Log 2(("decode - %04x:%RGv %s%s %s [#%u]\n", pIemCpu->CTX_SUFF(pCtx)->cs, pIemCpu->CTX_SUFF(pCtx)->rip, \6131 Log4(("decode - %04x:%RGv %s%s %s [#%u]\n", pIemCpu->CTX_SUFF(pCtx)->cs, pIemCpu->CTX_SUFF(pCtx)->rip, \ 6119 6132 pIemCpu->fPrefixes & IEM_OP_PRF_LOCK ? "lock " : "", a_szMnemonic, a_szOps, pIemCpu->cInstructions)) 6120 6133 #else … … 6189 6202 static VBOXSTRICTRC iemOpHlpCalcRmEffAddr(PIEMCPU pIemCpu, uint8_t bRm, PRTGCPTR pGCPtrEff) 6190 6203 { 6191 Log Flow(("iemOpHlpCalcRmEffAddr: bRm=%#x\n", bRm));6204 Log5(("iemOpHlpCalcRmEffAddr: bRm=%#x\n", bRm)); 6192 6205 PCCPUMCTX pCtx = pIemCpu->CTX_SUFF(pCtx); 6193 6206 #define SET_SS_DEF() \ … … 6234 6247 6235 6248 *pGCPtrEff = u16EffAddr; 6236 Log Flow(("iemOpHlpCalcRmEffAddr: EffAddr=%#06RGv\n", *pGCPtrEff));6249 Log5(("iemOpHlpCalcRmEffAddr: EffAddr=%#06RGv\n", *pGCPtrEff)); 6237 6250 return VINF_SUCCESS; 6238 6251 } … … 6335 6348 *pGCPtrEff = u32EffAddr & UINT16_MAX; 6336 6349 } 6337 Log Flow(("iemOpHlpCalcRmEffAddr: EffAddr=%#010RGv\n", *pGCPtrEff));6350 Log5(("iemOpHlpCalcRmEffAddr: EffAddr=%#010RGv\n", *pGCPtrEff)); 6338 6351 return VINF_SUCCESS; 6339 6352 } … … 6466 6479 else 6467 6480 *pGCPtrEff = u64EffAddr & UINT16_MAX; 6468 Log Flow(("iemOpHlpCalcRmEffAddr: EffAddr=%#010RGv\n", *pGCPtrEff));6481 Log5(("iemOpHlpCalcRmEffAddr: EffAddr=%#010RGv\n", *pGCPtrEff)); 6469 6482 return VINF_SUCCESS; 6470 6483 } … … 6515 6528 #if 1 /* Auto enable DSL - FPU stuff. */ 6516 6529 && pOrgCtx->cs == 0x10 6517 && ( pOrgCtx->rip == 0xc02ec07f 6518 || pOrgCtx->rip == 0xc02ec082 6519 || pOrgCtx->rip == 0xc02ec0c9 6530 && (// pOrgCtx->rip == 0xc02ec07f 6531 //|| pOrgCtx->rip == 0xc02ec082 6532 //|| pOrgCtx->rip == 0xc02ec0c9 6533 0 6534 || pOrgCtx->rip == 0x0c010e7c4 /* fxsave */ 6520 6535 ) 6521 6536 #endif … … 7290 7305 szInstr, sizeof(szInstr), &cbInstr); 7291 7306 7292 Log 2(("**** "7307 Log3(("**** " 7293 7308 " eax=%08x ebx=%08x ecx=%08x edx=%08x esi=%08x edi=%08x\n" 7294 7309 " eip=%08x esp=%08x ebp=%08x iopl=%d\n" … … 7307 7322 DBGFR3Info(pVCpu->pVMR3, "cpumguest", "verbose", NULL); 7308 7323 } 7324 else 7325 LogFlow(("IEMExecOne: cs:rip=%04x:%08RX64 ss:rsp=%04x:%08RX64 EFL=%06x\n", 7326 pCtx->cs, pCtx->rip, pCtx->ss, pCtx->rsp, pCtx->eflags.u)); 7309 7327 #endif 7310 7328 … … 7352 7370 iemExecVerificationModeCheck(pIemCpu); 7353 7371 #endif 7372 LogFlow(("IEMExecOne: returns %Rrc - cs:rip=%04x:%08RX64 ss:rsp=%04x:%08RX64 EFL=%06x\n", 7373 VBOXSTRICTRC_VAL(rcStrict), pCtx->cs, pCtx->rip, pCtx->ss, pCtx->rsp, pCtx->eflags.u)); 7354 7374 return rcStrict; 7355 7375 } … … 7377 7397 { 7378 7398 case TRPM_HARDWARE_INT: 7379 Log (("IEMInjectTrap: %#4x ext\n", u8TrapNo));7399 LogFlow(("IEMInjectTrap: %#4x ext\n", u8TrapNo)); 7380 7400 fFlags = IEM_XCPT_FLAGS_T_EXT_INT; 7381 7401 uErrCode = uCr2 = 0; … … 7383 7403 7384 7404 case TRPM_SOFTWARE_INT: 7385 Log (("IEMInjectTrap: %#4x soft\n", u8TrapNo));7405 LogFlow(("IEMInjectTrap: %#4x soft\n", u8TrapNo)); 7386 7406 fFlags = IEM_XCPT_FLAGS_T_SOFT_INT; 7387 7407 uErrCode = uCr2 = 0; … … 7389 7409 7390 7410 case TRPM_TRAP: 7391 Log (("IEMInjectTrap: %#4x trap err=%#x cr2=%#RGv\n", u8TrapNo, uErrCode, uCr2));7411 LogFlow(("IEMInjectTrap: %#4x trap err=%#x cr2=%#RGv\n", u8TrapNo, uErrCode, uCr2)); 7392 7412 fFlags = IEM_XCPT_FLAGS_T_CPU_XCPT; 7393 7413 if (u8TrapNo == X86_XCPT_PF)
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