Changeset 40280 in vbox for trunk/src/VBox/Devices/Bus

Timestamp:

Feb 28, 2012 7:47:00 PM (13 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

76509

Message:

Corrected a bunch of HC and GC uses in status codes.

Location:

trunk/src/VBox/Devices/Bus

Files:

• DevPCI.cpp (modified) (8 diffs)
• DevPciIch9.cpp (modified) (9 diffs)

trunk/src/VBox/Devices/Bus/DevPCI.cpp

@@ -509 +509 @@
             }
 #else
-            return VINF_IOM_HC_IOPORT_WRITE;
+            return VINF_IOM_R3_IOPORT_WRITE;
 #endif
         }
@@ -522 +522 @@
             pci_dev->Int.s.pfnConfigWrite(pci_dev, config_addr, val, len);
 #else
-            return VINF_IOM_HC_IOPORT_WRITE;
+            return VINF_IOM_R3_IOPORT_WRITE;
 #endif
         }
@@ -556 +556 @@
 #else
             NOREF(len);
-            return VINF_IOM_HC_IOPORT_READ;
+            return VINF_IOM_R3_IOPORT_READ;
 #endif
         }
@@ -570 +570 @@
 #else
             NOREF(len);
-            return VINF_IOM_HC_IOPORT_READ;
+            return VINF_IOM_R3_IOPORT_READ;
 #endif
         }
@@ -1143 +1143 @@
     {
         PPCIGLOBALS pThis = PDMINS_2_DATA(pDevIns, PPCIGLOBALS);
-        PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_WRITE);
+        PCI_LOCK(pDevIns, VINF_IOM_R3_IOPORT_WRITE);
         pThis->uConfigReg = u32 & ~3; /* Bits 0-1 are reserved and we silently clear them */
         PCI_UNLOCK(pDevIns);
@@ -1170 +1170 @@
     {
         PPCIGLOBALS pThis = PDMINS_2_DATA(pDevIns, PPCIGLOBALS);
-        PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_READ);
+        PCI_LOCK(pDevIns, VINF_IOM_R3_IOPORT_READ);
         *pu32 = pThis->uConfigReg;
         PCI_UNLOCK(pDevIns);
@@ -1201 +1201 @@
     if (!(Port % cb))
     {
-        PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_WRITE);
+        PCI_LOCK(pDevIns, VINF_IOM_R3_IOPORT_WRITE);
         rc = pci_data_write(PDMINS_2_DATA(pDevIns, PPCIGLOBALS), Port, u32, cb);
         PCI_UNLOCK(pDevIns);
@@ -1227 +1227 @@
     if (!(Port % cb))
     {
-        PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_READ);
+        PCI_LOCK(pDevIns, VINF_IOM_R3_IOPORT_READ);
         int rc = pci_data_read(PDMINS_2_DATA(pDevIns, PPCIGLOBALS), Port, cb, pu32);
         PCI_UNLOCK(pDevIns);

trunk/src/VBox/Devices/Bus/DevPciIch9.cpp

@@ -245 +245 @@
         PICH9PCIGLOBALS pThis = PDMINS_2_DATA(pDevIns, PICH9PCIGLOBALS);
 
-        PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_WRITE);
+        PCI_LOCK(pDevIns, VINF_IOM_R3_IOPORT_WRITE);
         pThis->uConfigReg = u32 & ~3; /* Bits 0-1 are reserved and we silently clear them */
         PCI_UNLOCK(pDevIns);
@@ -270 +270 @@
     {
         PICH9PCIGLOBALS pThis = PDMINS_2_DATA(pDevIns, PICH9PCIGLOBALS);
-        PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_READ);
+        PCI_LOCK(pDevIns, VINF_IOM_R3_IOPORT_READ);
         *pu32 = pThis->uConfigReg;
         PCI_UNLOCK(pDevIns);
@@ -344 +344 @@
     ich9pciStateToPciAddr(pGlobals, addr, &aPciAddr);
 
-    return ich9pciDataWriteAddr(pGlobals, &aPciAddr, val, len, VINF_IOM_HC_IOPORT_WRITE);
+    return ich9pciDataWriteAddr(pGlobals, &aPciAddr, val, len, VINF_IOM_R3_IOPORT_WRITE);
 }
 
@@ -371 +371 @@
     if (!(Port % cb))
     {
-        PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_WRITE);
+        PCI_LOCK(pDevIns, VINF_IOM_R3_IOPORT_WRITE);
         rc = ich9pciDataWrite(PDMINS_2_DATA(pDevIns, PICH9PCIGLOBALS), Port, u32, cb);
         PCI_UNLOCK(pDevIns);
@@ -444 +444 @@
     ich9pciStateToPciAddr(pGlobals, addr, &aPciAddr);
 
-    return ich9pciDataReadAddr(pGlobals, &aPciAddr, cb, pu32, VINF_IOM_HC_IOPORT_READ);
+    return ich9pciDataReadAddr(pGlobals, &aPciAddr, cb, pu32, VINF_IOM_R3_IOPORT_READ);
 }
 
@@ -463 +463 @@
     if (!(Port % cb))
     {
-        PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_READ);
+        PCI_LOCK(pDevIns, VINF_IOM_R3_IOPORT_READ);
         int rc = ich9pciDataRead(PDMINS_2_DATA(pDevIns, PICH9PCIGLOBALS), Port, cb, pu32);
         PCI_UNLOCK(pDevIns);
@@ -597 +597 @@
     Log2(("ich9pciMcfgMMIOWrite: %RGp(%d) \n", GCPhysAddr, cb));
 
-    PCI_LOCK(pDevIns, VINF_IOM_HC_MMIO_WRITE);
+    PCI_LOCK(pDevIns, VINF_IOM_R3_MMIO_WRITE);
 
     ich9pciPhysToPciAddr(pGlobals, GCPhysAddr, &aDest);
@@ -616 +616 @@
             break;
     }
-    int rc = ich9pciDataWriteAddr(pGlobals, &aDest, u32, cb, VINF_IOM_HC_MMIO_WRITE);
+    int rc = ich9pciDataWriteAddr(pGlobals, &aDest, u32, cb, VINF_IOM_R3_MMIO_WRITE);
     PCI_UNLOCK(pDevIns);
 
@@ -631 +631 @@
     LogFlow(("ich9pciMcfgMMIORead: %RGp(%d) \n", GCPhysAddr, cb));
 
-    PCI_LOCK(pDevIns, VINF_IOM_HC_MMIO_READ);
+    PCI_LOCK(pDevIns, VINF_IOM_R3_MMIO_READ);
 
     ich9pciPhysToPciAddr(pGlobals, GCPhysAddr, &aDest);
 
-    int rc = ich9pciDataReadAddr(pGlobals, &aDest, cb, &rv, VINF_IOM_HC_MMIO_READ);
+    int rc = ich9pciDataReadAddr(pGlobals, &aDest, cb, &rv, VINF_IOM_R3_MMIO_READ);
 
     if (RT_SUCCESS(rc))