VirtualBox

Changeset 40280 in vbox for trunk/src/VBox/Devices/Graphics


Ignore:
Timestamp:
Feb 28, 2012 7:47:00 PM (13 years ago)
Author:
vboxsync
Message:

Corrected a bunch of HC and GC uses in status codes.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/Graphics/DevVGA.cpp

    r40148 r40280  
    7676            AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), VINF_SUCCESS); \
    7777            Log2(("%Rfn[%d]: %RX32 -> R3\n", __PRETTY_FUNCTION__, __LINE__, (off))); \
    78             return VINF_IOM_HC_MMIO_WRITE; \
     78            return VINF_IOM_R3_MMIO_WRITE; \
    7979        } \
    8080    } while (0)
    … …  
    9292            AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), 0xff); \
    9393            Log2(("%Rfn[%d]: %RX32 -> R3\n", __PRETTY_FUNCTION__, __LINE__, (off))); \
    94             (rcVar) = VINF_IOM_HC_MMIO_READ; \
     94            (rcVar) = VINF_IOM_R3_MMIO_READ; \
    9595            return 0; \
    9696        } \
    … …  
    10351035        case VBE_DISPI_INDEX_ENABLE:
    10361036#ifndef IN_RING3
    1037             return VINF_IOM_HC_IOPORT_WRITE;
     1037            return VINF_IOM_R3_IOPORT_WRITE;
    10381038#else
    10391039            if ((val & VBE_DISPI_ENABLED) &&
    … …  
    11471147        case VBE_DISPI_INDEX_VBOX_VIDEO:
    11481148#ifndef IN_RING3
    1149             return VINF_IOM_HC_IOPORT_WRITE;
     1149            return VINF_IOM_R3_IOPORT_WRITE;
    11501150#else
    11511151            /* Changes in the VGA device are minimal. The device is bypassed. The driver does all work. */
    … …  
    25362536    VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE);
    25372537
    2538     int rc = PDMCritSectEnter(&s->lock, VINF_IOM_HC_IOPORT_WRITE);
     2538    int rc = PDMCritSectEnter(&s->lock, VINF_IOM_R3_IOPORT_WRITE);
    25392539    if (rc != VINF_SUCCESS)
    25402540        return rc;
    … …  
    25692569    NOREF(pvUser);
    25702570
    2571     int rc = PDMCritSectEnter(&s->lock, VINF_IOM_HC_IOPORT_READ);
     2571    int rc = PDMCritSectEnter(&s->lock, VINF_IOM_R3_IOPORT_READ);
    25722572    if (rc != VINF_SUCCESS)
    25732573        return rc;
    … …  
    26052605    VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE);
    26062606
    2607     int rc = PDMCritSectEnter(&s->lock, VINF_IOM_HC_IOPORT_WRITE);
     2607    int rc = PDMCritSectEnter(&s->lock, VINF_IOM_R3_IOPORT_WRITE);
    26082608    if (rc != VINF_SUCCESS)
    26092609        return rc;
    … …  
    26202620        Log(("vgaIOPortWriteVBEData: VBE_DISPI_INDEX_ENABLE - Switching to host...\n"));
    26212621        PDMCritSectLeave(&s->lock);
    2622         return VINF_IOM_HC_IOPORT_WRITE;
     2622        return VINF_IOM_R3_IOPORT_WRITE;
    26232623    }
    26242624#endif
    … …  
    26642664//        {
    26652665//            Log(("vgaIOPortWriteVBEData: VBE_DISPI_INDEX_ENABLE & VBE_DISPI_ENABLED - Switching to host...\n"));
    2666 //            return VINF_IOM_HC_IOPORT_WRITE;
     2666//            return VINF_IOM_R3_IOPORT_WRITE;
    26672667//        }
    26682668//#endif
    … …  
    26952695    VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE);
    26962696
    2697     int rc = PDMCritSectEnter(&s->lock, VINF_IOM_HC_IOPORT_WRITE);
     2697    int rc = PDMCritSectEnter(&s->lock, VINF_IOM_R3_IOPORT_WRITE);
    26982698    if (rc != VINF_SUCCESS)
    26992699        return rc;
    … …  
    27442744    VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE);
    27452745
    2746     int rc = PDMCritSectEnter(&s->lock, VINF_IOM_HC_IOPORT_READ);
     2746    int rc = PDMCritSectEnter(&s->lock, VINF_IOM_R3_IOPORT_READ);
    27472747    if (rc != VINF_SUCCESS)
    27482748        return rc;
    … …  
    28032803    VGAState *s = PDMINS_2_DATA(pDevIns, PVGASTATE);
    28042804
    2805     int rc = PDMCritSectEnter(&s->lock, VINF_IOM_HC_IOPORT_READ);
     2805    int rc = PDMCritSectEnter(&s->lock, VINF_IOM_R3_IOPORT_READ);
    28062806    if (rc != VINF_SUCCESS)
    28072807        return rc;
    … …  
    31913191    PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE);
    31923192
    3193     int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_HC_MMIO_WRITE);
     3193    int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_R3_MMIO_WRITE);
    31943194    if (rc != VINF_SUCCESS)
    31953195        return rc;
    … …  
    32183218    NOREF(pvUser);
    32193219
    3220     int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_HC_MMIO_READ);
     3220    int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_R3_MMIO_READ);
    32213221    if (rc != VINF_SUCCESS)
    32223222        return rc;
    … …  
    32813281    STAM_PROFILE_START(&pThis->CTX_MID_Z(Stat,MemoryWrite), a);
    32823282
    3283     int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_HC_MMIO_WRITE);
     3283    int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_R3_MMIO_WRITE);
    32843284    if (rc != VINF_SUCCESS)
    32853285        return rc;
    … …  
    35143514    NOREF(pvUser);
    35153515
    3516     int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_HC_IOPORT_WRITE);
     3516    int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_R3_IOPORT_WRITE);
    35173517    if (rc != VINF_SUCCESS)
    35183518        return rc;
    … …  
    35753575    NOREF(Port);
    35763576
    3577     int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_HC_IOPORT_WRITE);
     3577    int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_R3_IOPORT_WRITE);
    35783578    if (rc != VINF_SUCCESS)
    35793579        return rc;
    … …  
    36093609    NOREF(Port);
    36103610
    3611     int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_HC_IOPORT_READ);
     3611    int rc = PDMCritSectEnter(&pThis->lock, VINF_IOM_R3_IOPORT_READ);
    36123612    if (rc != VINF_SUCCESS)
    36133613        return rc;
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