Changeset 40280 in vbox for trunk/src/VBox/Devices/Network
- Timestamp:
- Feb 28, 2012 7:47:00 PM (13 years ago)
- Location:
- trunk/src/VBox/Devices/Network
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Network/DevE1000.cpp
r39367 r40280 2197 2197 { /* RST */ 2198 2198 #ifndef IN_RING3 2199 return VINF_IOM_ HC_IOPORT_WRITE;2199 return VINF_IOM_R3_IOPORT_WRITE; 2200 2200 #else 2201 2201 e1kHardReset(pState); … … 2280 2280 return VINF_SUCCESS; 2281 2281 #else /* !IN_RING3 */ 2282 return VINF_IOM_ HC_MMIO_WRITE;2282 return VINF_IOM_R3_MMIO_WRITE; 2283 2283 #endif /* !IN_RING3 */ 2284 2284 } … … 2317 2317 return rc; 2318 2318 #else /* !IN_RING3 */ 2319 return VINF_IOM_ HC_MMIO_READ;2319 return VINF_IOM_R3_MMIO_READ; 2320 2320 #endif /* !IN_RING3 */ 2321 2321 } … … 2352 2352 return VINF_SUCCESS; 2353 2353 #else /* !IN_RING3 */ 2354 return VINF_IOM_ HC_MMIO_WRITE;2354 return VINF_IOM_R3_MMIO_WRITE; 2355 2355 #endif /* !IN_RING3 */ 2356 2356 } … … 2437 2437 static int e1kRegReadICR(E1KSTATE* pState, uint32_t offset, uint32_t index, uint32_t *pu32Value) 2438 2438 { 2439 int rc = e1kCsEnter(pState, VINF_IOM_ HC_MMIO_READ);2439 int rc = e1kCsEnter(pState, VINF_IOM_R3_MMIO_READ); 2440 2440 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 2441 2441 return rc; … … 2503 2503 { 2504 2504 E1K_INC_ISTAT_CNT(pState->uStatIntICS); 2505 return e1kRaiseInterrupt(pState, VINF_IOM_ HC_MMIO_WRITE, value & s_e1kRegMap[ICS_IDX].writable);2505 return e1kRaiseInterrupt(pState, VINF_IOM_R3_MMIO_WRITE, value & s_e1kRegMap[ICS_IDX].writable); 2506 2506 } 2507 2507 … … 2550 2550 static int e1kRegWriteIMC(E1KSTATE* pState, uint32_t offset, uint32_t index, uint32_t value) 2551 2551 { 2552 int rc = e1kCsEnter(pState, VINF_IOM_ HC_MMIO_WRITE);2552 int rc = e1kCsEnter(pState, VINF_IOM_R3_MMIO_WRITE); 2553 2553 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 2554 2554 return rc; … … 2593 2593 /* Promiscuity has changed, pass the knowledge on. */ 2594 2594 #ifndef IN_RING3 2595 return VINF_IOM_ HC_IOPORT_WRITE;2595 return VINF_IOM_R3_IOPORT_WRITE; 2596 2596 #else 2597 2597 if (pState->pDrvR3) … … 2654 2654 #ifndef IN_RING3 2655 2655 /* XXX */ 2656 // return VINF_IOM_ HC_MMIO_WRITE;2656 // return VINF_IOM_R3_MMIO_WRITE; 2657 2657 #endif 2658 int rc = e1kCsRxEnter(pState, VINF_IOM_ HC_MMIO_WRITE);2658 int rc = e1kCsRxEnter(pState, VINF_IOM_R3_MMIO_WRITE); 2659 2659 if (RT_LIKELY(rc == VINF_SUCCESS)) 2660 2660 { … … 2703 2703 #endif 2704 2704 E1K_INC_ISTAT_CNT(pState->uStatIntRDTR); 2705 return e1kRaiseInterrupt(pState, VINF_IOM_ HC_MMIO_WRITE, ICR_RXT0);2705 return e1kRaiseInterrupt(pState, VINF_IOM_R3_MMIO_WRITE, ICR_RXT0); 2706 2706 } 2707 2707 … … 3210 3210 Assert(pSg->cbUsed <= pSg->cbAvailable); 3211 3211 } 3212 /* E1kLog2(("%s < << Outgoing packet. Dump follows: >>>\n"3212 /* E1kLog2(("%s < < < Outgoing packet. Dump follows: > > >\n" 3213 3213 "%.*Rhxd\n" 3214 "%s < <<<<<<<<<<<< End of dump >>>>>>>>>>>>\n",3214 "%s < < < < < < < < < < < < < End of dump > > > > > > > > > > > >\n", 3215 3215 INSTANCE(pState), cbFrame, pSg->aSegs[0].pvSeg, INSTANCE(pState)));*/ 3216 3216 … … 3982 3982 static int e1kRegWriteTDT(E1KSTATE* pState, uint32_t offset, uint32_t index, uint32_t value) 3983 3983 { 3984 int rc = e1kCsTxEnter(pState, VINF_IOM_ HC_MMIO_WRITE);3984 int rc = e1kCsTxEnter(pState, VINF_IOM_R3_MMIO_WRITE); 3985 3985 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 3986 3986 return rc; … … 4334 4334 */ 4335 4335 #ifdef E1K_GLOBAL_MUTEX 4336 rc = e1kMutexAcquire(pState, VINF_IOM_ HC_MMIO_READ, RT_SRC_POS);4336 rc = e1kMutexAcquire(pState, VINF_IOM_R3_MMIO_READ, RT_SRC_POS); 4337 4337 #else 4338 4338 //rc = e1kCsEnter(pState, VERR_SEM_BUSY, RT_SRC_POS); … … 4417 4417 INSTANCE(pState), uOffset, u32, s_e1kRegMap[index].abbrev, s_e1kRegMap[index].name)); 4418 4418 #ifdef E1K_GLOBAL_MUTEX 4419 rc = e1kMutexAcquire(pState, VINF_IOM_ HC_MMIO_WRITE, RT_SRC_POS);4419 rc = e1kMutexAcquire(pState, VINF_IOM_R3_MMIO_WRITE, RT_SRC_POS); 4420 4420 #else 4421 4421 //rc = e1kCsEnter(pState, VERR_SEM_BUSY, RT_SRC_POS); … … 4541 4541 rc = e1kRegRead(pState, pState->uSelectedReg, pu32, cb); 4542 4542 /** @todo wrong return code triggers assertions in the debug build; fix please */ 4543 if (rc == VINF_IOM_ HC_MMIO_READ)4544 rc = VINF_IOM_ HC_IOPORT_READ;4543 if (rc == VINF_IOM_R3_MMIO_READ) 4544 rc = VINF_IOM_R3_IOPORT_READ; 4545 4545 4546 4546 E1kLog2(("%s e1kIOPortIn: IODATA(4), reading from selected register %#010x, val=%#010x\n", szInst, pState->uSelectedReg, *pu32)); … … 4595 4595 rc = e1kRegWrite(pState, pState->uSelectedReg, &u32, cb); 4596 4596 /** @todo wrong return code triggers assertions in the debug build; fix please */ 4597 if (rc == VINF_IOM_ HC_MMIO_WRITE)4598 rc = VINF_IOM_ HC_IOPORT_WRITE;4597 if (rc == VINF_IOM_R3_MMIO_WRITE) 4598 rc = VINF_IOM_R3_IOPORT_WRITE; 4599 4599 break; 4600 4600 default: … … 4942 4942 if (!ASMBitTest(pState->auVFTA, E1K_SPEC_VLAN(RT_BE2H_U16(u16Ptr[7])))) 4943 4943 { 4944 E1kLog2(("%s Packet filter: no VLAN match (id=%d)\n", 4944 E1kLog2(("%s Packet filter: no VLAN match (id=%d)\n", 4945 4945 INSTANCE(pState), E1K_SPEC_VLAN(RT_BE2H_U16(u16Ptr[7])))); 4946 4946 return false; -
trunk/src/VBox/Devices/Network/DevPCNet.cpp
r39248 r40280 1215 1215 } 1216 1216 STAM_COUNTER_INC(&CTXALLSUFF(pThis->StatRingWriteFailed)); ; 1217 return VINF_IOM_ HC_MMIO_WRITE; /* handle in ring3 */1217 return VINF_IOM_R3_MMIO_WRITE; /* handle in ring3 */ 1218 1218 } 1219 1219 … … 2808 2808 { 2809 2809 Log(("#%d pcnetCSRWriteU16: pcnetInit requested => HC\n", PCNET_INST_NR)); 2810 return VINF_IOM_ HC_IOPORT_WRITE;2810 return VINF_IOM_R3_IOPORT_WRITE; 2811 2811 } 2812 2812 #endif … … 2895 2895 Log(("#%d: promiscuous mode changed to %d\n", PCNET_INST_NR, !!(val & 0x8000))); 2896 2896 #ifndef IN_RING3 2897 return VINF_IOM_ HC_IOPORT_WRITE;2897 return VINF_IOM_R3_IOPORT_WRITE; 2898 2898 #else 2899 2899 /* check for promiscuous mode change */ … … 3632 3632 3633 3633 STAM_PROFILE_ADV_START(&pThis->StatAPROMRead, a); 3634 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_ HC_IOPORT_WRITE);3634 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_R3_IOPORT_WRITE); 3635 3635 if (rc == VINF_SUCCESS) 3636 3636 { … … 3680 3680 { 3681 3681 STAM_PROFILE_ADV_START(&pThis->StatAPROMWrite, a); 3682 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_ HC_IOPORT_WRITE);3682 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_R3_IOPORT_WRITE); 3683 3683 if (RT_LIKELY(rc == VINF_SUCCESS)) 3684 3684 { … … 3695 3695 LogFlow(("#%d pcnetIOPortAPromWrite: Port=%RTiop u32=%#RX32 cb=%d rc=%Rrc\n", PCNET_INST_NR, Port, u32, cb, rc)); 3696 3696 #ifdef LOG_ENABLED 3697 if (rc == VINF_IOM_ HC_IOPORT_WRITE)3697 if (rc == VINF_IOM_R3_IOPORT_WRITE) 3698 3698 LogFlow(("#%d => HC\n", PCNET_INST_NR)); 3699 3699 #endif … … 3720 3720 3721 3721 STAM_PROFILE_ADV_START(&pThis->CTX_SUFF_Z(StatIORead), a); 3722 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_ HC_IOPORT_READ);3722 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_R3_IOPORT_READ); 3723 3723 if (RT_LIKELY(rc == VINF_SUCCESS)) 3724 3724 { … … 3738 3738 Log2(("#%d pcnetIOPortRead: Port=%RTiop *pu32=%#RX32 cb=%d rc=%Rrc\n", PCNET_INST_NR, Port, *pu32, cb, rc)); 3739 3739 #ifdef LOG_ENABLED 3740 if (rc == VINF_IOM_ HC_IOPORT_READ)3740 if (rc == VINF_IOM_R3_IOPORT_READ) 3741 3741 LogFlow(("#%d pcnetIOPortRead/critsect failed in GC => HC\n", PCNET_INST_NR)); 3742 3742 #endif … … 3763 3763 3764 3764 STAM_PROFILE_ADV_START(&pThis->CTX_SUFF_Z(StatIOWrite), a); 3765 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_ HC_IOPORT_WRITE);3765 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_R3_IOPORT_WRITE); 3766 3766 if (RT_LIKELY(rc == VINF_SUCCESS)) 3767 3767 { … … 3781 3781 Log2(("#%d pcnetIOPortWrite: Port=%RTiop u32=%#RX32 cb=%d rc=%Rrc\n", PCNET_INST_NR, Port, u32, cb, rc)); 3782 3782 #ifdef LOG_ENABLED 3783 if (rc == VINF_IOM_ HC_IOPORT_WRITE)3783 if (rc == VINF_IOM_R3_IOPORT_WRITE) 3784 3784 LogFlow(("#%d pcnetIOPortWrite/critsect failed in GC => HC\n", PCNET_INST_NR)); 3785 3785 #endif … … 3811 3811 { 3812 3812 STAM_PROFILE_ADV_START(&pThis->CTX_SUFF_Z(StatMMIORead), a); 3813 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_ HC_MMIO_READ);3813 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_R3_MMIO_READ); 3814 3814 if (RT_LIKELY(rc == VINF_SUCCESS)) 3815 3815 { … … 3834 3834 PCNET_INST_NR, pv, cb, pv, cb, GCPhysAddr, rc)); 3835 3835 #ifdef LOG_ENABLED 3836 if (rc == VINF_IOM_ HC_MMIO_READ)3836 if (rc == VINF_IOM_R3_MMIO_READ) 3837 3837 LogFlow(("#%d => HC\n", PCNET_INST_NR)); 3838 3838 #endif … … 3864 3864 { 3865 3865 STAM_PROFILE_ADV_START(&pThis->CTX_SUFF_Z(StatMMIOWrite), a); 3866 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_ HC_MMIO_WRITE);3866 rc = PDMCritSectEnter(&pThis->CritSect, VINF_IOM_R3_MMIO_WRITE); 3867 3867 if (RT_LIKELY(rc == VINF_SUCCESS)) 3868 3868 { … … 3879 3879 PDMCritSectLeave(&pThis->CritSect); 3880 3880 } 3881 // else rc == VINF_IOM_ HC_MMIO_WRITE => handle in ring33881 // else rc == VINF_IOM_R3_MMIO_WRITE => handle in ring3 3882 3882 3883 3883 STAM_PROFILE_ADV_STOP(&pThis->CTX_SUFF_Z(StatMMIOWrite), a); … … 3886 3886 PCNET_INST_NR, pv, cb, pv, cb, GCPhysAddr, rc)); 3887 3887 #ifdef LOG_ENABLED 3888 if (rc == VINF_IOM_ HC_MMIO_WRITE)3888 if (rc == VINF_IOM_R3_MMIO_WRITE) 3889 3889 LogFlow(("#%d => HC\n", PCNET_INST_NR)); 3890 3890 #endif -
trunk/src/VBox/Devices/Network/DevVirtioNet.cpp
r39248 r40280 418 418 pState->uIsTransmitting = 0; 419 419 #ifndef IN_RING3 420 return VINF_IOM_ HC_IOPORT_WRITE;420 return VINF_IOM_R3_IOPORT_WRITE; 421 421 #else 422 422 if (pState->pDrv)
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