Changeset 40356 in vbox for trunk/src/VBox/VMM/VMMR3
- Timestamp:
- Mar 5, 2012 1:51:50 PM (13 years ago)
- svn:sync-xref-src-repo-rev:
- 76643
- Location:
- trunk/src/VBox/VMM/VMMR3
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR3/EM.cpp
r40274 r40356 510 510 511 511 /* Save mwait state. */ 512 rc = SSMR3PutU32(pSSM, pVCpu->em.s. mwait.fWait);512 rc = SSMR3PutU32(pSSM, pVCpu->em.s.MWait.fWait); 513 513 AssertRCReturn(rc, rc); 514 rc = SSMR3PutGCPtr(pSSM, pVCpu->em.s. mwait.uMWaitEAX);514 rc = SSMR3PutGCPtr(pSSM, pVCpu->em.s.MWait.uMWaitRAX); 515 515 AssertRCReturn(rc, rc); 516 rc = SSMR3PutGCPtr(pSSM, pVCpu->em.s. mwait.uMWaitECX);516 rc = SSMR3PutGCPtr(pSSM, pVCpu->em.s.MWait.uMWaitRCX); 517 517 AssertRCReturn(rc, rc); 518 rc = SSMR3PutGCPtr(pSSM, pVCpu->em.s. mwait.uMonitorEAX);518 rc = SSMR3PutGCPtr(pSSM, pVCpu->em.s.MWait.uMonitorRAX); 519 519 AssertRCReturn(rc, rc); 520 rc = SSMR3PutGCPtr(pSSM, pVCpu->em.s. mwait.uMonitorECX);520 rc = SSMR3PutGCPtr(pSSM, pVCpu->em.s.MWait.uMonitorRCX); 521 521 AssertRCReturn(rc, rc); 522 rc = SSMR3PutGCPtr(pSSM, pVCpu->em.s. mwait.uMonitorEDX);522 rc = SSMR3PutGCPtr(pSSM, pVCpu->em.s.MWait.uMonitorRDX); 523 523 AssertRCReturn(rc, rc); 524 524 } … … 574 574 { 575 575 /* Load mwait state. */ 576 rc = SSMR3GetU32(pSSM, &pVCpu->em.s. mwait.fWait);576 rc = SSMR3GetU32(pSSM, &pVCpu->em.s.MWait.fWait); 577 577 AssertRCReturn(rc, rc); 578 rc = SSMR3GetGCPtr(pSSM, &pVCpu->em.s. mwait.uMWaitEAX);578 rc = SSMR3GetGCPtr(pSSM, &pVCpu->em.s.MWait.uMWaitRAX); 579 579 AssertRCReturn(rc, rc); 580 rc = SSMR3GetGCPtr(pSSM, &pVCpu->em.s. mwait.uMWaitECX);580 rc = SSMR3GetGCPtr(pSSM, &pVCpu->em.s.MWait.uMWaitRCX); 581 581 AssertRCReturn(rc, rc); 582 rc = SSMR3GetGCPtr(pSSM, &pVCpu->em.s. mwait.uMonitorEAX);582 rc = SSMR3GetGCPtr(pSSM, &pVCpu->em.s.MWait.uMonitorRAX); 583 583 AssertRCReturn(rc, rc); 584 rc = SSMR3GetGCPtr(pSSM, &pVCpu->em.s. mwait.uMonitorECX);584 rc = SSMR3GetGCPtr(pSSM, &pVCpu->em.s.MWait.uMonitorRCX); 585 585 AssertRCReturn(rc, rc); 586 rc = SSMR3GetGCPtr(pSSM, &pVCpu->em.s. mwait.uMonitorEDX);586 rc = SSMR3GetGCPtr(pSSM, &pVCpu->em.s.MWait.uMonitorRDX); 587 587 AssertRCReturn(rc, rc); 588 588 } … … 1896 1896 */ 1897 1897 Log2(("EMR3ExecuteVM: rc=%Rrc\n", rc)); 1898 EMSTATE const enmOldState = pVCpu->em.s.enmState; 1898 1899 switch (rc) 1899 1900 { … … 2104 2105 } 2105 2106 2107 /* 2108 * Act on state transition. 2109 */ 2110 EMSTATE const enmNewState = pVCpu->em.s.enmState; 2111 if (enmOldState != enmNewState) 2112 { 2113 /* Clear MWait flags. */ 2114 if ( enmOldState == EMSTATE_HALTED 2115 && (pVCpu->em.s.MWait.fWait & EMMWAIT_FLAG_ACTIVE) 2116 && ( enmNewState == EMSTATE_RAW 2117 || enmNewState == EMSTATE_HWACC 2118 || enmNewState == EMSTATE_REM 2119 || enmNewState == EMSTATE_DEBUG_GUEST_RAW 2120 || enmNewState == EMSTATE_DEBUG_GUEST_HWACC 2121 || enmNewState == EMSTATE_DEBUG_GUEST_REM) ) 2122 { 2123 LogFlow(("EMR3ExecuteVM: Clearing MWAIT\n")); 2124 pVCpu->em.s.MWait.fWait &= ~(EMMWAIT_FLAG_ACTIVE | EMMWAIT_FLAG_BREAKIRQIF0); 2125 } 2126 } 2127 2106 2128 STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatTotal, x); /* (skip this in release) */ 2107 2129 STAM_PROFILE_ADV_START(&pVCpu->em.s.StatTotal, x); … … 2159 2181 { 2160 2182 STAM_REL_PROFILE_START(&pVCpu->em.s.StatHalted, y); 2161 if (pVCpu->em.s.mwait.fWait & EMMWAIT_FLAG_ACTIVE) 2183 /* MWAIT has a special extension where it's woken up when 2184 an interrupt is pending even when IF=0. */ 2185 if ( (pVCpu->em.s.MWait.fWait & (EMMWAIT_FLAG_ACTIVE | EMMWAIT_FLAG_BREAKIRQIF0)) 2186 == (EMMWAIT_FLAG_ACTIVE | EMMWAIT_FLAG_BREAKIRQIF0)) 2162 2187 { 2163 /* mwait has a special extension where it's woken up when an interrupt is pending even when IF=0. */ 2164 rc = VMR3WaitHalted(pVM, pVCpu, !(pVCpu->em.s.mwait.fWait & EMMWAIT_FLAG_BREAKIRQIF0) && !(CPUMGetGuestEFlags(pVCpu) & X86_EFL_IF)); 2165 pVCpu->em.s.mwait.fWait &= ~(EMMWAIT_FLAG_ACTIVE | EMMWAIT_FLAG_BREAKIRQIF0); 2188 rc = VMR3WaitHalted(pVM, pVCpu, false /*fIgnoreInterrupts*/); 2189 if ( rc == VINF_SUCCESS 2190 && VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC)) 2191 { 2192 Log(("EMR3ExecuteVM: Triggering reschedule on pending IRQ after MWAIT\n")); 2193 rc = VINF_EM_RESCHEDULE; 2194 } 2166 2195 } 2167 2196 else … … 2178 2207 TMR3NotifySuspend(pVM, pVCpu); 2179 2208 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatTotal, x); 2180 Log(("EMR3ExecuteVM: actually returns %Rrc (state %s / %s)\n", rc, emR3GetStateName(pVCpu->em.s.enmState), emR3GetStateName( pVCpu->em.s.enmPrevState)));2209 Log(("EMR3ExecuteVM: actually returns %Rrc (state %s / %s)\n", rc, emR3GetStateName(pVCpu->em.s.enmState), emR3GetStateName(enmOldState))); 2181 2210 return VINF_EM_SUSPEND; 2182 2211 … … 2207 2236 pVCpu->em.s.enmState = EMSTATE_GURU_MEDITATION; 2208 2237 VMMR3FatalDump(pVM, pVCpu, rc); 2209 Log(("EMR3ExecuteVM: actually returns %Rrc (state %s / %s)\n", rc, emR3GetStateName(pVCpu->em.s.enmState), emR3GetStateName( pVCpu->em.s.enmPrevState)));2238 Log(("EMR3ExecuteVM: actually returns %Rrc (state %s / %s)\n", rc, emR3GetStateName(pVCpu->em.s.enmState), emR3GetStateName(enmOldState))); 2210 2239 return rc; 2211 2240 } … … 2225 2254 emR3Debug(pVM, pVCpu, rc); 2226 2255 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatTotal, x); 2227 Log(("EMR3ExecuteVM: actually returns %Rrc (state %s / %s)\n", rc, emR3GetStateName(pVCpu->em.s.enmState), emR3GetStateName( pVCpu->em.s.enmPrevState)));2256 Log(("EMR3ExecuteVM: actually returns %Rrc (state %s / %s)\n", rc, emR3GetStateName(pVCpu->em.s.enmState), emR3GetStateName(enmOldState))); 2228 2257 return rc; 2229 2258 } … … 2239 2268 TMR3NotifySuspend(pVM, pVCpu); 2240 2269 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatTotal, x); 2241 Log(("EMR3ExecuteVM: actually returns %Rrc (state %s / %s)\n", rc, emR3GetStateName(pVCpu->em.s.enmState), emR3GetStateName( pVCpu->em.s.enmPrevState)));2270 Log(("EMR3ExecuteVM: actually returns %Rrc (state %s / %s)\n", rc, emR3GetStateName(pVCpu->em.s.enmState), emR3GetStateName(enmOldState))); 2242 2271 return VERR_EM_INTERNAL_ERROR; 2243 2272 } -
trunk/src/VBox/VMM/VMMR3/EMRaw.cpp
r40274 r40356 364 364 } 365 365 366 #if 0367 /* Try our own instruction emulator before falling back to the recompiler. */368 DISCPUSTATE Cpu;369 rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pCtx->rip, &Cpu, "GEN EMU");370 if (RT_SUCCESS(rc))371 {372 uint32_t size;373 374 switch (Cpu.pCurInstr->opcode)375 {376 /* @todo we can do more now */377 case OP_MOV:378 case OP_AND:379 case OP_OR:380 case OP_XOR:381 case OP_POP:382 case OP_INC:383 case OP_DEC:384 case OP_XCHG:385 STAM_PROFILE_START(&pVCpu->em.s.StatMiscEmu, a);386 rc = EMInterpretInstructionCPU(pVM, &Cpu, CPUMCTX2CORE(pCtx), 0, &size);387 if (RT_SUCCESS(rc))388 {389 pCtx->rip += Cpu.opsize;390 STAM_PROFILE_STOP(&pVCpu->em.s.StatMiscEmu, a);391 return rc;392 }393 if (rc != VERR_EM_INTERPRETER)394 AssertMsgFailedReturn(("rc=%Rrc\n", rc), rc);395 STAM_PROFILE_STOP(&pVCpu->em.s.StatMiscEmu, a);396 break;397 }398 }399 #endif /* 0 */400 366 STAM_PROFILE_START(&pVCpu->em.s.StatREMEmu, a); 401 367 Log(("EMINS: %04x:%RGv RSP=%RGv\n", pCtx->cs, (RTGCPTR)pCtx->rip, (RTGCPTR)pCtx->rsp));
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