Changeset 40442 in vbox for trunk/src/VBox

Timestamp:

Mar 13, 2012 11:40:27 AM (13 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

76794

Message:

IEM integration in progress - doing some EM refactoring to ease this process.

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/EMAll.cpp (modified) (4 diffs)
• VMMAll/PGMAllPool.cpp (modified) (3 diffs)
• VMMR0/HWVMXR0.cpp (modified) (2 diffs)
• VMMR3/EMRaw.cpp (modified) (3 diffs)
• VMMR3/IOM.cpp (modified) (1 diff)
• VMMRC/IOMRC.cpp (modified) (3 diffs)
• VMMRC/PATMRC.cpp (modified) (3 diffs)
• VMMRC/TRPMRCHandlers.cpp (modified) (4 diffs)

trunk/src/VBox/VMM/VMMAll/EMAll.cpp

@@ -75 +75 @@
 *   Internal Functions                                                         *
 *******************************************************************************/
+#ifndef VBOX_WITH_IEM
 DECLINLINE(VBOXSTRICTRC) emInterpretInstructionCPU(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame,
                                                    RTGCPTR pvFault, EMCODETYPE enmCodeType, uint32_t *pcbSize);
+#endif
 
 
@@ -488 +490 @@
 VMMDECL(VBOXSTRICTRC) EMInterpretInstruction(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize)
 {
+    LogFlow(("EMInterpretInstruction %RGv fault %RGv\n", (RTGCPTR)pRegFrame->rip, pvFault));
+#ifdef VBOX_WITH_IEM
+    int rc = IEMExecOneEx(pVCpu, pRegFrame, IEM_EXEC_ONE_EX_FLAGS_, pcbSize);
+    if (RT_FAILURE(rc))
+        switch (rc)
+        {
+            case VERR_IEM_ASPECT_NOT_IMPLEMENTED:
+            case VERR_IEM_INSTR_NOT_IMPLEMENTED:
+                return VERR_EM_INTERPRETER;
+        }
+    return rc;
+#else
     RTGCPTR pbCode;
-
-    LogFlow(("EMInterpretInstruction %RGv fault %RGv\n", (RTGCPTR)pRegFrame->rip, pvFault));
     VBOXSTRICTRC rc = SELMToFlatEx(pVM, DIS_SELREG_CS, pRegFrame, pRegFrame->rip, 0, &pbCode);
     if (RT_SUCCESS(rc))
@@ -509 +521 @@
     }
     return VERR_EM_INTERPRETER;
+#endif
 }
 
@@ -555 +568 @@
 
 /**
- * Interpret a port I/O instruction.
- *
- * @returns VBox status code suitable for scheduling.
+ * Interprets the current instruction using the supplied DISCPUSTATE structure.
+ *
+ * IP/EIP/RIP *IS* updated!
+ *
+ * @returns VBox strict status code.
+ * @retval  VINF_*                  Scheduling instructions. When these are returned, it
+ *                                  starts to get a bit tricky to know whether code was
+ *                                  executed or not... We'll address this when it becomes a problem.
+ * @retval  VERR_EM_INTERPRETER     Something we can't cope with.
+ * @retval  VERR_*                  Fatal errors.
+ *
  * @param   pVM         The VM handle.
  * @param   pVCpu       The VMCPU handle.
- * @param   pCtxCore    The context core. This will be updated on successful return.
- * @param   pDis        The instruction to interpret.
- * @param   cbOp        The size of the instruction.
- * @remark  This may raise exceptions.
- */
-VMMDECL(VBOXSTRICTRC) EMInterpretPortIO(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, PDISCPUSTATE pDis, uint32_t cbOp)
-{
-    /*
-     * Hand it on to IOM.
-     */
-#ifdef IN_RC
-    VBOXSTRICTRC rcStrict = IOMGCIOPortHandler(pVM, pCtxCore, pDis);
-    if (IOM_SUCCESS(rcStrict))
-        pCtxCore->rip += cbOp;
-    NOREF(pVCpu);
-    return rcStrict;
-#else
-    NOREF(pVM); NOREF(pVCpu); NOREF(pCtxCore); NOREF(pDis); NOREF(cbOp);
-    AssertReleaseMsgFailed(("not implemented\n"));
-    return VERR_NOT_IMPLEMENTED;
-#endif
-}
-
+ * @param   pDis        The disassembler cpu state for the instruction to be
+ *                      interpreted.
+ * @param   pRegFrame   The register frame. IP/EIP/RIP *IS* changed!
+ * @param   pvFault     The fault address (CR2).
+ * @param   pcbSize     Size of the write (if applicable).
+ * @param   enmCodeType Code type (user/supervisor)
+ *
+ * @remark  Invalid opcode exceptions have a higher priority than GP (see Intel
+ *          Architecture System Developers Manual, Vol 3, 5.5) so we don't need
+ *          to worry about e.g. invalid modrm combinations (!)
+ *
+ * @todo    At this time we do NOT check if the instruction overwrites vital information.
+ *          Make sure this can't happen!! (will add some assertions/checks later)
+ */
+VMMDECL(VBOXSTRICTRC) EMInterpretInstructionCpuUpdtPC(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame,
+                                                      RTGCPTR pvFault, EMCODETYPE enmCodeType)
+{
+    STAM_PROFILE_START(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Emulate), a);
+    uint32_t cbIgnored;
+    VBOXSTRICTRC rc = emInterpretInstructionCPU(pVM, pVCpu, pDis, pRegFrame, pvFault, enmCodeType, &cbIgnored);
+    STAM_PROFILE_STOP(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Emulate), a);
+    if (RT_SUCCESS(rc))
+    {
+        pRegFrame->rip += pDis->opsize; /* Move on to the next instruction. */
+        STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,InterpretSucceeded));
+    }
+    else
+        STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,InterpretFailed));
+    return rc;
+}
 
 #ifndef VBOX_WITH_IEM
+
+
+
+
+
+
+/*
+ *
+ * The old interpreter.
+ * The old interpreter.
+ * The old interpreter.
+ * The old interpreter.
+ * The old interpreter.
+ *
+ */
 
 DECLINLINE(int) emRamRead(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCPTR GCPtrSrc, uint32_t cb)

trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

@@ -840 +840 @@
      * Must do this in raw mode (!); XP boot will fail otherwise.
      */
-    uint32_t cbWritten;
-    VBOXSTRICTRC rc2 = EMInterpretInstructionCPU(pVM, pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_ALL, &cbWritten);
+    VBOXSTRICTRC rc2 = EMInterpretInstructionCpuUpdtPC(pVM, pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_ALL);
     if (RT_SUCCESS(rc2))
-    {
-        pRegFrame->rip += pDis->opsize;
         AssertMsg(rc2 == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rc2))); /* ASSUMES no complicated stuff here. */
-    }
     else if (rc2 == VERR_EM_INTERPRETER)
     {
@@ -983 +979 @@
      * Interpret the instruction.
      */
-    uint32_t cb;
-    VBOXSTRICTRC rc = EMInterpretInstructionCPU(pVM, pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_ALL, &cb);
+    VBOXSTRICTRC rc = EMInterpretInstructionCpuUpdtPC(pVM, pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_ALL);
     if (RT_SUCCESS(rc))
-    {
-        pRegFrame->rip += pDis->opsize;
         AssertMsg(rc == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rc))); /* ASSUMES no complicated stuff here. */
-    }
     else if (rc == VERR_EM_INTERPRETER)
     {
@@ -1028 +1020 @@
 #endif
 
-    LogFlow(("pgmPoolAccessHandlerSimple: returns %Rrc cb=%d\n", VBOXSTRICTRC_VAL(rc), cb));
+    LogFlow(("pgmPoolAccessHandlerSimple: returns %Rrc\n", VBOXSTRICTRC_VAL(rc)));
     return VBOXSTRICTRC_VAL(rc);
 }

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

@@ -3115 +3115 @@
             {
                 uint32_t     cbOp;
-                uint32_t     cbSize;
                 PDISCPUSTATE pDis = &pVCpu->hwaccm.s.DisState;
 
@@ -3336 +3335 @@
 
                     default:
-                        rc = EMInterpretInstructionCPU(pVM, pVCpu, pDis, CPUMCTX2CORE(pCtx), 0, EMCODETYPE_SUPERVISOR, &cbSize);
+                        rc = EMInterpretInstructionCpuUpdtPC(pVM, pVCpu, pDis, CPUMCTX2CORE(pCtx), 0, EMCODETYPE_SUPERVISOR);
+                        fUpdateRIP = false;
                         break;
                     }

trunk/src/VBox/VMM/VMMR3/EMRaw.cpp

@@ -605 +605 @@
                 AssertRC(rc);
 
-                uint32_t opsize;
-                rc = VBOXSTRICTRC_TODO(EMInterpretInstructionCPU(pVM, pVCpu, &cpu, CPUMCTX2CORE(pCtx), 0, EMCODETYPE_SUPERVISOR, &opsize));
+                rc = VBOXSTRICTRC_TODO(EMInterpretInstructionCpuUpdtPC(pVM, pVCpu, &cpu, CPUMCTX2CORE(pCtx), 0, EMCODETYPE_SUPERVISOR));
                 if (RT_SUCCESS(rc))
-                {
-                    pCtx->rip += cpu.opsize;
                     return rc;
-                }
                 return emR3ExecuteInstruction(pVM, pVCpu, "Monitor: ");
             }
@@ -1047 +1043 @@
             &&  SELMGetCpuModeFromSelector(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid) == CPUMODE_32BIT)
         {
-            uint32_t size;
-
             STAM_PROFILE_START(&pVCpu->em.s.StatPrivEmu, a);
             switch (Cpu.pCurInstr->opcode)
@@ -1100 +1094 @@
 #endif
 
-                    rc = VBOXSTRICTRC_TODO(EMInterpretInstructionCPU(pVM, pVCpu, &Cpu, CPUMCTX2CORE(pCtx), 0, EMCODETYPE_SUPERVISOR, &size));
+                    rc = VBOXSTRICTRC_TODO(EMInterpretInstructionCpuUpdtPC(pVM, pVCpu, &Cpu, CPUMCTX2CORE(pCtx), 0, EMCODETYPE_SUPERVISOR));
                     if (RT_SUCCESS(rc))
                     {
-                        pCtx->rip += Cpu.opsize;
                         STAM_PROFILE_STOP(&pVCpu->em.s.StatPrivEmu, a);
 

trunk/src/VBox/VMM/VMMR3/IOM.cpp

@@ -33 +33 @@
  * disassembler (DIS) to figure which instruction caused it (there are a number
  * of instructions in addition to the I/O ones) and if it's an I/O port access
- * it will hand it to IOMGCIOPortHandler (via EMInterpretPortIO).
- * IOMGCIOPortHandler will lookup the port in the AVL tree of registered
+ * it will hand it to IOMRCIOPortHandler (via EMInterpretPortIO).
+ * IOMRCIOPortHandler will lookup the port in the AVL tree of registered
  * handlers. If found, the handler will be called otherwise default action is
  * taken. (Default action is to write into the void and read all set bits.)

trunk/src/VBox/VMM/VMMRC/IOMRC.cpp

@@ -1 +1 @@
 /* $Id$ */
 /** @file
- * IOM - Input / Output Monitor - Guest Context.
+ * IOM - Input / Output Monitor - Raw-Mode Context.
  */
 
 /*
- * Copyright (C) 2006-2007 Oracle Corporation
+ * Copyright (C) 2006-2012 Oracle Corporation
  *
  * This file is part of VirtualBox Open Source Edition (OSE), as
@@ -46 +46 @@
  * Attempts to service an IN/OUT instruction.
  *
- * The \#GP trap handler in GC will call this function if the opcode causing the
- * trap is a in or out type instruction. (Call it indirectly via EM that is.)
+ * The \#GP trap handler in RC will call this function if the opcode causing
+ * the trap is a in or out type instruction. (Call it indirectly via EM that
+ * is.)
  *
  * @returns Strict VBox status code. Informational status codes other than the one documented
@@ -56 +57 @@
  * @retval  VINF_EM_RESCHEDULE_REM      The exception was dispatched and cannot be executed in raw-mode. (TRPMRaiseXcptErr)
  * @retval  VINF_EM_RAW_EMULATE_INSTR   Defer the read to the REM.
- * @retval  VINF_IOM_R3_IOPORT_READ     Defer the read to ring-3. (R0/GC only)
+ * @retval  VINF_IOM_R3_IOPORT_READ     Defer the read to ring-3.
  * @retval  VINF_EM_RAW_GUEST_TRAP      The exception was left pending. (TRPMRaiseXcptErr)
  * @retval  VINF_TRPM_XCPT_DISPATCHED   The exception was raised and dispatched for raw-mode execution. (TRPMRaiseXcptErr)
  *
- * @param   pVM         The virtual machine (GC pointer of course).
+ * @param   pVM         The virtual machine handle.
  * @param   pRegFrame   Pointer to CPUMCTXCORE guest registers structure.
  * @param   pCpu        Disassembler CPU state.
  */
-VMMRCDECL(VBOXSTRICTRC) IOMGCIOPortHandler(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
+VMMRCDECL(VBOXSTRICTRC) IOMRCIOPortHandler(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
 {
     switch (pCpu->pCurInstr->opcode)

trunk/src/VBox/VMM/VMMRC/PATMRC.cpp

@@ -477 +477 @@
         if (pRec->patch.flags & PATMFL_INT3_REPLACEMENT)
         {
-            uint32_t    size, cbOp;
+            uint32_t    cbOp;
             DISCPUSTATE cpu;
 
@@ -523 +523 @@
             }
 
-            rc = EMInterpretInstructionCPU(pVM, VMMGetCpu0(pVM), &cpu, pRegFrame, 0 /* not relevant here */,
-                                           EMCODETYPE_SUPERVISOR, &size);
+            rc = EMInterpretInstructionCpuUpdtPC(pVM, VMMGetCpu0(pVM), &cpu, pRegFrame, 0 /* not relevant here */,
+                                                 EMCODETYPE_SUPERVISOR);
             if (rc != VINF_SUCCESS)
             {
@@ -532 +532 @@
                 return VINF_EM_RAW_EMULATE_INSTR;
             }
-
-            pRegFrame->eip += cpu.opsize;
             return VINF_SUCCESS;
         }

trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp

@@ -556 +556 @@
         {
             LogFlow(("TRPMGCTrap06Handler: -> EMInterpretInstructionCPU\n"));
-            uint32_t cbIgnored;
-            rc = EMInterpretInstructionCPU(pVM, pVCpu, &Cpu, pRegFrame, PC, EMCODETYPE_SUPERVISOR, &cbIgnored);
-            if (RT_SUCCESS(rc))
-                pRegFrame->eip += Cpu.opsize;
+            rc = EMInterpretInstructionCpuUpdtPC(pVM, pVCpu, &Cpu, pRegFrame, PC, EMCODETYPE_SUPERVISOR);
         }
         /* Never generate a raw trap here; it might be an instruction, that requires emulation. */
@@ -801 +798 @@
         case OP_WRMSR:
         {
-            uint32_t cbIgnored;
-            rc = EMInterpretInstructionCPU(pVM, pVCpu, pCpu, pRegFrame, PC, EMCODETYPE_SUPERVISOR, &cbIgnored);
-            if (RT_SUCCESS(rc))
-                pRegFrame->eip += pCpu->opsize;
-            else if (rc == VERR_EM_INTERPRETER)
+            rc = EMInterpretInstructionCpuUpdtPC(pVM, pVCpu, pCpu, pRegFrame, PC, EMCODETYPE_SUPERVISOR);
+            if (rc == VERR_EM_INTERPRETER)
                 rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
             return trpmGCExitTrap(pVM, pVCpu, rc, pRegFrame);
@@ -880 +874 @@
         case OP_RDPMC:
         {
-            uint32_t cbIgnored;
-            rc = EMInterpretInstructionCPU(pVM, pVCpu, pCpu, pRegFrame, PC, EMCODETYPE_SUPERVISOR, &cbIgnored);
-            if (RT_SUCCESS(rc))
-                pRegFrame->eip += pCpu->opsize;
-            else if (rc == VERR_EM_INTERPRETER)
+            rc = EMInterpretInstructionCpuUpdtPC(pVM, pVCpu, pCpu, pRegFrame, PC, EMCODETYPE_SUPERVISOR);
+            if (rc == VERR_EM_INTERPRETER)
                 rc = VINF_EM_RAW_EXCEPTION_PRIVILEGED;
             return trpmGCExitTrap(pVM, pVCpu, rc, pRegFrame);
@@ -1000 +991 @@
         &&  (Cpu.pCurInstr->optype & OPTYPE_PORTIO))
     {
-        VBOXSTRICTRC rcStrict = EMInterpretPortIO(pVM, pVCpu, pRegFrame, &Cpu, cbOp);
-        rc = VBOXSTRICTRC_TODO(rcStrict);
+        VBOXSTRICTRC rcStrict = IOMRCIOPortHandler(pVM, pRegFrame, &Cpu);
+        if (IOM_SUCCESS(rcStrict))
+            pRegFrame->rip += cbOp;
         return trpmGCExitTrap(pVM, pVCpu, rc, pRegFrame);
     }