VirtualBox

Changeset 40448 in vbox for trunk/src/VBox/VMM/VMMAll


Ignore:
Timestamp:
Mar 13, 2012 3:33:55 PM (13 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
76803
Message:

EM: refactoring...

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/EMAll.cpp

    r40447 r40448  
    7676*******************************************************************************/
    7777#ifndef VBOX_WITH_IEM
    78 DECLINLINE(VBOXSTRICTRC) emInterpretInstructionCPU(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame,
    79                                                    RTGCPTR pvFault, EMCODETYPE enmCodeType, uint32_t *pcbSize);
     78DECLINLINE(VBOXSTRICTRC) emInterpretInstructionCPUOuter(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame,
     79                                                        RTGCPTR pvFault, EMCODETYPE enmCodeType, uint32_t *pcbSize);
    8080#endif
    8181
     
    514514            Assert(cbOp == pDis->opsize);
    515515            uint32_t cbIgnored;
    516             rc = EMInterpretInstructionCPU(pVM, pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_SUPERVISOR, &cbIgnored);
     516            rc = emInterpretInstructionCPUOuter(pVM, pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_SUPERVISOR, &cbIgnored);
    517517            if (RT_SUCCESS(rc))
    518518                pRegFrame->rip += cbOp; /* Move on to the next instruction. */
     
    570570        {
    571571            Assert(cbOp == pDis->opsize);
    572             rc = EMInterpretInstructionCPU(pVM, pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_SUPERVISOR, pcbWritten);
     572            rc = emInterpretInstructionCPUOuter(pVM, pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_SUPERVISOR, pcbWritten);
    573573            if (RT_SUCCESS(rc))
    574574                pRegFrame->rip += cbOp; /* Move on to the next instruction. */
     
    579579    return VERR_EM_INTERPRETER;
    580580#endif
    581 }
    582 
    583 
    584 /**
    585  * Interprets the current instruction using the supplied DISCPUSTATE structure.
    586  *
    587  * EIP is *NOT* updated!
    588  *
    589  * @returns VBox strict status code.
    590  * @retval  VINF_*                  Scheduling instructions. When these are returned, it
    591  *                                  starts to get a bit tricky to know whether code was
    592  *                                  executed or not... We'll address this when it becomes a problem.
    593  * @retval  VERR_EM_INTERPRETER     Something we can't cope with.
    594  * @retval  VERR_*                  Fatal errors.
    595  *
    596  * @param   pVM         The VM handle.
    597  * @param   pVCpu       The VMCPU handle.
    598  * @param   pDis        The disassembler cpu state for the instruction to be
    599  *                      interpreted.
    600  * @param   pRegFrame   The register frame. EIP is *NOT* changed!
    601  * @param   pvFault     The fault address (CR2).
    602  * @param   pcbSize     Size of the write (if applicable).
    603  * @param   enmCodeType Code type (user/supervisor)
    604  *
    605  * @remark  Invalid opcode exceptions have a higher priority than GP (see Intel
    606  *          Architecture System Developers Manual, Vol 3, 5.5) so we don't need
    607  *          to worry about e.g. invalid modrm combinations (!)
    608  *
    609  * @todo    At this time we do NOT check if the instruction overwrites vital information.
    610  *          Make sure this can't happen!! (will add some assertions/checks later)
    611  */
    612 VMMDECL(VBOXSTRICTRC) EMInterpretInstructionCPU(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame,
    613                                                 RTGCPTR pvFault, EMCODETYPE enmCodeType, uint32_t *pcbSize)
    614 {
    615     STAM_PROFILE_START(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Emulate), a);
    616     VBOXSTRICTRC rc = emInterpretInstructionCPU(pVM, pVCpu, pDis, pRegFrame, pvFault, enmCodeType, pcbSize);
    617     STAM_PROFILE_STOP(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Emulate), a);
    618     if (RT_SUCCESS(rc))
    619         STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,InterpretSucceeded));
    620     else
    621         STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,InterpretFailed));
    622     return rc;
    623581}
    624582
     
    657615    STAM_PROFILE_START(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Emulate), a);
    658616    uint32_t cbIgnored;
    659     VBOXSTRICTRC rc = emInterpretInstructionCPU(pVM, pVCpu, pDis, pRegFrame, pvFault, enmCodeType, &cbIgnored);
     617    VBOXSTRICTRC rc = emInterpretInstructionCPUOuter(pVM, pVCpu, pDis, pRegFrame, pvFault, enmCodeType, &cbIgnored);
    660618    STAM_PROFILE_STOP(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Emulate), a);
    661619    if (RT_SUCCESS(rc))
     
    31123070/**
    31133071 * Internal worker.
    3114  * @copydoc EMInterpretInstructionCPU
     3072 * @copydoc emInterpretInstructionCPUOuter
    31153073 */
    31163074DECLINLINE(VBOXSTRICTRC) emInterpretInstructionCPU(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame,
     
    33783336}
    33793337
     3338/**
     3339 * Interprets the current instruction using the supplied DISCPUSTATE structure.
     3340 *
     3341 * EIP is *NOT* updated!
     3342 *
     3343 * @returns VBox strict status code.
     3344 * @retval  VINF_*                  Scheduling instructions. When these are returned, it
     3345 *                                  starts to get a bit tricky to know whether code was
     3346 *                                  executed or not... We'll address this when it becomes a problem.
     3347 * @retval  VERR_EM_INTERPRETER     Something we can't cope with.
     3348 * @retval  VERR_*                  Fatal errors.
     3349 *
     3350 * @param   pVM         The VM handle.
     3351 * @param   pVCpu       The VMCPU handle.
     3352 * @param   pDis        The disassembler cpu state for the instruction to be
     3353 *                      interpreted.
     3354 * @param   pRegFrame   The register frame. EIP is *NOT* changed!
     3355 * @param   pvFault     The fault address (CR2).
     3356 * @param   pcbSize     Size of the write (if applicable).
     3357 * @param   enmCodeType Code type (user/supervisor)
     3358 *
     3359 * @remark  Invalid opcode exceptions have a higher priority than GP (see Intel
     3360 *          Architecture System Developers Manual, Vol 3, 5.5) so we don't need
     3361 *          to worry about e.g. invalid modrm combinations (!)
     3362 *
     3363 * @todo    At this time we do NOT check if the instruction overwrites vital information.
     3364 *          Make sure this can't happen!! (will add some assertions/checks later)
     3365 */
     3366DECLINLINE(VBOXSTRICTRC) emInterpretInstructionCPUOuter(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame,
     3367                                                        RTGCPTR pvFault, EMCODETYPE enmCodeType, uint32_t *pcbSize)
     3368{
     3369    STAM_PROFILE_START(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Emulate), a);
     3370    VBOXSTRICTRC rc = emInterpretInstructionCPU(pVM, pVCpu, pDis, pRegFrame, pvFault, enmCodeType, pcbSize);
     3371    STAM_PROFILE_STOP(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Emulate), a);
     3372    if (RT_SUCCESS(rc))
     3373        STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,InterpretSucceeded));
     3374    else
     3375        STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,InterpretFailed));
     3376    return rc;
     3377}
     3378
     3379
    33803380#endif /* !VBOX_WITH_IEM */
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