Changeset 40453 in vbox for trunk/src/VBox/VMM/VMMAll

Timestamp:

Mar 13, 2012 6:38:06 PM (13 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

76810

Message:

EM/IEM/PATM: some refactoring.

Location:

trunk/src/VBox/VMM/VMMAll

Files:

• EMAll.cpp (modified) (5 diffs)
• IEMAll.cpp (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/EMAll.cpp

@@ -26 +26 @@
 #include <VBox/vmm/csam.h>
 #include <VBox/vmm/pgm.h>
+#ifdef VBOX_WITH_IEM
+# include <VBox/vmm/iem.h>
+#endif
 #include <VBox/vmm/iom.h>
 #include <VBox/vmm/stam.h>
@@ -488 +491 @@
     LogFlow(("EMInterpretInstruction %RGv fault %RGv\n", (RTGCPTR)pRegFrame->rip, pvFault));
 #ifdef VBOX_WITH_IEM
-    int rc = IEMExecOneEx(pVCpu, pRegFrame, IEM_EXEC_ONE_EX_FLAGS_, pcbSize);
-    if (RT_FAILURE(rc))
-        switch (rc)
-        {
-            case VERR_IEM_ASPECT_NOT_IMPLEMENTED:
-            case VERR_IEM_INSTR_NOT_IMPLEMENTED:
-                return VERR_EM_INTERPRETER;
-        }
+    NOREF(pvFault);
+    VBOXSTRICTRC rc = IEMExecOneEx(pVCpu, pRegFrame, NULL);
+    if (RT_UNLIKELY(   rc == VERR_IEM_ASPECT_NOT_IMPLEMENTED
+                    || rc == VERR_IEM_INSTR_NOT_IMPLEMENTED))
+        return VERR_EM_INTERPRETER;
     return rc;
 #else
@@ -545 +545 @@
     LogFlow(("EMInterpretInstructionEx %RGv fault %RGv\n", (RTGCPTR)pRegFrame->rip, pvFault));
 #ifdef VBOX_WITH_IEM
-    int rc = IEMExecOneEx(pVCpu, pRegFrame, IEM_EXEC_ONE_EX_FLAGS_, pcbWritten);
-    if (RT_FAILURE(rc))
-        switch (rc)
-        {
-            case VERR_IEM_ASPECT_NOT_IMPLEMENTED:
-            case VERR_IEM_INSTR_NOT_IMPLEMENTED:
-                return VERR_EM_INTERPRETER;
-        }
+    NOREF(pvFault);
+    VBOXSTRICTRC rc = IEMExecOneEx(pVCpu, pRegFrame, pcbWritten);
+    if (RT_UNLIKELY(   rc == VERR_IEM_ASPECT_NOT_IMPLEMENTED
+                    || rc == VERR_IEM_INSTR_NOT_IMPLEMENTED))
+        return VERR_EM_INTERPRETER;
     return rc;
 #else
@@ -609 +606 @@
                                                        RTGCPTR pvFault, EMCODETYPE enmCodeType)
 {
-    STAM_PROFILE_START(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Emulate), a);
+    LogFlow(("EMInterpretInstructionDisasState %RGv fault %RGv\n", (RTGCPTR)pRegFrame->rip, pvFault));
+#ifdef VBOX_WITH_IEM
+    NOREF(pDis); NOREF(pvFault); NOREF(enmCodeType);
+    VBOXSTRICTRC rc = IEMExecOneEx(pVCpu, pRegFrame, NULL);
+    if (RT_UNLIKELY(   rc == VERR_IEM_ASPECT_NOT_IMPLEMENTED
+                    || rc == VERR_IEM_INSTR_NOT_IMPLEMENTED))
+        return VERR_EM_INTERPRETER;
+    return rc;
+#else
     uint32_t cbIgnored;
     VBOXSTRICTRC rc = emInterpretInstructionCPUOuter(pVCpu, pDis, pRegFrame, pvFault, enmCodeType, &cbIgnored);
-    STAM_PROFILE_STOP(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,Emulate), a);
     if (RT_SUCCESS(rc))
-    {
         pRegFrame->rip += pDis->opsize; /* Move on to the next instruction. */
-        STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,InterpretSucceeded));
-    }
-    else
-        STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,InterpretFailed));
     return rc;
-}
-
+#endif
+}
+
+#if defined(IN_RC) /*&& defined(VBOX_WITH_PATM)*/
+
+DECLINLINE(int) emRCStackRead(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCPTR GCPtrSrc, uint32_t cb)
+{
+    int rc = MMGCRamRead(pVM, pvDst, (void *)(uintptr_t)GCPtrSrc, cb);
+    if (RT_LIKELY(rc != VERR_ACCESS_DENIED))
+        return rc;
+    return PGMPhysInterpretedReadNoHandlers(pVCpu, pCtxCore, pvDst, GCPtrSrc, cb, /*fMayTrap*/ false);
+}
+
+
+/**
+ * Interpret IRET (currently only to V86 code) - PATM only.
+ *
+ * @returns VBox status code.
+ * @param   pVM         The VM handle.
+ * @param   pVCpu       The VMCPU handle.
+ * @param   pRegFrame   The register frame.
+ *
+ */
+VMMDECL(int) EMInterpretIretV86ForPatm(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame)
+{
+    RTGCUINTPTR pIretStack = (RTGCUINTPTR)pRegFrame->esp;
+    RTGCUINTPTR eip, cs, esp, ss, eflags, ds, es, fs, gs, uMask;
+    int         rc;
+
+    Assert(!CPUMIsGuestIn64BitCode(pVCpu, pRegFrame));
+    /** @todo Rainy day: Test what happens when VERR_EM_INTERPRETER is returned by
+     *        this function.  Faire that it may guru on us, thus not converted to
+     *        IEM. */
+
+    rc  = emRCStackRead(pVM, pVCpu, pRegFrame, &eip,      (RTGCPTR)pIretStack      , 4);
+    rc |= emRCStackRead(pVM, pVCpu, pRegFrame, &cs,       (RTGCPTR)(pIretStack + 4), 4);
+    rc |= emRCStackRead(pVM, pVCpu, pRegFrame, &eflags,   (RTGCPTR)(pIretStack + 8), 4);
+    AssertRCReturn(rc, VERR_EM_INTERPRETER);
+    AssertReturn(eflags & X86_EFL_VM, VERR_EM_INTERPRETER);
+
+    rc |= emRCStackRead(pVM, pVCpu, pRegFrame, &esp,      (RTGCPTR)(pIretStack + 12), 4);
+    rc |= emRCStackRead(pVM, pVCpu, pRegFrame, &ss,       (RTGCPTR)(pIretStack + 16), 4);
+    rc |= emRCStackRead(pVM, pVCpu, pRegFrame, &es,       (RTGCPTR)(pIretStack + 20), 4);
+    rc |= emRCStackRead(pVM, pVCpu, pRegFrame, &ds,       (RTGCPTR)(pIretStack + 24), 4);
+    rc |= emRCStackRead(pVM, pVCpu, pRegFrame, &fs,       (RTGCPTR)(pIretStack + 28), 4);
+    rc |= emRCStackRead(pVM, pVCpu, pRegFrame, &gs,       (RTGCPTR)(pIretStack + 32), 4);
+    AssertRCReturn(rc, VERR_EM_INTERPRETER);
+
+    pRegFrame->eip = eip & 0xffff;
+    pRegFrame->cs  = cs;
+
+    /* Mask away all reserved bits */
+    uMask = X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_TF | X86_EFL_IF | X86_EFL_DF | X86_EFL_OF | X86_EFL_IOPL | X86_EFL_NT | X86_EFL_RF | X86_EFL_VM | X86_EFL_AC | X86_EFL_VIF | X86_EFL_VIP | X86_EFL_ID;
+    eflags &= uMask;
+
+    CPUMRawSetEFlags(pVCpu, pRegFrame, eflags);
+    Assert((pRegFrame->eflags.u32 & (X86_EFL_IF|X86_EFL_IOPL)) == X86_EFL_IF);
+
+    pRegFrame->esp = esp;
+    pRegFrame->ss  = ss;
+    pRegFrame->ds  = ds;
+    pRegFrame->es  = es;
+    pRegFrame->fs  = fs;
+    pRegFrame->gs  = gs;
+
+    return VINF_SUCCESS;
+}
+
+#endif /* IN_RC && VBOX_WITH_PATM */
 #ifndef VBOX_WITH_IEM
 
@@ -1925 +1991 @@
     return VERR_EM_INTERPRETER;
 #endif
-}
-#endif /* IN_RC */
-
-
-#ifdef IN_RC
-/**
- * Interpret IRET (currently only to V86 code)
- *
- * @returns VBox status code.
- * @param   pVM         The VM handle.
- * @param   pVCpu       The VMCPU handle.
- * @param   pRegFrame   The register frame.
- *
- */
-VMMDECL(int) EMInterpretIret(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame)
-{
-    RTGCUINTPTR pIretStack = (RTGCUINTPTR)pRegFrame->esp;
-    RTGCUINTPTR eip, cs, esp, ss, eflags, ds, es, fs, gs, uMask;
-    int         rc;
-
-    Assert(!CPUMIsGuestIn64BitCode(pVCpu, pRegFrame));
-
-    rc  = emRamRead(pVM, pVCpu, pRegFrame, &eip,      (RTGCPTR)pIretStack      , 4);
-    rc |= emRamRead(pVM, pVCpu, pRegFrame, &cs,       (RTGCPTR)(pIretStack + 4), 4);
-    rc |= emRamRead(pVM, pVCpu, pRegFrame, &eflags,   (RTGCPTR)(pIretStack + 8), 4);
-    AssertRCReturn(rc, VERR_EM_INTERPRETER);
-    AssertReturn(eflags & X86_EFL_VM, VERR_EM_INTERPRETER);
-
-    rc |= emRamRead(pVM, pVCpu, pRegFrame, &esp,      (RTGCPTR)(pIretStack + 12), 4);
-    rc |= emRamRead(pVM, pVCpu, pRegFrame, &ss,       (RTGCPTR)(pIretStack + 16), 4);
-    rc |= emRamRead(pVM, pVCpu, pRegFrame, &es,       (RTGCPTR)(pIretStack + 20), 4);
-    rc |= emRamRead(pVM, pVCpu, pRegFrame, &ds,       (RTGCPTR)(pIretStack + 24), 4);
-    rc |= emRamRead(pVM, pVCpu, pRegFrame, &fs,       (RTGCPTR)(pIretStack + 28), 4);
-    rc |= emRamRead(pVM, pVCpu, pRegFrame, &gs,       (RTGCPTR)(pIretStack + 32), 4);
-    AssertRCReturn(rc, VERR_EM_INTERPRETER);
-
-    pRegFrame->eip = eip & 0xffff;
-    pRegFrame->cs  = cs;
-
-    /* Mask away all reserved bits */
-    uMask = X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF | X86_EFL_TF | X86_EFL_IF | X86_EFL_DF | X86_EFL_OF | X86_EFL_IOPL | X86_EFL_NT | X86_EFL_RF | X86_EFL_VM | X86_EFL_AC | X86_EFL_VIF | X86_EFL_VIP | X86_EFL_ID;
-    eflags &= uMask;
-
-#ifndef IN_RING0
-    CPUMRawSetEFlags(pVCpu, pRegFrame, eflags);
-#endif
-    Assert((pRegFrame->eflags.u32 & (X86_EFL_IF|X86_EFL_IOPL)) == X86_EFL_IF);
-
-    pRegFrame->esp = esp;
-    pRegFrame->ss  = ss;
-    pRegFrame->ds  = ds;
-    pRegFrame->es  = es;
-    pRegFrame->fs  = fs;
-    pRegFrame->gs  = gs;
-
-    return VINF_SUCCESS;
 }
 #endif /* IN_RC */

trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

@@ -7918 +7918 @@
 }
 
+
+/**
+ * Updates the real CPU context structure with the context core (from the trap
+ * stack frame) before interpreting any instructions.
+ *
+ * @param   pCtx        The real CPU context.
+ * @param   pCtxCore    The trap stack CPU core context.
+ */
+DECLINLINE(void) iemCtxCoreToCtx(PCPUMCTX pCtx, PCCPUMCTXCORE pCtxCore)
+{
+    PCPUMCTXCORE pDst = CPUMCTX2CORE(pCtx);
+    if (pDst != pCtxCore)
+        *pDst = *pCtxCore;
+}
+
+
+/**
+ * Updates the context core (from the trap stack frame) with the updated values
+ * from the real CPU context structure after instruction emulation.
+ *
+ * @param   pCtx        The real CPU context.
+ * @param   pCtxCore    The trap stack CPU core context.
+ */
+DECLINLINE(void) iemCtxToCtxCore(PCPUMCTXCORE pCtxCore, PCCPUMCTX pCtx)
+{
+    PCCPUMCTXCORE pSrc = CPUMCTX2CORE(pCtx);
+    if (pSrc != pCtxCore)
+        *pCtxCore = *pSrc;
+}
+
+
+#if 0 /* The IRET-to-v8086 mode in PATM is very optimistic, so I don't dare do this yet. */
+/**
+ * Executes a IRET instruction with default operand size.
+ *
+ * This is for PATM.
+ *
+ * @returns VBox status code.
+ * @param   pVCpu               The current virtual CPU.
+ * @param   pCtxCore            The register frame.
+ */
+VMM_INT_DECL(int) IEMExecInstr_iret(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore)
+{
+    PIEMCPU  pIemCpu = &pVCpu->iem.s;
+    PCPUMCTX pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
+
+    iemCtxCoreToCtx(pCtx, pCtxCore);
+    iemInitDecoder(pIemCpu);
+    VBOXSTRICTRC rcStrict = iemCImpl_iret(pIemCpu, 1, pIemCpu->enmDefOpSize);
+    if (rcStrict == VINF_SUCCESS)
+        iemCtxToCtxCore(pCtxCore, pCtx);
+    else
+        LogFlow(("IEMExecInstr_iret: cs:rip=%04x:%08RX64 ss:rsp=%04x:%08RX64 EFL=%06x - rcStrict=%Rrc\n",
+                 pCtx->cs, pCtx->rip, pCtx->ss, pCtx->rsp, pCtx->eflags.u, VBOXSTRICTRC_VAL(rcStrict)));
+    return rcStrict;
+}
+#endif
+