Changeset 40769 in vbox
- Timestamp:
- Apr 5, 2012 11:49:20 AM (13 years ago)
- svn:sync-xref-src-repo-rev:
- 77270
- Location:
- trunk
- Files:
-
- 4 edited
-
include/VBox/sup.h (modified) (1 diff)
-
include/VBox/sup.mac (modified) (1 diff)
-
src/VBox/HostDrivers/Support/SUPDrv.c (modified) (27 diffs)
-
src/VBox/HostDrivers/Support/SUPDrvInternal.h (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/sup.h
r40763 r40769 208 208 /** The max CPU ID (RTMpGetMaxCpuId). */ 209 209 RTCPUID idCpuMax; 210 /** Padding to 8 byte alignment. */211 uint16_t au16Padding1[2];212 /** Spinlock protecting the GIP array members. */213 RTSPINLOCK Spinlock; /* 144 */214 210 215 211 /** Padding / reserved space for future data. */ 216 uint32_t au32Padding1[ HC_ARCH_BITS == 64 ? 26 : 27];212 uint32_t au32Padding1[29]; 217 213 218 214 /** Table indexed by the CPU APIC ID to get the CPU table index. */ -
trunk/include/VBox/sup.mac
r40743 r40769 63 63 .u16Padding0 resw 1 64 64 .idCpuMax resd 1 65 .au16Padding1 resw 2 66 .Spinlock RTR0PTR_RES 1 67 %ifndef HC_ARCH_BITS 68 %error "Missing HC_ARCH_BITS" 69 %endif 70 %if HC_ARCH_BITS == 64 71 .au32Padding1 resd 26 72 %else 73 .au32Padding1 resd 27 74 %endif 65 .au32Padding1 resd 29 75 66 .aiCpuFromApicId resw 256 76 67 .aiCpuFromCpuSetIdx resw 256 -
trunk/src/VBox/HostDrivers/Support/SUPDrv.c
r40763 r40769 134 134 static DECLCALLBACK(void) supdrvGipInitOnCpu(RTCPUID idCpu, void *pvUser1, void *pvUser2); 135 135 static void supdrvGipTerm(PSUPGLOBALINFOPAGE pGip); 136 static void supdrvGipUpdate(PSUP GLOBALINFOPAGE pGip, uint64_t u64NanoTS, uint64_t u64TSC, RTCPUID idCpu, uint64_t iTick);137 static void supdrvGipUpdatePerCpu(PSUP GLOBALINFOPAGE pGip, uint64_t u64NanoTS, uint64_t u64TSC,136 static void supdrvGipUpdate(PSUPDRVDEVEXT pDevExt, uint64_t u64NanoTS, uint64_t u64TSC, RTCPUID idCpu, uint64_t iTick); 137 static void supdrvGipUpdatePerCpu(PSUPDRVDEVEXT pDevExt, uint64_t u64NanoTS, uint64_t u64TSC, 138 138 RTCPUID idCpu, uint8_t idApic, uint64_t iTick); 139 139 static void supdrvGipInitCpu(PSUPGLOBALINFOPAGE pGip, PSUPGIPCPU pCpu, uint64_t u64NanoTS); … … 446 446 if (RT_SUCCESS(rc)) 447 447 { 448 rc = RTSpinlockCreate(&pDevExt->spinGip); 449 if (RT_SUCCESS(rc)) 450 { 448 451 #ifdef SUPDRV_USE_MUTEX_FOR_LDR 449 rc = RTSemMutexCreate(&pDevExt->mtxLdr);452 rc = RTSemMutexCreate(&pDevExt->mtxLdr); 450 453 #else 451 rc = RTSemFastMutexCreate(&pDevExt->mtxLdr);454 rc = RTSemFastMutexCreate(&pDevExt->mtxLdr); 452 455 #endif 453 if (RT_SUCCESS(rc))454 {455 rc = RTSemFastMutexCreate(&pDevExt->mtxComponentFactory);456 456 if (RT_SUCCESS(rc)) 457 457 { 458 #ifdef SUPDRV_USE_MUTEX_FOR_LDR 459 rc = RTSemMutexCreate(&pDevExt->mtxGip); 460 #else 461 rc = RTSemFastMutexCreate(&pDevExt->mtxGip); 462 #endif 458 rc = RTSemFastMutexCreate(&pDevExt->mtxComponentFactory); 463 459 if (RT_SUCCESS(rc)) 464 460 { 465 rc = supdrvGipCreate(pDevExt); 461 #ifdef SUPDRV_USE_MUTEX_FOR_LDR 462 rc = RTSemMutexCreate(&pDevExt->mtxGip); 463 #else 464 rc = RTSemFastMutexCreate(&pDevExt->mtxGip); 465 #endif 466 466 if (RT_SUCCESS(rc)) 467 467 { 468 rc = supdrvGipCreate(pDevExt); 469 if (RT_SUCCESS(rc)) 470 { 468 471 #ifdef VBOX_WITH_SUPDRV_GENERIC_TRACER 469 rc = supdrvTracerInit(pDevExt);472 rc = supdrvTracerInit(pDevExt); 470 473 #elif defined(VBOX_WITH_DTRACE_R0DRV) 471 rc = supdrvVtgInit(pDevExt, &g_aFunctions[10]);472 if (RT_SUCCESS(rc))474 rc = supdrvVtgInit(pDevExt, &g_aFunctions[10]); 475 if (RT_SUCCESS(rc)) 473 476 #endif 474 {475 pDevExt->pLdrInitImage = NULL;476 pDevExt->hLdrInitThread = NIL_RTNATIVETHREAD;477 pDevExt->u32Cookie = BIRD; /** @todo make this random? */478 pDevExt->cbSession = (uint32_t)cbSession;479 480 /*481 * Fixup the absolute symbols.482 *483 * Because of the table indexing assumptions we'll have a little #ifdef orgy484 * here rather than distributing this to OS specific files. At least for now.485 */477 { 478 pDevExt->pLdrInitImage = NULL; 479 pDevExt->hLdrInitThread = NIL_RTNATIVETHREAD; 480 pDevExt->u32Cookie = BIRD; /** @todo make this random? */ 481 pDevExt->cbSession = (uint32_t)cbSession; 482 483 /* 484 * Fixup the absolute symbols. 485 * 486 * Because of the table indexing assumptions we'll have a little #ifdef orgy 487 * here rather than distributing this to OS specific files. At least for now. 488 */ 486 489 #ifdef RT_OS_DARWIN 487 490 # if ARCH_BITS == 32 488 if (SUPR0GetPagingMode() >= SUPPAGINGMODE_AMD64)489 {490 g_aFunctions[0].pfn = (void *)1; /* SUPR0AbsIs64bit */491 g_aFunctions[1].pfn = (void *)0x80; /* SUPR0Abs64bitKernelCS - KERNEL64_CS, seg.h */492 g_aFunctions[2].pfn = (void *)0x88; /* SUPR0Abs64bitKernelSS - KERNEL64_SS, seg.h */493 g_aFunctions[3].pfn = (void *)0x88; /* SUPR0Abs64bitKernelDS - KERNEL64_SS, seg.h */494 }495 else496 g_aFunctions[0].pfn = g_aFunctions[1].pfn = g_aFunctions[2].pfn = g_aFunctions[4].pfn = (void *)0;497 g_aFunctions[4].pfn = (void *)0x08; /* SUPR0AbsKernelCS - KERNEL_CS, seg.h */498 g_aFunctions[5].pfn = (void *)0x10; /* SUPR0AbsKernelSS - KERNEL_DS, seg.h */499 g_aFunctions[6].pfn = (void *)0x10; /* SUPR0AbsKernelDS - KERNEL_DS, seg.h */500 g_aFunctions[7].pfn = (void *)0x10; /* SUPR0AbsKernelES - KERNEL_DS, seg.h */501 g_aFunctions[8].pfn = (void *)0x10; /* SUPR0AbsKernelFS - KERNEL_DS, seg.h */502 g_aFunctions[9].pfn = (void *)0x48; /* SUPR0AbsKernelGS - CPU_DATA_GS, seg.h */491 if (SUPR0GetPagingMode() >= SUPPAGINGMODE_AMD64) 492 { 493 g_aFunctions[0].pfn = (void *)1; /* SUPR0AbsIs64bit */ 494 g_aFunctions[1].pfn = (void *)0x80; /* SUPR0Abs64bitKernelCS - KERNEL64_CS, seg.h */ 495 g_aFunctions[2].pfn = (void *)0x88; /* SUPR0Abs64bitKernelSS - KERNEL64_SS, seg.h */ 496 g_aFunctions[3].pfn = (void *)0x88; /* SUPR0Abs64bitKernelDS - KERNEL64_SS, seg.h */ 497 } 498 else 499 g_aFunctions[0].pfn = g_aFunctions[1].pfn = g_aFunctions[2].pfn = g_aFunctions[4].pfn = (void *)0; 500 g_aFunctions[4].pfn = (void *)0x08; /* SUPR0AbsKernelCS - KERNEL_CS, seg.h */ 501 g_aFunctions[5].pfn = (void *)0x10; /* SUPR0AbsKernelSS - KERNEL_DS, seg.h */ 502 g_aFunctions[6].pfn = (void *)0x10; /* SUPR0AbsKernelDS - KERNEL_DS, seg.h */ 503 g_aFunctions[7].pfn = (void *)0x10; /* SUPR0AbsKernelES - KERNEL_DS, seg.h */ 504 g_aFunctions[8].pfn = (void *)0x10; /* SUPR0AbsKernelFS - KERNEL_DS, seg.h */ 505 g_aFunctions[9].pfn = (void *)0x48; /* SUPR0AbsKernelGS - CPU_DATA_GS, seg.h */ 503 506 # else /* 64-bit darwin: */ 504 g_aFunctions[0].pfn = (void *)1; /* SUPR0AbsIs64bit */505 g_aFunctions[1].pfn = (void *)(uintptr_t)ASMGetCS(); /* SUPR0Abs64bitKernelCS */506 g_aFunctions[2].pfn = (void *)(uintptr_t)ASMGetSS(); /* SUPR0Abs64bitKernelSS */507 g_aFunctions[3].pfn = (void *)0; /* SUPR0Abs64bitKernelDS */508 g_aFunctions[4].pfn = (void *)(uintptr_t)ASMGetCS(); /* SUPR0AbsKernelCS */509 g_aFunctions[5].pfn = (void *)(uintptr_t)ASMGetSS(); /* SUPR0AbsKernelSS */510 g_aFunctions[6].pfn = (void *)0; /* SUPR0AbsKernelDS */511 g_aFunctions[7].pfn = (void *)0; /* SUPR0AbsKernelES */512 g_aFunctions[8].pfn = (void *)0; /* SUPR0AbsKernelFS */513 g_aFunctions[9].pfn = (void *)0; /* SUPR0AbsKernelGS */507 g_aFunctions[0].pfn = (void *)1; /* SUPR0AbsIs64bit */ 508 g_aFunctions[1].pfn = (void *)(uintptr_t)ASMGetCS(); /* SUPR0Abs64bitKernelCS */ 509 g_aFunctions[2].pfn = (void *)(uintptr_t)ASMGetSS(); /* SUPR0Abs64bitKernelSS */ 510 g_aFunctions[3].pfn = (void *)0; /* SUPR0Abs64bitKernelDS */ 511 g_aFunctions[4].pfn = (void *)(uintptr_t)ASMGetCS(); /* SUPR0AbsKernelCS */ 512 g_aFunctions[5].pfn = (void *)(uintptr_t)ASMGetSS(); /* SUPR0AbsKernelSS */ 513 g_aFunctions[6].pfn = (void *)0; /* SUPR0AbsKernelDS */ 514 g_aFunctions[7].pfn = (void *)0; /* SUPR0AbsKernelES */ 515 g_aFunctions[8].pfn = (void *)0; /* SUPR0AbsKernelFS */ 516 g_aFunctions[9].pfn = (void *)0; /* SUPR0AbsKernelGS */ 514 517 515 518 # endif 516 519 #else /* !RT_OS_DARWIN */ 517 520 # if ARCH_BITS == 64 518 g_aFunctions[0].pfn = (void *)1; /* SUPR0AbsIs64bit */519 g_aFunctions[1].pfn = (void *)(uintptr_t)ASMGetCS(); /* SUPR0Abs64bitKernelCS */520 g_aFunctions[2].pfn = (void *)(uintptr_t)ASMGetSS(); /* SUPR0Abs64bitKernelSS */521 g_aFunctions[3].pfn = (void *)(uintptr_t)ASMGetDS(); /* SUPR0Abs64bitKernelDS */521 g_aFunctions[0].pfn = (void *)1; /* SUPR0AbsIs64bit */ 522 g_aFunctions[1].pfn = (void *)(uintptr_t)ASMGetCS(); /* SUPR0Abs64bitKernelCS */ 523 g_aFunctions[2].pfn = (void *)(uintptr_t)ASMGetSS(); /* SUPR0Abs64bitKernelSS */ 524 g_aFunctions[3].pfn = (void *)(uintptr_t)ASMGetDS(); /* SUPR0Abs64bitKernelDS */ 522 525 # else 523 g_aFunctions[0].pfn = g_aFunctions[1].pfn = g_aFunctions[2].pfn = g_aFunctions[4].pfn = (void *)0;526 g_aFunctions[0].pfn = g_aFunctions[1].pfn = g_aFunctions[2].pfn = g_aFunctions[4].pfn = (void *)0; 524 527 # endif 525 g_aFunctions[4].pfn = (void *)(uintptr_t)ASMGetCS(); /* SUPR0AbsKernelCS */526 g_aFunctions[5].pfn = (void *)(uintptr_t)ASMGetSS(); /* SUPR0AbsKernelSS */527 g_aFunctions[6].pfn = (void *)(uintptr_t)ASMGetDS(); /* SUPR0AbsKernelDS */528 g_aFunctions[7].pfn = (void *)(uintptr_t)ASMGetES(); /* SUPR0AbsKernelES */529 g_aFunctions[8].pfn = (void *)(uintptr_t)ASMGetFS(); /* SUPR0AbsKernelFS */530 g_aFunctions[9].pfn = (void *)(uintptr_t)ASMGetGS(); /* SUPR0AbsKernelGS */528 g_aFunctions[4].pfn = (void *)(uintptr_t)ASMGetCS(); /* SUPR0AbsKernelCS */ 529 g_aFunctions[5].pfn = (void *)(uintptr_t)ASMGetSS(); /* SUPR0AbsKernelSS */ 530 g_aFunctions[6].pfn = (void *)(uintptr_t)ASMGetDS(); /* SUPR0AbsKernelDS */ 531 g_aFunctions[7].pfn = (void *)(uintptr_t)ASMGetES(); /* SUPR0AbsKernelES */ 532 g_aFunctions[8].pfn = (void *)(uintptr_t)ASMGetFS(); /* SUPR0AbsKernelFS */ 533 g_aFunctions[9].pfn = (void *)(uintptr_t)ASMGetGS(); /* SUPR0AbsKernelGS */ 531 534 #endif /* !RT_OS_DARWIN */ 532 return VINF_SUCCESS; 535 return VINF_SUCCESS; 536 } 537 538 #if defined(VBOX_WITH_SUPDRV_GENERIC_TRACER) || defined(VBOX_WITH_DTRACE_R0DRV) 539 supdrvGipDestroy(pDevExt); 540 #endif 533 541 } 534 542 535 #if defined(VBOX_WITH_SUPDRV_GENERIC_TRACER) || defined(VBOX_WITH_DTRACE_R0DRV) 536 supdrvGipDestroy(pDevExt); 543 #ifdef SUPDRV_USE_MUTEX_FOR_GIP 544 RTSemMutexDestroy(pDevExt->mtxGip); 545 pDevExt->mtxGip = NIL_RTSEMMUTEX; 546 #else 547 RTSemFastMutexDestroy(pDevExt->mtxGip); 548 pDevExt->mtxGip = NIL_RTSEMFASTMUTEX; 537 549 #endif 538 550 } 539 540 #ifdef SUPDRV_USE_MUTEX_FOR_GIP 541 RTSemMutexDestroy(pDevExt->mtxGip); 542 pDevExt->mtxGip = NIL_RTSEMMUTEX; 551 RTSemFastMutexDestroy(pDevExt->mtxComponentFactory); 552 pDevExt->mtxComponentFactory = NIL_RTSEMFASTMUTEX; 553 } 554 #ifdef SUPDRV_USE_MUTEX_FOR_LDR 555 RTSemMutexDestroy(pDevExt->mtxLdr); 556 pDevExt->mtxLdr = NIL_RTSEMMUTEX; 543 557 #else 544 RTSemFastMutexDestroy(pDevExt->mtxGip);545 pDevExt->mtxGip= NIL_RTSEMFASTMUTEX;558 RTSemFastMutexDestroy(pDevExt->mtxLdr); 559 pDevExt->mtxLdr = NIL_RTSEMFASTMUTEX; 546 560 #endif 547 }548 RTSemFastMutexDestroy(pDevExt->mtxComponentFactory);549 pDevExt->mtxComponentFactory = NIL_RTSEMFASTMUTEX;550 561 } 551 #ifdef SUPDRV_USE_MUTEX_FOR_LDR 552 RTSemMutexDestroy(pDevExt->mtxLdr); 553 pDevExt->mtxLdr = NIL_RTSEMMUTEX; 554 #else 555 RTSemFastMutexDestroy(pDevExt->mtxLdr); 556 pDevExt->mtxLdr = NIL_RTSEMFASTMUTEX; 557 #endif 562 RTSpinlockDestroy(pDevExt->spinGip); 563 pDevExt->spinGip = NIL_RTSPINLOCK; 558 564 } 559 565 RTSpinlockDestroy(pDevExt->Spinlock); … … 627 633 /* kill the GIP. */ 628 634 supdrvGipDestroy(pDevExt); 635 RTSpinlockDestroy(pDevExt->spinGip); 636 pDevExt->spinGip = NIL_RTSPINLOCK; 629 637 630 638 #ifdef VBOX_WITH_SUPDRV_GENERIC_TRACER … … 4926 4934 supdrvGipInit(pDevExt, pGip, HCPhysGip, RTTimeSystemNanoTS(), 1000000000 / u32Interval /*=Hz*/, cCpus); 4927 4935 4928 /* Creating spinlocks can fail (in theory). supdrvGipInit() returns void. */4929 rc = RTSpinlockCreate(&pGip->Spinlock);4930 if (RT_FAILURE(rc))4931 {4932 supdrvGipDestroy(pDevExt);4933 return rc;4934 }4935 4936 4936 /* 4937 4937 * Create the timer. … … 5002 5002 { 5003 5003 supdrvGipTerm(pDevExt->pGip); 5004 if (pDevExt->pGip->Spinlock != NIL_RTSPINLOCK)5005 {5006 RTSpinlockDestroy(pDevExt->pGip->Spinlock);5007 pDevExt->pGip->Spinlock = NIL_RTSPINLOCK;5008 }5009 5010 5004 pDevExt->pGip = NULL; 5011 5005 } … … 5051 5045 uint64_t NanoTS = RTTimeSystemNanoTS(); 5052 5046 5053 supdrvGipUpdate(pDevExt ->pGip, NanoTS, u64TSC, NIL_RTCPUID, iTick);5047 supdrvGipUpdate(pDevExt, NanoTS, u64TSC, NIL_RTCPUID, iTick); 5054 5048 5055 5049 ASMSetFlags(fOldFlags); … … 5072 5066 /** @todo reset the transaction number and whatnot when iTick == 1. */ 5073 5067 if (pDevExt->idGipMaster == idCpu) 5074 supdrvGipUpdate(pDevExt ->pGip, NanoTS, u64TSC, idCpu, iTick);5068 supdrvGipUpdate(pDevExt, NanoTS, u64TSC, idCpu, iTick); 5075 5069 else 5076 supdrvGipUpdatePerCpu(pDevExt ->pGip, NanoTS, u64TSC, idCpu, ASMGetApicId(), iTick);5070 supdrvGipUpdatePerCpu(pDevExt, NanoTS, u64TSC, idCpu, ASMGetApicId(), iTick); 5077 5071 5078 5072 ASMSetFlags(fOldFlags); … … 5119 5113 * This is used by supdrvGipMpEvent as well as the supdrvGipCreate. 5120 5114 * 5121 * @param p Gip The GIP.5115 * @param pDevExt The device extension, 5122 5116 * @param idCpu The CPU ID. 5123 5117 */ 5124 static void supdrvGipMpEventOnline(PSUP GLOBALINFOPAGE pGip, RTCPUID idCpu)5118 static void supdrvGipMpEventOnline(PSUPDRVDEVEXT pDevExt, RTCPUID idCpu) 5125 5119 { 5126 5120 int iCpuSet = 0; … … 5129 5123 uint64_t u64NanoTS = 0; 5130 5124 RTSPINLOCKTMP SpinlockTmp = RTSPINLOCKTMP_INITIALIZER; 5131 5125 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip; 5126 5127 AssertPtrReturnVoid(pGip); 5132 5128 AssertRelease(idCpu == RTMpCpuId()); 5133 5129 Assert(pGip->cPossibleCpus == RTMpGetCount()); … … 5137 5133 * on all CPUs simultaneously, see #6110. 5138 5134 */ 5139 RTSpinlockAcquireNoInts(p Gip->Spinlock, &SpinlockTmp);5135 RTSpinlockAcquireNoInts(pDevExt->spinGip, &SpinlockTmp); 5140 5136 5141 5137 /* … … 5172 5168 ASMAtomicWriteSize(&pGip->aCPUs[i].enmState, SUPGIPCPUSTATE_ONLINE); 5173 5169 5174 RTSpinlockReleaseNoInts(p Gip->Spinlock, &SpinlockTmp);5170 RTSpinlockReleaseNoInts(pDevExt->spinGip, &SpinlockTmp); 5175 5171 } 5176 5172 … … 5181 5177 * This is used by supdrvGipMpEvent. 5182 5178 * 5183 * @param p Gip The GIP.5179 * @param pDevExt The device extension. 5184 5180 * @param idCpu The CPU ID. 5185 5181 */ 5186 static void supdrvGipMpEventOffline(PSUP GLOBALINFOPAGE pGip, RTCPUID idCpu)5182 static void supdrvGipMpEventOffline(PSUPDRVDEVEXT pDevExt, RTCPUID idCpu) 5187 5183 { 5188 5184 int iCpuSet; 5189 5185 unsigned i; 5190 5186 5187 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip; 5191 5188 RTSPINLOCKTMP SpinlockTmp = RTSPINLOCKTMP_INITIALIZER; 5192 RTSpinlockAcquireNoInts(pGip->Spinlock, &SpinlockTmp); 5189 5190 AssertPtrReturnVoid(pGip); 5191 RTSpinlockAcquireNoInts(pDevExt->spinGip, &SpinlockTmp); 5193 5192 5194 5193 iCpuSet = RTMpCpuIdToSetIndex(idCpu); … … 5205 5204 ASMAtomicWriteSize(&pGip->aCPUs[i].enmState, SUPGIPCPUSTATE_OFFLINE); 5206 5205 5207 RTSpinlockReleaseNoInts(p Gip->Spinlock, &SpinlockTmp);5206 RTSpinlockReleaseNoInts(pDevExt->spinGip, &SpinlockTmp); 5208 5207 } 5209 5208 … … 5239 5238 case RTMPEVENT_ONLINE: 5240 5239 AssertRelease(idCpu == RTMpCpuId()); 5241 supdrvGipMpEventOnline(p Gip, idCpu);5240 supdrvGipMpEventOnline(pDevExt, idCpu); 5242 5241 break; 5243 5242 case RTMPEVENT_OFFLINE: 5244 supdrvGipMpEventOffline(p Gip, idCpu);5243 supdrvGipMpEventOffline(pDevExt, idCpu); 5245 5244 break; 5246 5245 … … 5515 5514 pGip->cPossibleCpus = RTMpGetCount(); 5516 5515 pGip->idCpuMax = RTMpGetMaxCpuId(); 5517 pGip->Spinlock = NIL_RTSPINLOCK;5518 5516 for (i = 0; i < RT_ELEMENTS(pGip->aiCpuFromApicId); i++) 5519 5517 pGip->aiCpuFromApicId[i] = 0; … … 5544 5542 /* This is good enough, even though it will update some of the globals a 5545 5543 bit to much. */ 5546 supdrvGipMpEventOnline((PSUP GLOBALINFOPAGE)pvUser2, idCpu);5544 supdrvGipMpEventOnline((PSUPDRVDEVEXT)pvUser1, idCpu); 5547 5545 } 5548 5546 … … 5570 5568 * updates all the per cpu data except the transaction id. 5571 5569 * 5572 * @param p Gip The GIP.5570 * @param pDevExt The device extension. 5573 5571 * @param pGipCpu Pointer to the per cpu data. 5574 5572 * @param u64NanoTS The current time stamp. … … 5576 5574 * @param iTick The current timer tick. 5577 5575 */ 5578 static void supdrvGipDoUpdateCpu(PSUP GLOBALINFOPAGE pGip, PSUPGIPCPU pGipCpu, uint64_t u64NanoTS, uint64_t u64TSC, uint64_t iTick)5576 static void supdrvGipDoUpdateCpu(PSUPDRVDEVEXT pDevExt, PSUPGIPCPU pGipCpu, uint64_t u64NanoTS, uint64_t u64TSC, uint64_t iTick) 5579 5577 { 5580 5578 uint64_t u64TSCDelta; … … 5584 5582 uint64_t u64CpuHz; 5585 5583 uint32_t u32TransactionId; 5584 5585 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip; 5586 AssertPtrReturnVoid(pGip); 5586 5587 5587 5588 /* Delta between this and the previous update. */ … … 5682 5683 * Updates the GIP. 5683 5684 * 5684 * @param p Gip Pointer to the GIP.5685 * @param pDevExt The device extension. 5685 5686 * @param u64NanoTS The current nanosecond timesamp. 5686 5687 * @param u64TSC The current TSC timesamp. … … 5688 5689 * @param iTick The current timer tick. 5689 5690 */ 5690 static void supdrvGipUpdate(PSUP GLOBALINFOPAGE pGip, uint64_t u64NanoTS, uint64_t u64TSC, RTCPUID idCpu, uint64_t iTick)5691 static void supdrvGipUpdate(PSUPDRVDEVEXT pDevExt, uint64_t u64NanoTS, uint64_t u64TSC, RTCPUID idCpu, uint64_t iTick) 5691 5692 { 5692 5693 /* … … 5694 5695 */ 5695 5696 PSUPGIPCPU pGipCpu; 5697 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip; 5698 AssertPtrReturnVoid(pGip); 5699 5696 5700 if (pGip->u32Mode != SUPGIPMODE_ASYNC_TSC) 5697 5701 pGipCpu = &pGip->aCPUs[0]; … … 5741 5745 * Update the data. 5742 5746 */ 5743 supdrvGipDoUpdateCpu(p Gip, pGipCpu, u64NanoTS, u64TSC, iTick);5747 supdrvGipDoUpdateCpu(pDevExt, pGipCpu, u64NanoTS, u64TSC, iTick); 5744 5748 5745 5749 /* … … 5753 5757 * Updates the per cpu GIP data for the calling cpu. 5754 5758 * 5755 * @param p Gip Pointer to the GIP.5759 * @param pDevExt The device extension. 5756 5760 * @param u64NanoTS The current nanosecond timesamp. 5757 5761 * @param u64TSC The current TSC timesamp. … … 5760 5764 * @param iTick The current timer tick. 5761 5765 */ 5762 static void supdrvGipUpdatePerCpu(PSUP GLOBALINFOPAGE pGip, uint64_t u64NanoTS, uint64_t u64TSC,5766 static void supdrvGipUpdatePerCpu(PSUPDRVDEVEXT pDevExt, uint64_t u64NanoTS, uint64_t u64TSC, 5763 5767 RTCPUID idCpu, uint8_t idApic, uint64_t iTick) 5764 5768 { 5765 5769 uint32_t iCpu; 5770 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip; 5766 5771 5767 5772 /* … … 5774 5779 iCpu = supdrvGipCpuIndexFromCpuId(pGip, idCpu); 5775 5780 if (pGip->aCPUs[iCpu].enmState == SUPGIPCPUSTATE_OFFLINE) 5776 supdrvGipMpEventOnline(p Gip, idCpu);5781 supdrvGipMpEventOnline(pDevExt, idCpu); 5777 5782 } 5778 5783 … … 5797 5802 * Update the data. 5798 5803 */ 5799 supdrvGipDoUpdateCpu(p Gip, pGipCpu, u64NanoTS, u64TSC, iTick);5804 supdrvGipDoUpdateCpu(pDevExt, pGipCpu, u64NanoTS, u64TSC, iTick); 5800 5805 5801 5806 /* -
trunk/src/VBox/HostDrivers/Support/SUPDrvInternal.h
r40759 r40769 518 518 RTSEMFASTMUTEX mtxGip; 519 519 #endif 520 /** GIP spinlock protecting GIP members during Mp events. */ 521 RTSPINLOCK spinGip; 520 522 /** Pointer to the Global Info Page (GIP). */ 521 523 PSUPGLOBALINFOPAGE pGip;
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