Changeset 40907 in vbox for trunk/include
- Timestamp:
- Apr 13, 2012 8:50:14 PM (13 years ago)
- Location:
- trunk/include/VBox/vmm
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/pdmapi.h
r40405 r40907 41 41 */ 42 42 43 VMMDECL(int) PDMGetInterrupt(PVMCPU pVCpu, uint8_t *pu8Interrupt);44 VMMDECL(int) PDMIsaSetIrq(PVM pVM, uint8_t u8Irq, uint8_t u8Level);45 VMM DECL(int) PDMIoApicSetIrq(PVM pVM, uint8_t u8Irq, uint8_t u8Level);46 VMM DECL(int) PDMIoApicSendMsi(PVM pVM, RTGCPHYS GCAddr, uint32_t uValue);47 VMMDECL(bool) PDMHasIoApic(PVM pVM);48 VMMDECL(int) PDMApicHasPendingIrq(PVM pVM, bool *pfPending);49 VMMDECL(int) PDMApicSetBase(PVM pVM, uint64_t u64Base);50 VMMDECL(int) PDMApicGetBase(PVM pVM, uint64_t *pu64Base);51 VMMDECL(int) PDMApicSetTPR(PVMCPU pVCpu, uint8_t u8TPR);52 VMMDECL(int) PDMApicGetTPR(PVMCPU pVCpu, uint8_t *pu8TPR, bool *pfPending);53 VMMDECL(int) PDMApicWriteMSR(PVM pVM, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value);54 VMMDECL(int) PDMApicReadMSR(PVM pVM, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value);55 VMMDECL(int) PDMVMMDevHeapR3ToGCPhys(PVM pVM, RTR3PTR pv, RTGCPHYS *pGCPhys);56 VMMDECL(bool) PDMVMMDevHeapIsEnabled(PVM pVM);43 VMMDECL(int) PDMGetInterrupt(PVMCPU pVCpu, uint8_t *pu8Interrupt); 44 VMMDECL(int) PDMIsaSetIrq(PVM pVM, uint8_t u8Irq, uint8_t u8Level, uint32_t uTagSrc); 45 VMM_INT_DECL(int) PDMIoApicSetIrq(PVM pVM, uint8_t u8Irq, uint8_t u8Level, uint32_t uTagSrc); 46 VMM_INT_DECL(int) PDMIoApicSendMsi(PVM pVM, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc); 47 VMMDECL(bool) PDMHasIoApic(PVM pVM); 48 VMMDECL(int) PDMApicHasPendingIrq(PVM pVM, bool *pfPending); 49 VMMDECL(int) PDMApicSetBase(PVM pVM, uint64_t u64Base); 50 VMMDECL(int) PDMApicGetBase(PVM pVM, uint64_t *pu64Base); 51 VMMDECL(int) PDMApicSetTPR(PVMCPU pVCpu, uint8_t u8TPR); 52 VMMDECL(int) PDMApicGetTPR(PVMCPU pVCpu, uint8_t *pu8TPR, bool *pfPending); 53 VMMDECL(int) PDMApicWriteMSR(PVM pVM, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value); 54 VMMDECL(int) PDMApicReadMSR(PVM pVM, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value); 55 VMMDECL(int) PDMVMMDevHeapR3ToGCPhys(PVM pVM, RTR3PTR pv, RTGCPHYS *pGCPhys); 56 VMMDECL(bool) PDMVMMDevHeapIsEnabled(PVM pVM); 57 57 58 58 -
trunk/include/VBox/vmm/pdmdev.h
r40416 r40907 552 552 * @param iIrq IRQ number to set. 553 553 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines. 554 */ 555 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel)); 554 * @param uTagSrc The IRQ tag and source (for tracing). 555 */ 556 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc)); 556 557 557 558 /** … … 596 597 597 598 /** Current PDMPCIBUSREG version number. */ 598 #define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 2, 0)599 #define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 3, 0) 599 600 600 601 /** … … 612 613 * @param iIrq IRQ number to set. 613 614 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines. 615 * @param uTagSrc The IRQ tag and source (for tracing). 614 616 * @thread EMT only. 615 617 */ 616 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel ));618 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)); 617 619 618 620 /** … … 622 624 * @param iIrq IRQ number to set. 623 625 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines. 626 * @param uTagSrc The IRQ tag and source (for tracing). 624 627 * @thread EMT only. 625 628 */ 626 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel ));629 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)); 627 630 628 631 /** … … 630 633 * 631 634 * @param pDevIns PCI device instance. 632 * @param GC AddrPhysical address MSI request was written.635 * @param GCPhys Physical address MSI request was written. 633 636 * @param uValue Value written. 637 * @param uTagSrc The IRQ tag and source (for tracing). 634 638 * @thread EMT only. 635 639 */ 636 DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GC Addr, uint32_t uValue));640 DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc)); 637 641 638 642 … … 663 667 664 668 /** Current PDMPCIHLPRC version number. */ 665 #define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 2, 0)669 #define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 3, 0) 666 670 667 671 … … 680 684 * @param iIrq IRQ number to set. 681 685 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines. 686 * @param uTagSrc The IRQ tag and source (for tracing). 682 687 * @thread EMT only. 683 688 */ 684 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel ));689 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)); 685 690 686 691 /** … … 690 695 * @param iIrq IRQ number to set. 691 696 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines. 697 * @param uTagSrc The IRQ tag and source (for tracing). 692 698 * @thread EMT only. 693 699 */ 694 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel ));700 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)); 695 701 696 702 /** … … 698 704 * 699 705 * @param pDevIns PCI device instance. 700 * @param GC AddrPhysical address MSI request was written.706 * @param GCPhys Physical address MSI request was written. 701 707 * @param uValue Value written. 708 * @param uTagSrc The IRQ tag and source (for tracing). 702 709 * @thread EMT only. 703 710 */ 704 DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GC Addr, uint32_t uValue));711 DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc)); 705 712 706 713 … … 731 738 732 739 /** Current PDMPCIHLPR0 version number. */ 733 #define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 2, 0)740 #define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 3, 0) 734 741 735 742 /** … … 747 754 * @param iIrq IRQ number to set. 748 755 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines. 749 * @ thread EMT only.750 */ 751 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel ));756 * @param uTagSrc The IRQ tag and source (for tracing). 757 */ 758 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)); 752 759 753 760 /** … … 757 764 * @param iIrq IRQ number to set. 758 765 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines. 759 * @ thread EMT only.760 */ 761 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel ));766 * @param uTagSrc The IRQ tag and source (for tracing). 767 */ 768 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)); 762 769 763 770 /** … … 765 772 * 766 773 * @param pDevIns PCI device instance. 767 * @param GC AddrPhysical address MSI request was written.774 * @param GCPhys Physical address MSI request was written. 768 775 * @param uValue Value written. 769 * @ thread EMT only.770 */ 771 DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GC Addr, uint32_t uValue));776 * @param uTagSrc The IRQ tag and source (for tracing). 777 */ 778 DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc)); 772 779 773 780 /** … … 831 838 832 839 /** Current PDMPCIHLPR3 version number. */ 833 #define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 2, 0)840 #define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 3, 0) 834 841 835 842 … … 848 855 * @param iIrq IRQ number to set. 849 856 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines. 850 */ 851 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel)); 857 * @param uTagSrc The IRQ tag and source (for tracing). 858 */ 859 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)); 852 860 853 861 /** … … 856 864 * @returns Pending interrupt number. 857 865 * @param pDevIns Device instance of the PIC. 858 */ 859 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns)); 866 * @param puTagSrc Where to return the IRQ tag and source. 867 */ 868 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc)); 860 869 861 870 /** The name of the RC SetIrq entry point. */ … … 873 882 874 883 /** Current PDMPICREG version number. */ 875 #define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 1, 0)884 #define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 2, 0) 876 885 877 886 /** … … 924 933 925 934 /** Current PDMPICHLPRC version number. */ 926 #define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 1, 0)935 #define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 2, 0) 927 936 928 937 … … 1066 1075 * @returns Pending interrupt number. 1067 1076 * @param pDevIns Device instance of the APIC. 1068 */ 1069 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns)); 1077 * @param puTagSrc Where to return the tag source. 1078 */ 1079 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc)); 1070 1080 1071 1081 /** … … 1156 1166 * @param u8Polarity See APIC implementation. 1157 1167 * @param u8TriggerMode See APIC implementation. 1168 * @param uTagSrc The IRQ tag and source (for tracing). 1158 1169 */ 1159 1170 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode, 1160 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode)); 1161 1162 /** 1163 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1). Used for 1164 * virtual wire mode when interrupts from the PIC are passed through LAPIC. 1171 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc)); 1172 1173 /** 1174 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1). 1175 * 1176 * Used for virtual wire mode when interrupts from the PIC are passed through 1177 * LAPIC. 1165 1178 * 1166 1179 * @returns status code. 1167 1180 * @param pDevIns Device instance of the APIC. 1168 1181 * @param u8Pin Local pin number (0 or 1 for current CPUs). 1182 * @param u8Level The level. 1183 * @param uTagSrc The IRQ tag and source (for tracing). 1169 1184 */ 1170 1185 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level)); … … 1217 1232 1218 1233 /** Current PDMAPICREG version number. */ 1219 #define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 1, 0)1234 #define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 2, 0) 1220 1235 1221 1236 … … 1527 1542 * @param iIrq IRQ number to set. 1528 1543 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines. 1529 */ 1530 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel)); 1531 1532 /** The name of the GC SetIrq entry point. */ 1544 * @param uTagSrc The IRQ tag and source (for tracing). 1545 */ 1546 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)); 1547 1548 /** The name of the RC SetIrq entry point. */ 1533 1549 const char *pszSetIrqRC; 1534 1550 … … 1542 1558 * @param GCPhys Request address. 1543 1559 * @param uValue Request value. 1544 */ 1545 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue)); 1546 1547 /** The name of the GC SendMsi entry point. */ 1560 * @param uTagSrc The IRQ tag and source (for tracing). 1561 */ 1562 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc)); 1563 1564 /** The name of the RC SendMsi entry point. */ 1548 1565 const char *pszSendMsiRC; 1549 1566 … … 1555 1572 1556 1573 /** Current PDMAPICREG version number. */ 1557 #define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 2, 0)1574 #define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 3, 0) 1558 1575 1559 1576 … … 1579 1596 * @param u8Polarity See APIC implementation. 1580 1597 * @param u8TriggerMode See APIC implementation. 1598 * @param uTagSrc The IRQ tag and source (for tracing). 1581 1599 */ 1582 1600 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode, 1583 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode ));1601 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc)); 1584 1602 1585 1603 /** … … 1609 1627 1610 1628 /** Current PDMIOAPICHLPRC version number. */ 1611 #define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 1, 0)1629 #define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 2, 0) 1612 1630 1613 1631 … … 1633 1651 * @param u8Polarity See APIC implementation. 1634 1652 * @param u8TriggerMode See APIC implementation. 1653 * @param uTagSrc The IRQ tag and source (for tracing). 1635 1654 */ 1636 1655 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode, 1637 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode ));1656 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc)); 1638 1657 1639 1658 /** … … 1663 1682 1664 1683 /** Current PDMIOAPICHLPR0 version number. */ 1665 #define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 1, 0)1684 #define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 2, 0) 1666 1685 1667 1686 /** … … 1686 1705 * @param u8Polarity See APIC implementation. 1687 1706 * @param u8TriggerMode See APIC implementation. 1707 * @param uTagSrc The IRQ tag and source (for tracing). 1688 1708 */ 1689 1709 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode, 1690 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode ));1710 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc)); 1691 1711 1692 1712 /** … … 1738 1758 1739 1759 /** Current PDMIOAPICHLPR3 version number. */ 1740 #define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 1, 0)1760 #define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 2, 0) 1741 1761 1742 1762 … … 3925 3945 /** Tracing indicator. */ 3926 3946 uint32_t fTracing; 3927 #if HC_ARCH_BITS == 64 3947 /** The tracing ID of this device. */ 3948 uint32_t idTracing; 3949 #if HC_ARCH_BITS == 32 3928 3950 /** Align the internal data more naturally. */ 3929 uint32_t u32Padding;3951 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 13 : 0]; 3930 3952 #endif 3931 3953 … … 3936 3958 PDMDEVINSINT s; 3937 3959 #endif 3938 uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 0: 112 + 0x28];3960 uint8_t padding[HC_ARCH_BITS == 32 ? 72 : 112 + 0x28]; 3939 3961 } Internal; 3940 3962 … … 3945 3967 3946 3968 /** Current PDMDEVINS version number. */ 3947 #define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 2, 0)3969 #define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 3, 0) 3948 3970 3949 3971 /** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */ -
trunk/include/VBox/vmm/pdmdrv.h
r40652 r40907 389 389 /** Tracing indicator. */ 390 390 uint32_t fTracing; 391 #if HC_ARCH_BITS == 64 391 /** The tracing ID of this device. */ 392 uint32_t idTracing; 393 #if HC_ARCH_BITS == 32 392 394 /** Align the internal data more naturally. */ 393 uint32_t u32Padding;395 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 7 : 0]; 394 396 #endif 395 397 … … 409 411 410 412 /** Current DRVREG version number. */ 411 #define PDM_DRVINS_VERSION PDM_VERSION_MAKE(0xf0fe, 1, 0)413 #define PDM_DRVINS_VERSION PDM_VERSION_MAKE(0xf0fe, 2, 0) 412 414 413 415 /** Converts a pointer to the PDMDRVINS::IBase to a pointer to PDMDRVINS. */ -
trunk/include/VBox/vmm/pdmusb.h
r40416 r40907 694 694 uint32_t u32Version; 695 695 /** USB device instance number. */ 696 RTUINTiInstance;696 uint32_t iInstance; 697 697 /** The base interface of the device. 698 698 * The device constructor initializes this if it has any device level … … 731 731 /** Tracing indicator. */ 732 732 uint32_t fTracing; 733 /** The tracing ID of this device. */ 734 uint32_t idTracing; 735 733 736 /** Padding to make achInstanceData aligned at 32 byte boundary. */ 734 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 4 : 1]; 737 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 3 : 4]; 738 735 739 /** Device instance data. The size of this area is defined 736 740 * in the PDMUSBREG::cbInstanceData field. */ … … 739 743 740 744 /** Current USBINS version number. */ 741 #define PDM_USBINS_VERSION PDM_VERSION_MAKE(0xeefd, 1, 0)745 #define PDM_USBINS_VERSION PDM_VERSION_MAKE(0xeefd, 2, 0) 742 746 743 747 /**
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