VirtualBox

Changeset 40907 in vbox for trunk/src/VBox/Devices


Ignore:
Timestamp:
Apr 13, 2012 8:50:14 PM (13 years ago)
Author:
vboxsync
Message:

Working on tracking IRQs for tracing and logging purposes.

Location:
trunk/src/VBox/Devices
Files:
8 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/Bus/DevPCI.cpp

    r40282 r40907  
    214214RT_C_DECLS_BEGIN
    215215
    216 PDMBOTHCBDECL(void) pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel);
    217 PDMBOTHCBDECL(void) pcibridgeSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel);
     216PDMBOTHCBDECL(void) pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTag);
     217PDMBOTHCBDECL(void) pcibridgeSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTag);
    218218PDMBOTHCBDECL(int)  pciIOPortAddressWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
    219219PDMBOTHCBDECL(int)  pciIOPortAddressRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
     
    601601}
    602602
    603 static void apic_set_irq(PPCIBUS pBus, uint8_t uDevFn, PCIDevice *pPciDev, int irq_num1, int iLevel, int acpi_irq)
     603static void apic_set_irq(PPCIBUS pBus, uint8_t uDevFn, PCIDevice *pPciDev, int irq_num1, int iLevel, int acpi_irq, uint32_t uTagSrc)
    604604{
    605605    /* This is only allowed to be called with a pointer to the host bus. */
     
    620620        Log3(("apic_set_irq: %s: irq_num1=%d level=%d apic_irq=%d apic_level=%d irq_num1=%d\n",
    621621              R3STRING(pPciDev->name), irq_num1, iLevel, apic_irq, apic_level, irq_num));
    622         pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), apic_irq, apic_level);
     622        pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), apic_irq, apic_level, uTagSrc);
    623623
    624624        if ((iLevel & PDM_IRQ_LEVEL_FLIP_FLOP) == PDM_IRQ_LEVEL_FLIP_FLOP) {
     
    628628            Log3(("apic_set_irq: %s: irq_num1=%d level=%d apic_irq=%d apic_level=%d irq_num1=%d (flop)\n",
    629629                  R3STRING(pPciDev->name), irq_num1, iLevel, apic_irq, apic_level, irq_num));
    630             pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), apic_irq, apic_level);
     630            pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), apic_irq, apic_level, uTagSrc);
    631631        }
    632632    } else {
    633633        Log3(("apic_set_irq: %s: irq_num1=%d level=%d acpi_irq=%d\n",
    634634              R3STRING(pPciDev->name), irq_num1, iLevel, acpi_irq));
    635         pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), acpi_irq, iLevel);
     635        pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), acpi_irq, iLevel, uTagSrc);
    636636    }
    637637}
     
    650650 * @param   iIrq            IRQ number to set.
    651651 * @param   iLevel          IRQ level.
     652 * @param   uTagSrc         The IRQ tag and source ID (for tracing).
    652653 * @remark  uDevFn and pPciDev->devfn are not the same if the device is behind a bridge.
    653654 *          In that case uDevFn will be the slot of the bridge which is needed to calculate the
    654655 *          PIRQ value.
    655656 */
    656 static void pciSetIrqInternal(PPCIGLOBALS pGlobals, uint8_t uDevFn, PPCIDEVICE pPciDev, int iIrq, int iLevel)
     657static void pciSetIrqInternal(PPCIGLOBALS pGlobals, uint8_t uDevFn, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc)
    657658{
    658659    PPCIBUS     pBus =     &pGlobals->PciBus;
     
    682683                 * PCI device configuration space).
    683684                 */
    684                 apic_set_irq(pBus, uDevFn, pPciDev, -1, iLevel, pPciDev->config[PCI_INTERRUPT_LINE]);
     685                apic_set_irq(pBus, uDevFn, pPciDev, -1, iLevel, pPciDev->config[PCI_INTERRUPT_LINE], uTagSrc);
    685686            else
    686                 apic_set_irq(pBus, uDevFn, pPciDev, iIrq, iLevel, -1);
     687                apic_set_irq(pBus, uDevFn, pPciDev, iIrq, iLevel, -1, uTagSrc);
    687688            return;
    688689        }
     
    732733            pic_level |= pGlobals->acpi_irq_level;
    733734
    734         Log3(("pciSetIrq: %s: iLevel=%d iIrq=%d pic_irq=%d pic_level=%d\n",
    735               R3STRING(pPciDev->name), iLevel, iIrq, pic_irq, pic_level));
    736         pBus->CTX_SUFF(pPciHlp)->pfnIsaSetIrq(pBus->CTX_SUFF(pDevIns), pic_irq, pic_level);
     735        Log3(("pciSetIrq: %s: iLevel=%d iIrq=%d pic_irq=%d pic_level=%d uTagSrc=%#x\n",
     736              R3STRING(pPciDev->name), iLevel, iIrq, pic_irq, pic_level, uTagSrc));
     737        pBus->CTX_SUFF(pPciHlp)->pfnIsaSetIrq(pBus->CTX_SUFF(pDevIns), pic_irq, pic_level, uTagSrc);
    737738
    738739        /** @todo optimize pci irq flip-flop some rainy day. */
    739740        if ((iLevel & PDM_IRQ_LEVEL_FLIP_FLOP) == PDM_IRQ_LEVEL_FLIP_FLOP)
    740             pciSetIrqInternal(pGlobals, uDevFn, pPciDev, iIrq, PDM_IRQ_LEVEL_LOW);
     741            pciSetIrqInternal(pGlobals, uDevFn, pPciDev, iIrq, PDM_IRQ_LEVEL_LOW, uTagSrc);
    741742    }
    742743}
     
    749750 * @param   iIrq            IRQ number to set.
    750751 * @param   iLevel          IRQ level.
    751  */
    752 PDMBOTHCBDECL(void) pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel)
    753 {
    754     pciSetIrqInternal(PDMINS_2_DATA(pDevIns, PPCIGLOBALS), pPciDev->devfn, pPciDev, iIrq, iLevel);
     752 * @param   uTagSrc         The IRQ tag and source ID (for tracing).
     753 */
     754PDMBOTHCBDECL(void) pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc)
     755{
     756    pciSetIrqInternal(PDMINS_2_DATA(pDevIns, PPCIGLOBALS), pPciDev->devfn, pPciDev, iIrq, iLevel, uTagSrc);
    755757}
    756758
     
    22462248 * @param   iIrq            IRQ number to set.
    22472249 * @param   iLevel          IRQ level.
    2248  */
    2249 PDMBOTHCBDECL(void) pcibridgeSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel)
     2250 * @param   uTagSrc         The IRQ tag and source ID (for tracing).
     2251 */
     2252PDMBOTHCBDECL(void) pcibridgeSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc)
    22502253{
    22512254    /*
     
    22732276
    22742277    AssertMsg(pBus->iBus == 0, ("This is not the host pci bus iBus=%d\n", pBus->iBus));
    2275     pciSetIrqInternal(PCIBUS_2_PCIGLOBALS(pBus), uDevFnBridge, pPciDev, iIrqPinBridge, iLevel);
     2278    pciSetIrqInternal(PCIBUS_2_PCIGLOBALS(pBus), uDevFnBridge, pPciDev, iIrqPinBridge, iLevel, uTagSrc);
    22762279}
    22772280
  • trunk/src/VBox/Devices/Bus/DevPciIch9.cpp

    r40282 r40907  
    165165
    166166/* Prototypes */
    167 static void ich9pciSetIrqInternal(PICH9PCIGLOBALS pGlobals, uint8_t uDevFn, PPCIDEVICE pPciDev, int iIrq, int iLevel);
     167static void ich9pciSetIrqInternal(PICH9PCIGLOBALS pGlobals, uint8_t uDevFn, PPCIDEVICE pPciDev,
     168                                  int iIrq, int iLevel, uint32_t uTagSrc);
    168169#ifdef IN_RING3
    169170static void ich9pcibridgeReset(PPDMDEVINS pDevIns);
     
    192193}
    193194
    194 PDMBOTHCBDECL(void) ich9pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel)
    195 {
    196     ich9pciSetIrqInternal(PDMINS_2_DATA(pDevIns, PICH9PCIGLOBALS), pPciDev->devfn, pPciDev, iIrq, iLevel);
    197 }
    198 
    199 PDMBOTHCBDECL(void) ich9pcibridgeSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel)
     195PDMBOTHCBDECL(void) ich9pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc)
     196{
     197    ich9pciSetIrqInternal(PDMINS_2_DATA(pDevIns, PICH9PCIGLOBALS), pPciDev->devfn, pPciDev, iIrq, iLevel, uTagSrc);
     198}
     199
     200PDMBOTHCBDECL(void) ich9pcibridgeSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc)
    200201{
    201202    /*
     
    223224
    224225    AssertMsgReturnVoid(pBus->iBus == 0, ("This is not the host pci bus iBus=%d\n", pBus->iBus));
    225     ich9pciSetIrqInternal(PCIROOTBUS_2_PCIGLOBALS(pBus), uDevFnBridge, pPciDev, iIrqPinBridge, iLevel);
     226    ich9pciSetIrqInternal(PCIROOTBUS_2_PCIGLOBALS(pBus), uDevFnBridge, pPciDev, iIrqPinBridge, iLevel, uTagSrc);
    226227}
    227228
     
    504505}
    505506
    506 static void ich9pciApicSetIrq(PICH9PCIBUS pBus, uint8_t uDevFn, PCIDevice *pPciDev, int irq_num1, int iLevel, int iForcedIrq)
     507static void ich9pciApicSetIrq(PICH9PCIBUS pBus, uint8_t uDevFn, PCIDevice *pPciDev, int irq_num1, int iLevel,
     508                              uint32_t uTagSrc, int iForcedIrq)
    507509{
    508510    /* This is only allowed to be called with a pointer to the root bus. */
     
    522524        apic_irq = irq_num + 0x10;
    523525        apic_level = pGlobals->uaPciApicIrqLevels[irq_num] != 0;
    524         Log3(("ich9pciApicSetIrq: %s: irq_num1=%d level=%d apic_irq=%d apic_level=%d irq_num1=%d\n",
    525               R3STRING(pPciDev->name), irq_num1, iLevel, apic_irq, apic_level, irq_num));
    526         pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), apic_irq, apic_level);
     526        Log3(("ich9pciApicSetIrq: %s: irq_num1=%d level=%d apic_irq=%d apic_level=%d irq_num1=%d uTagSrc=%#x\n",
     527              R3STRING(pPciDev->name), irq_num1, iLevel, apic_irq, apic_level, irq_num, uTagSrc));
     528        pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), apic_irq, apic_level, uTagSrc);
    527529
    528530        if ((iLevel & PDM_IRQ_LEVEL_FLIP_FLOP) == PDM_IRQ_LEVEL_FLIP_FLOP)
     
    535537            pPciDev->Int.s.uIrqPinState = PDM_IRQ_LEVEL_LOW;
    536538            apic_level = pGlobals->uaPciApicIrqLevels[irq_num] != 0;
    537             Log3(("ich9pciApicSetIrq: %s: irq_num1=%d level=%d apic_irq=%d apic_level=%d irq_num1=%d (flop)\n",
    538                   R3STRING(pPciDev->name), irq_num1, iLevel, apic_irq, apic_level, irq_num));
    539             pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), apic_irq, apic_level);
     539            Log3(("ich9pciApicSetIrq: %s: irq_num1=%d level=%d apic_irq=%d apic_level=%d irq_num1=%d uTagSrc=%#x (flop)\n",
     540                  R3STRING(pPciDev->name), irq_num1, iLevel, apic_irq, apic_level, irq_num, uTagSrc));
     541            pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), apic_irq, apic_level, uTagSrc);
    540542        }
    541543    } else {
    542         Log3(("ich9pciApicSetIrq: (forced) %s: irq_num1=%d level=%d acpi_irq=%d\n",
    543               R3STRING(pPciDev->name), irq_num1, iLevel, iForcedIrq));
    544         pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), iForcedIrq, iLevel);
    545     }
    546 }
    547 
    548 static void ich9pciSetIrqInternal(PICH9PCIGLOBALS pGlobals, uint8_t uDevFn, PPCIDEVICE pPciDev, int iIrq, int iLevel)
     544        Log3(("ich9pciApicSetIrq: (forced) %s: irq_num1=%d level=%d acpi_irq=%d uTagSrc=%#x\n",
     545              R3STRING(pPciDev->name), irq_num1, iLevel, iForcedIrq, uTagSrc));
     546        pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), iForcedIrq, iLevel, uTagSrc);
     547    }
     548}
     549
     550static void ich9pciSetIrqInternal(PICH9PCIGLOBALS pGlobals, uint8_t uDevFn, PPCIDEVICE pPciDev,
     551                                  int iIrq, int iLevel, uint32_t uTagSrc)
    549552{
    550553
     
    554557        {
    555558            PPDMDEVINS pDevIns = pGlobals->aPciBus.CTX_SUFF(pDevIns);
    556             MsiNotify(pDevIns, pGlobals->aPciBus.CTX_SUFF(pPciHlp), pPciDev, iIrq, iLevel);
     559            MsiNotify(pDevIns, pGlobals->aPciBus.CTX_SUFF(pPciHlp), pPciDev, iIrq, iLevel, uTagSrc);
    557560        }
    558561
     
    560563        {
    561564            PPDMDEVINS pDevIns = pGlobals->aPciBus.CTX_SUFF(pDevIns);
    562             MsixNotify(pDevIns, pGlobals->aPciBus.CTX_SUFF(pPciHlp), pPciDev, iIrq, iLevel);
     565            MsixNotify(pDevIns, pGlobals->aPciBus.CTX_SUFF(pPciHlp), pPciDev, iIrq, iLevel, uTagSrc);
    563566        }
    564567        return;
     
    582585             * PCI device configuration space).
    583586             */
    584             ich9pciApicSetIrq(pBus, uDevFn, pPciDev, -1, iLevel, PCIDevGetInterruptLine(pPciDev));
     587            ich9pciApicSetIrq(pBus, uDevFn, pPciDev, -1, iLevel, uTagSrc, PCIDevGetInterruptLine(pPciDev));
    585588        else
    586             ich9pciApicSetIrq(pBus, uDevFn, pPciDev, iIrq, iLevel, -1);
     589            ich9pciApicSetIrq(pBus, uDevFn, pPciDev, iIrq, iLevel, uTagSrc, -1);
    587590    }
    588591}
  • trunk/src/VBox/Devices/Bus/MsiCommon.cpp

    r36663 r40907  
    103103
    104104#ifdef IN_RING3
    105 void     MsiPciConfigWrite(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, uint32_t u32Address, uint32_t val, unsigned len)
     105void     MsiPciConfigWrite(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev,
     106                           uint32_t u32Address, uint32_t val, unsigned len)
    106107{
    107108    int32_t iOff = u32Address - pDev->Int.s.u8MsiCapOffset;
     
    169170                                {
    170171                                    Log(("msi: notify earlier masked pending vector: %d\n", uVector));
    171                                     MsiNotify(pDevIns, pPciHlp, pDev, uVector, PDM_IRQ_LEVEL_HIGH);
     172                                    MsiNotify(pDevIns, pPciHlp, pDev, uVector, PDM_IRQ_LEVEL_HIGH, 0 /*uTagSrc*/);
    172173                                }
    173174                            }
     
    271272}
    272273
    273 void MsiNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel)
     274void MsiNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel, uint32_t uTagSrc)
    274275{
    275276    AssertMsg(msiIsEnabled(pDev), ("Must be enabled to use that"));
     
    304305
    305306    Assert(pPciHlp->pfnIoApicSendMsi != NULL);
    306     pPciHlp->pfnIoApicSendMsi(pDevIns, GCAddr, u32Value);
    307 }
     307    pPciHlp->pfnIoApicSendMsi(pDevIns, GCAddr, u32Value, uTagSrc);
     308}
  • trunk/src/VBox/Devices/Bus/MsiCommon.h

    r36663 r40907  
    3737
    3838/* Device notification (aka interrupt). */
    39 void     MsiNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel);
     39void     MsiNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel, uint32_t uTagSrc);
    4040
    4141#ifdef IN_RING3
     
    5454
    5555/* Device notification (aka interrupt). */
    56 void     MsixNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel);
     56void     MsixNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel, uint32_t uTagSrc);
    5757
    5858#ifdef IN_RING3
  • trunk/src/VBox/Devices/Bus/MsixCommon.cpp

    r39135 r40907  
    109109{
    110110    if (msixIsPending(pDev, iVector) && !msixIsVectorMasked(pDev, iVector))
    111         MsixNotify(pDevIns, pPciHlp, pDev, iVector, 1 /* iLevel */);
     111        MsixNotify(pDevIns, pPciHlp, pDev, iVector, 1 /* iLevel */, 0 /*uTagSrc*/);
    112112}
    113113
     
    239239}
    240240
    241 void MsixNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel)
     241void MsixNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel, uint32_t uTagSrc)
    242242{
    243243    AssertMsg(msixIsEnabled(pDev), ("Must be enabled to use that"));
     
    265265    uint32_t   u32Value = msixGetMsiData(pDev, iVector);
    266266
    267     pPciHlp->pfnIoApicSendMsi(pDevIns, GCAddr, u32Value);
     267    pPciHlp->pfnIoApicSendMsi(pDevIns, GCAddr, u32Value, uTagSrc);
    268268}
    269269
  • trunk/src/VBox/Devices/PC/DevAPIC.cpp

    r40280 r40907  
    5555#include "VBoxDD2.h"
    5656#include "DevApic.h"
     57
    5758
    5859/*******************************************************************************
     
    338339    /** Timer description timer. */
    339340    R3PTRTYPE(char *)       pszDesc;
     341
     342    /** The IRQ tags and source IDs for each (tracing purposes). */
     343    uint32_t                auTags[256];
     344
    340345# ifdef VBOX_WITH_STATISTICS
    341346#  if HC_ARCH_BITS == 32
     
    436441
    437442static void apic_init_ipi(APICDeviceInfo* pDev, APICState *s);
    438 static void apic_set_irq(APICDeviceInfo* pDev, APICState *s, int vector_num, int trigger_mode);
     443static void apic_set_irq(APICDeviceInfo* pDev, APICState *s, int vector_num, int trigger_mode, uint32_t uTagSrc);
    439444static bool apic_update_irq(APICDeviceInfo* pDev, APICState *s);
    440445
     
    530535                            PCVMCPUSET pDstSet, uint8_t delivery_mode,
    531536                            uint8_t vector_num, uint8_t polarity,
    532                             uint8_t trigger_mode)
    533 {
    534     LogFlow(("apic_bus_deliver mask=%R[vmcpuset] mode=%x vector=%x polarity=%x trigger_mode=%x\n",
    535              pDstSet, delivery_mode, vector_num, polarity, trigger_mode));
     537                            uint8_t trigger_mode, uint32_t uTagSrc)
     538{
     539    LogFlow(("apic_bus_deliver mask=%R[vmcpuset] mode=%x vector=%x polarity=%x trigger_mode=%x uTagSrc=%#x\n",
     540             pDstSet, delivery_mode, vector_num, polarity, trigger_mode, uTagSrc));
    536541
    537542    switch (delivery_mode)
     
    543548            {
    544549                APICState *pApic = getLapicById(pDev, idDstCpu);
    545                 apic_set_irq(pDev, pApic, vector_num, trigger_mode);
     550                apic_set_irq(pDev, pApic, vector_num, trigger_mode, uTagSrc);
    546551            }
    547552            return VINF_SUCCESS;
     
    585590
    586591    APIC_FOREACH_IN_SET_BEGIN(pDev, pDstSet);
    587         apic_set_irq(pDev, pCurApic, vector_num, trigger_mode);
     592        apic_set_irq(pDev, pCurApic, vector_num, trigger_mode, uTagSrc);
    588593    APIC_FOREACH_END();
    589594    return VINF_SUCCESS;
     
    830835                                      vector,
    831836                                      0 /* Polarity - conform to the bus */,
    832                                       0 /* Trigger mode - edge */);
     837                                      0 /* Trigger mode - edge */,
     838                                      0 /*uTagSrc*/);
    833839                APIC_UNLOCK(pDev);
    834840                break;
     
    10771083PDMBOTHCBDECL(int) apicBusDeliverCallback(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode,
    10781084                                          uint8_t u8DeliveryMode, uint8_t iVector, uint8_t u8Polarity,
    1079                                           uint8_t u8TriggerMode)
     1085                                          uint8_t u8TriggerMode, uint32_t uTagSrc)
    10801086{
    10811087    APICDeviceInfo *pDev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *);
    10821088    Assert(PDMCritSectIsOwner(pDev->CTX_SUFF(pCritSect)));
    1083     LogFlow(("apicBusDeliverCallback: pDevIns=%p u8Dest=%#x u8DestMode=%#x u8DeliveryMode=%#x iVector=%#x u8Polarity=%#x u8TriggerMode=%#x\n",
    1084              pDevIns, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode));
     1089    LogFlow(("apicBusDeliverCallback: pDevIns=%p u8Dest=%#x u8DestMode=%#x u8DeliveryMode=%#x iVector=%#x u8Polarity=%#x u8TriggerMode=%#x uTagSrc=%#x\n",
     1090             pDevIns, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode, uTagSrc));
    10851091    VMCPUSET DstSet;
    10861092    return apic_bus_deliver(pDev, apic_get_delivery_bitmask(pDev, u8Dest, u8DestMode, &DstSet),
    1087                             u8DeliveryMode, iVector, u8Polarity, u8TriggerMode);
     1093                            u8DeliveryMode, iVector, u8Polarity, u8TriggerMode, uTagSrc);
    10881094}
    10891095
     
    12691275}
    12701276
    1271 static void apic_set_irq(APICDeviceInfo *pDev,  APICState* s, int vector_num, int trigger_mode)
    1272 {
    1273     LogFlow(("CPU%d: apic_set_irq vector=%x, trigger_mode=%x\n", s->phys_id, vector_num, trigger_mode));
     1277static void apic_set_irq(APICDeviceInfo *pDev,  APICState* s, int vector_num, int trigger_mode, uint32_t uTagSrc)
     1278{
     1279    LogFlow(("CPU%d: apic_set_irq vector=%x trigger_mode=%x uTagSrc=%#x\n", s->phys_id, vector_num, trigger_mode, uTagSrc));
     1280
    12741281    Apic256BitReg_SetBit(&s->irr, vector_num);
    12751282    if (trigger_mode)
     
    12771284    else
    12781285        Apic256BitReg_ClearBit(&s->tmr, vector_num);
     1286
     1287    if (!s->auTags[vector_num])
     1288        s->auTags[vector_num] = uTagSrc;
     1289    else
     1290        s->auTags[vector_num] |= RT_BIT_32(31);
     1291
    12791292    apic_update_irq(pDev, s);
    12801293}
     
    13681381{
    13691382    int dest_shorthand = (s->icr[0] >> 18) & 3;
    1370     LogFlow(("apic_deliver dest=%x dest_mode=%x dest_shorthand=%x delivery_mode=%x vector_num=%x polarity=%x trigger_mode=%x\n", dest, dest_mode, dest_shorthand, delivery_mode, vector_num, polarity, trigger_mode));
     1383    LogFlow(("apic_deliver dest=%x dest_mode=%x dest_shorthand=%x delivery_mode=%x vector_num=%x polarity=%x trigger_mode=%x uTagSrc=%#x\n", dest, dest_mode, dest_shorthand, delivery_mode, vector_num, polarity, trigger_mode));
    13711384
    13721385    VMCPUSET DstSet;
     
    14201433
    14211434    return apic_bus_deliver(pDev, &DstSet, delivery_mode, vector_num,
    1422                             polarity, trigger_mode);
    1423 }
    1424 
    1425 
    1426 PDMBOTHCBDECL(int) apicGetInterrupt(PPDMDEVINS pDevIns)
     1435                            polarity, trigger_mode, 0 /* uTagSrc*/);
     1436}
     1437
     1438
     1439PDMBOTHCBDECL(int) apicGetInterrupt(PPDMDEVINS pDevIns, uint32_t *puTagSrc)
    14271440{
    14281441    APICDeviceInfo *pDev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *);
     
    14551468    if (s->tpr && (uint32_t)intno <= s->tpr)
    14561469    {
     1470        *puTagSrc = 0;
    14571471        Log(("apic_get_interrupt: returns %d (sp)\n", s->spurious_vec & 0xff));
    14581472        return s->spurious_vec & 0xff;
    14591473    }
     1474
    14601475    Apic256BitReg_ClearBit(&s->irr, intno);
    14611476    Apic256BitReg_SetBit(&s->isr, intno);
     1477
     1478    *puTagSrc = s->auTags[intno];
     1479    s->auTags[intno] = 0;
     1480
    14621481    apic_update_irq(pDev, s);
    1463     LogFlow(("CPU%d: apic_get_interrupt: returns %d\n", s->phys_id, intno));
     1482
     1483    LogFlow(("CPU%d: apic_get_interrupt: returns %d / %#x\n", s->phys_id, intno, *puTagSrc));
    14641484    return intno;
    14651485}
     
    16791699    if (!(pApic->lvt[APIC_LVT_TIMER] & APIC_LVT_MASKED)) {
    16801700        LogFlow(("apic_timer: trigger irq\n"));
    1681         apic_set_irq(pDev, pApic, pApic->lvt[APIC_LVT_TIMER] & 0xff, APIC_TRIGGER_EDGE);
     1701        apic_set_irq(pDev, pApic, pApic->lvt[APIC_LVT_TIMER] & 0xff, APIC_TRIGGER_EDGE, 0 /*uTagSrc*/);
    16821702
    16831703        if (   (pApic->lvt[APIC_LVT_TIMER] & APIC_LVT_TIMER_PERIODIC)
  • trunk/src/VBox/Devices/PC/DevIoApic.cpp

    r40280 r40907  
    8787    uint32_t                irr;
    8888    uint64_t                ioredtbl[IOAPIC_NUM_PINS];
     89    /** The IRQ tags and source IDs for each pin (tracing purposes). */
     90    uint32_t                auTagSrc[IOAPIC_NUM_PINS];
    8991
    9092    /** The device instance - R3 Ptr. */
     
    157159                else
    158160                    vector = entry & 0xff;
     161                uint32_t uTagSrc = pThis->auTagSrc[vector];
     162                pThis->auTagSrc[vector] = 0;
    159163
    160164                int rc = pThis->CTX_SUFF(pIoApicHlp)->pfnApicBusDeliver(pThis->CTX_SUFF(pDevIns),
     
    164168                                                                        vector,
    165169                                                                        polarity,
    166                                                                         trig_mode);
     170                                                                        trig_mode,
     171                                                                        uTagSrc);
    167172                /* We must be sure that attempts to reschedule in R3
    168173                   never get here */
     
    174179
    175180
    176 static void ioapic_set_irq(void *opaque, int vector, int level)
     181static void ioapic_set_irq(void *opaque, int vector, int level, uint32_t uTagSrc)
    177182{
    178183    IOAPICState *pThis = (IOAPICState*)opaque;
     
    189194            {
    190195                pThis->irr |= mask;
     196                if (!pThis->auTagSrc[vector])
     197                    pThis->auTagSrc[vector] = uTagSrc;
     198                else
     199                    pThis->auTagSrc[vector] = RT_BIT_32(31);
     200
    191201                ioapic_service(pThis);
     202
    192203                if ((level & PDM_IRQ_LEVEL_FLIP_FLOP) == PDM_IRQ_LEVEL_FLIP_FLOP)
    193204                    pThis->irr &= ~mask;
     
    202213            {
    203214                pThis->irr |= mask;
     215                if (!pThis->auTagSrc[vector])
     216                    pThis->auTagSrc[vector] = uTagSrc;
     217                else
     218                    pThis->auTagSrc[vector] = RT_BIT_32(31);
     219
    204220                ioapic_service(pThis);
    205221            }
     
    372388}
    373389
    374 PDMBOTHCBDECL(void) ioapicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
     390PDMBOTHCBDECL(void) ioapicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)
    375391{
    376392    /* PDM lock is taken here; */ /** @todo add assertion */
    377393    IOAPICState *pThis = PDMINS_2_DATA(pDevIns, IOAPICState *);
    378394    STAM_COUNTER_INC(&pThis->CTXSUFF(StatSetIrq));
    379     LogFlow(("ioapicSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
    380     ioapic_set_irq(pThis, iIrq, iLevel);
    381 }
    382 
    383 PDMBOTHCBDECL(void) ioapicSendMsi(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue)
     395    LogFlow(("ioapicSetIrq: iIrq=%d iLevel=%d uTagSrc=%#x\n", iIrq, iLevel, uTagSrc));
     396    ioapic_set_irq(pThis, iIrq, iLevel, uTagSrc);
     397}
     398
     399PDMBOTHCBDECL(void) ioapicSendMsi(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc)
    384400{
    385401    IOAPICState *pThis = PDMINS_2_DATA(pDevIns, IOAPICState *);
     
    406422                                                            vector_num,
    407423                                                            0 /* polarity, n/a */,
    408                                                             trigger_mode);
     424                                                            trigger_mode,
     425                                                            uTagSrc);
    409426    /* We must be sure that attempts to reschedule in R3
    410427       never get here */
  • trunk/src/VBox/Devices/PC/DevPIC.cpp

    r40280 r40907  
    5151RT_C_DECLS_BEGIN
    5252
    53 PDMBOTHCBDECL(void) picSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
    54 PDMBOTHCBDECL(int) picGetInterrupt(PPDMDEVINS pDevIns);
     53PDMBOTHCBDECL(void) picSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc);
     54PDMBOTHCBDECL(int) picGetInterrupt(PPDMDEVINS pDevIns, uint32_t *puTagSrc);
    5555PDMBOTHCBDECL(int) picIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
    5656PDMBOTHCBDECL(int) picIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
     
    109109    uint8_t elcr_mask;
    110110    /** Pointer to the device instance, R3 Ptr. */
    111     PPDMDEVINSR3 pDevInsR3;
     111    PPDMDEVINSR3    pDevInsR3;
    112112    /** Pointer to the device instance, R0 Ptr. */
    113     PPDMDEVINSR0 pDevInsR0;
     113    PPDMDEVINSR0    pDevInsR0;
    114114    /** Pointer to the device instance, RC Ptr. */
    115     PPDMDEVINSRC pDevInsRC;
    116     RTRCPTR      Alignment0; /**< Structure size alignment. */
     115    PPDMDEVINSRC    pDevInsRC;
     116    RTRCPTR         Alignment0; /**< Structure size alignment. */
     117    /** The IRQ tags and source IDs for each (tracing purposes). */
     118    uint32_t        auTags[8];
     119
    117120} PicState;
    118121
     
    164167
    165168/* set irq level. If an edge is detected, then the IRR is set to 1 */
    166 static inline void pic_set_irq1(PicState *s, int irq, int level)
     169static inline void pic_set_irq1(PicState *s, int irq, int level, uint32_t uTagSrc)
    167170{
    168171    int mask;
     
    194197        }
    195198    }
     199
     200    /* Save the tag. */
     201    if (level)
     202    {
     203        if (!s->auTags[irq])
     204            s->auTags[irq] = uTagSrc;
     205        else
     206            s->auTags[irq] |= RT_BIT_32(31);
     207    }
     208
    196209    DumpPICState(s, "pic_set_irq1");
    197210}
     
    251264    if (irq2 >= 0) {
    252265        /* if irq request by slave pic, signal master PIC */
    253         pic_set_irq1(&pics[0], 2, 1);
     266        pic_set_irq1(&pics[0], 2, 1, pics[1].auTags[irq2]);
    254267    } else {
    255268        /* If not, clear the IR on the master PIC. */
    256         pic_set_irq1(&pics[0], 2, 0);
     269        pic_set_irq1(&pics[0], 2, 0, 0 /*uTagSrc*/);
    257270    }
    258271    /* look at requested irq */
     
    352365 * @param   iIrq            IRQ number to set.
    353366 * @param   iLevel          IRQ level.
    354  */
    355 PDMBOTHCBDECL(void) picSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
     367 * @param   uTagSrc         The IRQ tag and source ID (for tracing).
     368 */
     369PDMBOTHCBDECL(void) picSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)
    356370{
    357371    PDEVPIC     pThis = PDMINS_2_DATA(pDevIns, PDEVPIC);
     
    371385         * line must be held high for a while to avoid spurious interrupts.
    372386         */
    373         pic_set_irq1(&pThis->aPics[iIrq >> 3], iIrq & 7, 0);
     387        pic_set_irq1(&pThis->aPics[iIrq >> 3], iIrq & 7, 0, uTagSrc);
    374388        pic_update_irq(pThis);
    375389    }
    376     pic_set_irq1(&pThis->aPics[iIrq >> 3], iIrq & 7, iLevel & PDM_IRQ_LEVEL_HIGH);
     390    pic_set_irq1(&pThis->aPics[iIrq >> 3], iIrq & 7, iLevel & PDM_IRQ_LEVEL_HIGH, uTagSrc);
    377391    pic_update_irq(pThis);
    378392}
     
    402416 * @returns Pending interrupt number.
    403417 * @param   pDevIns         Device instance of the PICs.
    404  */
    405 PDMBOTHCBDECL(int) picGetInterrupt(PPDMDEVINS pDevIns)
     418 * @param   puTagSrc        Where to return the IRQ tag and source ID.
     419 */
     420PDMBOTHCBDECL(int) picGetInterrupt(PPDMDEVINS pDevIns, uint32_t *puTagSrc)
    406421{
    407422    PDEVPIC     pThis = PDMINS_2_DATA(pDevIns, PDEVPIC);
     
    431446            }
    432447            intno = pThis->aPics[1].irq_base + irq2;
    433             Log2(("picGetInterrupt1: %x base=%x irq=%x\n", intno, pThis->aPics[1].irq_base, irq2));
     448            *puTagSrc = pThis->aPics[0].auTags[irq2];
     449            pThis->aPics[0].auTags[irq2] = 0;
     450            Log2(("picGetInterrupt1: %x base=%x irq=%x uTagSrc=%#x\n", intno, pThis->aPics[1].irq_base, irq2, *puTagSrc));
    434451            irq = irq2 + 8;
    435452        }
    436         else {
     453        else
     454        {
    437455            intno = pThis->aPics[0].irq_base + irq;
    438             Log2(("picGetInterrupt0: %x base=%x irq=%x\n", intno, pThis->aPics[0].irq_base, irq));
     456            *puTagSrc = pThis->aPics[0].auTags[irq];
     457            pThis->aPics[0].auTags[irq] = 0;
     458            Log2(("picGetInterrupt0: %x base=%x irq=%x uTagSrc=%#x\n", intno, pThis->aPics[0].irq_base, irq, *puTagSrc));
    439459        }
    440460    }
     
    445465        irq = 7;
    446466        intno = pThis->aPics[0].irq_base + irq;
     467        *puTagSrc = 0;
    447468    }
    448469    pic_update_irq(pThis);
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