Changeset 40907 in vbox for trunk/src/VBox/Devices/Bus
- Timestamp:
- Apr 13, 2012 8:50:14 PM (13 years ago)
- svn:sync-xref-src-repo-rev:
- 77458
- Location:
- trunk/src/VBox/Devices/Bus
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Bus/DevPCI.cpp
r40282 r40907 214 214 RT_C_DECLS_BEGIN 215 215 216 PDMBOTHCBDECL(void) pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel );217 PDMBOTHCBDECL(void) pcibridgeSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel );216 PDMBOTHCBDECL(void) pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTag); 217 PDMBOTHCBDECL(void) pcibridgeSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTag); 218 218 PDMBOTHCBDECL(int) pciIOPortAddressWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb); 219 219 PDMBOTHCBDECL(int) pciIOPortAddressRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb); … … 601 601 } 602 602 603 static void apic_set_irq(PPCIBUS pBus, uint8_t uDevFn, PCIDevice *pPciDev, int irq_num1, int iLevel, int acpi_irq )603 static void apic_set_irq(PPCIBUS pBus, uint8_t uDevFn, PCIDevice *pPciDev, int irq_num1, int iLevel, int acpi_irq, uint32_t uTagSrc) 604 604 { 605 605 /* This is only allowed to be called with a pointer to the host bus. */ … … 620 620 Log3(("apic_set_irq: %s: irq_num1=%d level=%d apic_irq=%d apic_level=%d irq_num1=%d\n", 621 621 R3STRING(pPciDev->name), irq_num1, iLevel, apic_irq, apic_level, irq_num)); 622 pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), apic_irq, apic_level );622 pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), apic_irq, apic_level, uTagSrc); 623 623 624 624 if ((iLevel & PDM_IRQ_LEVEL_FLIP_FLOP) == PDM_IRQ_LEVEL_FLIP_FLOP) { … … 628 628 Log3(("apic_set_irq: %s: irq_num1=%d level=%d apic_irq=%d apic_level=%d irq_num1=%d (flop)\n", 629 629 R3STRING(pPciDev->name), irq_num1, iLevel, apic_irq, apic_level, irq_num)); 630 pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), apic_irq, apic_level );630 pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), apic_irq, apic_level, uTagSrc); 631 631 } 632 632 } else { 633 633 Log3(("apic_set_irq: %s: irq_num1=%d level=%d acpi_irq=%d\n", 634 634 R3STRING(pPciDev->name), irq_num1, iLevel, acpi_irq)); 635 pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), acpi_irq, iLevel );635 pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), acpi_irq, iLevel, uTagSrc); 636 636 } 637 637 } … … 650 650 * @param iIrq IRQ number to set. 651 651 * @param iLevel IRQ level. 652 * @param uTagSrc The IRQ tag and source ID (for tracing). 652 653 * @remark uDevFn and pPciDev->devfn are not the same if the device is behind a bridge. 653 654 * In that case uDevFn will be the slot of the bridge which is needed to calculate the 654 655 * PIRQ value. 655 656 */ 656 static void pciSetIrqInternal(PPCIGLOBALS pGlobals, uint8_t uDevFn, PPCIDEVICE pPciDev, int iIrq, int iLevel )657 static void pciSetIrqInternal(PPCIGLOBALS pGlobals, uint8_t uDevFn, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc) 657 658 { 658 659 PPCIBUS pBus = &pGlobals->PciBus; … … 682 683 * PCI device configuration space). 683 684 */ 684 apic_set_irq(pBus, uDevFn, pPciDev, -1, iLevel, pPciDev->config[PCI_INTERRUPT_LINE] );685 apic_set_irq(pBus, uDevFn, pPciDev, -1, iLevel, pPciDev->config[PCI_INTERRUPT_LINE], uTagSrc); 685 686 else 686 apic_set_irq(pBus, uDevFn, pPciDev, iIrq, iLevel, -1 );687 apic_set_irq(pBus, uDevFn, pPciDev, iIrq, iLevel, -1, uTagSrc); 687 688 return; 688 689 } … … 732 733 pic_level |= pGlobals->acpi_irq_level; 733 734 734 Log3(("pciSetIrq: %s: iLevel=%d iIrq=%d pic_irq=%d pic_level=%d \n",735 R3STRING(pPciDev->name), iLevel, iIrq, pic_irq, pic_level ));736 pBus->CTX_SUFF(pPciHlp)->pfnIsaSetIrq(pBus->CTX_SUFF(pDevIns), pic_irq, pic_level );735 Log3(("pciSetIrq: %s: iLevel=%d iIrq=%d pic_irq=%d pic_level=%d uTagSrc=%#x\n", 736 R3STRING(pPciDev->name), iLevel, iIrq, pic_irq, pic_level, uTagSrc)); 737 pBus->CTX_SUFF(pPciHlp)->pfnIsaSetIrq(pBus->CTX_SUFF(pDevIns), pic_irq, pic_level, uTagSrc); 737 738 738 739 /** @todo optimize pci irq flip-flop some rainy day. */ 739 740 if ((iLevel & PDM_IRQ_LEVEL_FLIP_FLOP) == PDM_IRQ_LEVEL_FLIP_FLOP) 740 pciSetIrqInternal(pGlobals, uDevFn, pPciDev, iIrq, PDM_IRQ_LEVEL_LOW );741 pciSetIrqInternal(pGlobals, uDevFn, pPciDev, iIrq, PDM_IRQ_LEVEL_LOW, uTagSrc); 741 742 } 742 743 } … … 749 750 * @param iIrq IRQ number to set. 750 751 * @param iLevel IRQ level. 751 */ 752 PDMBOTHCBDECL(void) pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel) 753 { 754 pciSetIrqInternal(PDMINS_2_DATA(pDevIns, PPCIGLOBALS), pPciDev->devfn, pPciDev, iIrq, iLevel); 752 * @param uTagSrc The IRQ tag and source ID (for tracing). 753 */ 754 PDMBOTHCBDECL(void) pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc) 755 { 756 pciSetIrqInternal(PDMINS_2_DATA(pDevIns, PPCIGLOBALS), pPciDev->devfn, pPciDev, iIrq, iLevel, uTagSrc); 755 757 } 756 758 … … 2246 2248 * @param iIrq IRQ number to set. 2247 2249 * @param iLevel IRQ level. 2248 */ 2249 PDMBOTHCBDECL(void) pcibridgeSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel) 2250 * @param uTagSrc The IRQ tag and source ID (for tracing). 2251 */ 2252 PDMBOTHCBDECL(void) pcibridgeSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc) 2250 2253 { 2251 2254 /* … … 2273 2276 2274 2277 AssertMsg(pBus->iBus == 0, ("This is not the host pci bus iBus=%d\n", pBus->iBus)); 2275 pciSetIrqInternal(PCIBUS_2_PCIGLOBALS(pBus), uDevFnBridge, pPciDev, iIrqPinBridge, iLevel );2278 pciSetIrqInternal(PCIBUS_2_PCIGLOBALS(pBus), uDevFnBridge, pPciDev, iIrqPinBridge, iLevel, uTagSrc); 2276 2279 } 2277 2280 -
trunk/src/VBox/Devices/Bus/DevPciIch9.cpp
r40282 r40907 165 165 166 166 /* Prototypes */ 167 static void ich9pciSetIrqInternal(PICH9PCIGLOBALS pGlobals, uint8_t uDevFn, PPCIDEVICE pPciDev, int iIrq, int iLevel); 167 static void ich9pciSetIrqInternal(PICH9PCIGLOBALS pGlobals, uint8_t uDevFn, PPCIDEVICE pPciDev, 168 int iIrq, int iLevel, uint32_t uTagSrc); 168 169 #ifdef IN_RING3 169 170 static void ich9pcibridgeReset(PPDMDEVINS pDevIns); … … 192 193 } 193 194 194 PDMBOTHCBDECL(void) ich9pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel )195 { 196 ich9pciSetIrqInternal(PDMINS_2_DATA(pDevIns, PICH9PCIGLOBALS), pPciDev->devfn, pPciDev, iIrq, iLevel );197 } 198 199 PDMBOTHCBDECL(void) ich9pcibridgeSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel )195 PDMBOTHCBDECL(void) ich9pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc) 196 { 197 ich9pciSetIrqInternal(PDMINS_2_DATA(pDevIns, PICH9PCIGLOBALS), pPciDev->devfn, pPciDev, iIrq, iLevel, uTagSrc); 198 } 199 200 PDMBOTHCBDECL(void) ich9pcibridgeSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc) 200 201 { 201 202 /* … … 223 224 224 225 AssertMsgReturnVoid(pBus->iBus == 0, ("This is not the host pci bus iBus=%d\n", pBus->iBus)); 225 ich9pciSetIrqInternal(PCIROOTBUS_2_PCIGLOBALS(pBus), uDevFnBridge, pPciDev, iIrqPinBridge, iLevel );226 ich9pciSetIrqInternal(PCIROOTBUS_2_PCIGLOBALS(pBus), uDevFnBridge, pPciDev, iIrqPinBridge, iLevel, uTagSrc); 226 227 } 227 228 … … 504 505 } 505 506 506 static void ich9pciApicSetIrq(PICH9PCIBUS pBus, uint8_t uDevFn, PCIDevice *pPciDev, int irq_num1, int iLevel, int iForcedIrq) 507 static void ich9pciApicSetIrq(PICH9PCIBUS pBus, uint8_t uDevFn, PCIDevice *pPciDev, int irq_num1, int iLevel, 508 uint32_t uTagSrc, int iForcedIrq) 507 509 { 508 510 /* This is only allowed to be called with a pointer to the root bus. */ … … 522 524 apic_irq = irq_num + 0x10; 523 525 apic_level = pGlobals->uaPciApicIrqLevels[irq_num] != 0; 524 Log3(("ich9pciApicSetIrq: %s: irq_num1=%d level=%d apic_irq=%d apic_level=%d irq_num1=%d \n",525 R3STRING(pPciDev->name), irq_num1, iLevel, apic_irq, apic_level, irq_num ));526 pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), apic_irq, apic_level );526 Log3(("ich9pciApicSetIrq: %s: irq_num1=%d level=%d apic_irq=%d apic_level=%d irq_num1=%d uTagSrc=%#x\n", 527 R3STRING(pPciDev->name), irq_num1, iLevel, apic_irq, apic_level, irq_num, uTagSrc)); 528 pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), apic_irq, apic_level, uTagSrc); 527 529 528 530 if ((iLevel & PDM_IRQ_LEVEL_FLIP_FLOP) == PDM_IRQ_LEVEL_FLIP_FLOP) … … 535 537 pPciDev->Int.s.uIrqPinState = PDM_IRQ_LEVEL_LOW; 536 538 apic_level = pGlobals->uaPciApicIrqLevels[irq_num] != 0; 537 Log3(("ich9pciApicSetIrq: %s: irq_num1=%d level=%d apic_irq=%d apic_level=%d irq_num1=%d (flop)\n",538 R3STRING(pPciDev->name), irq_num1, iLevel, apic_irq, apic_level, irq_num ));539 pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), apic_irq, apic_level );539 Log3(("ich9pciApicSetIrq: %s: irq_num1=%d level=%d apic_irq=%d apic_level=%d irq_num1=%d uTagSrc=%#x (flop)\n", 540 R3STRING(pPciDev->name), irq_num1, iLevel, apic_irq, apic_level, irq_num, uTagSrc)); 541 pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), apic_irq, apic_level, uTagSrc); 540 542 } 541 543 } else { 542 Log3(("ich9pciApicSetIrq: (forced) %s: irq_num1=%d level=%d acpi_irq=%d\n", 543 R3STRING(pPciDev->name), irq_num1, iLevel, iForcedIrq)); 544 pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), iForcedIrq, iLevel); 545 } 546 } 547 548 static void ich9pciSetIrqInternal(PICH9PCIGLOBALS pGlobals, uint8_t uDevFn, PPCIDEVICE pPciDev, int iIrq, int iLevel) 544 Log3(("ich9pciApicSetIrq: (forced) %s: irq_num1=%d level=%d acpi_irq=%d uTagSrc=%#x\n", 545 R3STRING(pPciDev->name), irq_num1, iLevel, iForcedIrq, uTagSrc)); 546 pBus->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pBus->CTX_SUFF(pDevIns), iForcedIrq, iLevel, uTagSrc); 547 } 548 } 549 550 static void ich9pciSetIrqInternal(PICH9PCIGLOBALS pGlobals, uint8_t uDevFn, PPCIDEVICE pPciDev, 551 int iIrq, int iLevel, uint32_t uTagSrc) 549 552 { 550 553 … … 554 557 { 555 558 PPDMDEVINS pDevIns = pGlobals->aPciBus.CTX_SUFF(pDevIns); 556 MsiNotify(pDevIns, pGlobals->aPciBus.CTX_SUFF(pPciHlp), pPciDev, iIrq, iLevel );559 MsiNotify(pDevIns, pGlobals->aPciBus.CTX_SUFF(pPciHlp), pPciDev, iIrq, iLevel, uTagSrc); 557 560 } 558 561 … … 560 563 { 561 564 PPDMDEVINS pDevIns = pGlobals->aPciBus.CTX_SUFF(pDevIns); 562 MsixNotify(pDevIns, pGlobals->aPciBus.CTX_SUFF(pPciHlp), pPciDev, iIrq, iLevel );565 MsixNotify(pDevIns, pGlobals->aPciBus.CTX_SUFF(pPciHlp), pPciDev, iIrq, iLevel, uTagSrc); 563 566 } 564 567 return; … … 582 585 * PCI device configuration space). 583 586 */ 584 ich9pciApicSetIrq(pBus, uDevFn, pPciDev, -1, iLevel, PCIDevGetInterruptLine(pPciDev));587 ich9pciApicSetIrq(pBus, uDevFn, pPciDev, -1, iLevel, uTagSrc, PCIDevGetInterruptLine(pPciDev)); 585 588 else 586 ich9pciApicSetIrq(pBus, uDevFn, pPciDev, iIrq, iLevel, -1);589 ich9pciApicSetIrq(pBus, uDevFn, pPciDev, iIrq, iLevel, uTagSrc, -1); 587 590 } 588 591 } -
trunk/src/VBox/Devices/Bus/MsiCommon.cpp
r36663 r40907 103 103 104 104 #ifdef IN_RING3 105 void MsiPciConfigWrite(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, uint32_t u32Address, uint32_t val, unsigned len) 105 void MsiPciConfigWrite(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, 106 uint32_t u32Address, uint32_t val, unsigned len) 106 107 { 107 108 int32_t iOff = u32Address - pDev->Int.s.u8MsiCapOffset; … … 169 170 { 170 171 Log(("msi: notify earlier masked pending vector: %d\n", uVector)); 171 MsiNotify(pDevIns, pPciHlp, pDev, uVector, PDM_IRQ_LEVEL_HIGH );172 MsiNotify(pDevIns, pPciHlp, pDev, uVector, PDM_IRQ_LEVEL_HIGH, 0 /*uTagSrc*/); 172 173 } 173 174 } … … 271 272 } 272 273 273 void MsiNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel )274 void MsiNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel, uint32_t uTagSrc) 274 275 { 275 276 AssertMsg(msiIsEnabled(pDev), ("Must be enabled to use that")); … … 304 305 305 306 Assert(pPciHlp->pfnIoApicSendMsi != NULL); 306 pPciHlp->pfnIoApicSendMsi(pDevIns, GCAddr, u32Value );307 } 307 pPciHlp->pfnIoApicSendMsi(pDevIns, GCAddr, u32Value, uTagSrc); 308 } -
trunk/src/VBox/Devices/Bus/MsiCommon.h
r36663 r40907 37 37 38 38 /* Device notification (aka interrupt). */ 39 void MsiNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel );39 void MsiNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel, uint32_t uTagSrc); 40 40 41 41 #ifdef IN_RING3 … … 54 54 55 55 /* Device notification (aka interrupt). */ 56 void MsixNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel );56 void MsixNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel, uint32_t uTagSrc); 57 57 58 58 #ifdef IN_RING3 -
trunk/src/VBox/Devices/Bus/MsixCommon.cpp
r39135 r40907 109 109 { 110 110 if (msixIsPending(pDev, iVector) && !msixIsVectorMasked(pDev, iVector)) 111 MsixNotify(pDevIns, pPciHlp, pDev, iVector, 1 /* iLevel */ );111 MsixNotify(pDevIns, pPciHlp, pDev, iVector, 1 /* iLevel */, 0 /*uTagSrc*/); 112 112 } 113 113 … … 239 239 } 240 240 241 void MsixNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel )241 void MsixNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel, uint32_t uTagSrc) 242 242 { 243 243 AssertMsg(msixIsEnabled(pDev), ("Must be enabled to use that")); … … 265 265 uint32_t u32Value = msixGetMsiData(pDev, iVector); 266 266 267 pPciHlp->pfnIoApicSendMsi(pDevIns, GCAddr, u32Value );267 pPciHlp->pfnIoApicSendMsi(pDevIns, GCAddr, u32Value, uTagSrc); 268 268 } 269 269
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