VirtualBox

Ignore:
Timestamp:
Jun 12, 2012 8:27:37 PM (12 years ago)
Author:
vboxsync
Message:

DIS: The start of the scoping exercise... Fixed PREFIX_ADDRSIZE that I just busted in the previous commit.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/EMAll.cpp

    r41674 r41675  
    789789        case OP_LMSW:       return "Lmsw";
    790790        case OP_SMSW:       return "Smsw";
    791         case OP_CMPXCHG:    return pDis->prefix & PREFIX_LOCK ? "Lock CmpXchg"   : "CmpXchg";
    792         case OP_CMPXCHG8B:  return pDis->prefix & PREFIX_LOCK ? "Lock CmpXchg8b" : "CmpXchg8b";
     791        case OP_CMPXCHG:    return pDis->prefix & DISPREFIX_LOCK ? "Lock CmpXchg"   : "CmpXchg";
     792        case OP_CMPXCHG8B:  return pDis->prefix & DISPREFIX_LOCK ? "Lock CmpXchg8b" : "CmpXchg8b";
    793793
    794794        default:
     
    10091009static int emInterpretPop(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize)
    10101010{
    1011     Assert(pDis->mode != CPUMODE_64BIT);    /** @todo check */
     1011    Assert(pDis->mode != DISCPUMODE_64BIT);    /** @todo check */
    10121012    OP_PARAMVAL param1;
    10131013    NOREF(pvFault);
     
    10281028
    10291029            /* Read stack value first */
    1030             if (SELMGetCpuModeFromSelector(pVCpu, pRegFrame->eflags, pRegFrame->ss, &pRegFrame->ssHid) == CPUMODE_16BIT)
     1030            if (SELMGetCpuModeFromSelector(pVCpu, pRegFrame->eflags, pRegFrame->ss, &pRegFrame->ssHid) == DISCPUMODE_16BIT)
    10311031                return VERR_EM_INTERPRETER; /* No legacy 16 bits stuff here, please. */
    10321032
     
    15611561            }
    15621562#ifdef LOG_ENABLED
    1563             if (pDis->mode == CPUMODE_64BIT)
     1563            if (pDis->mode == DISCPUMODE_64BIT)
    15641564                LogFlow(("EMInterpretInstruction at %RGv: OP_MOV %RGv <- %RX64 (%d) &val64=%RHv\n", (RTGCPTR)pRegFrame->rip, pDest, val64, param2.size, &val64));
    15651565            else
     
    16241624            }
    16251625#ifdef LOG_ENABLED
    1626             if (pDis->mode == CPUMODE_64BIT)
     1626            if (pDis->mode == DISCPUMODE_64BIT)
    16271627                LogFlow(("EMInterpretInstruction: OP_MOV %RGv -> %RX64 (%d)\n", pSrc, val64, param1.size));
    16281628            else
     
    16521652
    16531653    /* Don't support any but these three prefix bytes. */
    1654     if ((pDis->prefix & ~(PREFIX_ADDRSIZE|PREFIX_OPSIZE|PREFIX_REP|PREFIX_REX)))
     1654    if ((pDis->prefix & ~(DISPREFIX_ADDRSIZE|DISPREFIX_OPSIZE|DISPREFIX_REP|DISPREFIX_REX)))
    16551655        return VERR_EM_INTERPRETER;
    16561656
    16571657    switch (pDis->addrmode)
    16581658    {
    1659     case CPUMODE_16BIT:
     1659    case DISCPUMODE_16BIT:
    16601660        GCOffset   = pRegFrame->di;
    16611661        cTransfers = pRegFrame->cx;
    16621662        break;
    1663     case CPUMODE_32BIT:
     1663    case DISCPUMODE_32BIT:
    16641664        GCOffset   = pRegFrame->edi;
    16651665        cTransfers = pRegFrame->ecx;
    16661666        break;
    1667     case CPUMODE_64BIT:
     1667    case DISCPUMODE_64BIT:
    16681668        GCOffset   = pRegFrame->rdi;
    16691669        cTransfers = pRegFrame->rcx;
     
    16771677    switch (pDis->opmode)
    16781678    {
    1679     case CPUMODE_16BIT:
     1679    case DISCPUMODE_16BIT:
    16801680        cbSize = 2;
    16811681        break;
    1682     case CPUMODE_32BIT:
     1682    case DISCPUMODE_32BIT:
    16831683        cbSize = 4;
    16841684        break;
    1685     case CPUMODE_64BIT:
     1685    case DISCPUMODE_64BIT:
    16861686        cbSize = 8;
    16871687        break;
     
    16931693    offIncrement = pRegFrame->eflags.Bits.u1DF ? -(signed)cbSize : (signed)cbSize;
    16941694
    1695     if (!(pDis->prefix & PREFIX_REP))
     1695    if (!(pDis->prefix & DISPREFIX_REP))
    16961696    {
    16971697        LogFlow(("emInterpretStosWD dest=%04X:%RGv (%RGv) cbSize=%d\n", pRegFrame->es, GCOffset, GCDest, cbSize));
     
    17051705        switch (pDis->addrmode)
    17061706        {
    1707         case CPUMODE_16BIT:
     1707        case DISCPUMODE_16BIT:
    17081708            pRegFrame->di  += offIncrement;
    17091709            break;
    1710         case CPUMODE_32BIT:
     1710        case DISCPUMODE_32BIT:
    17111711            pRegFrame->edi += offIncrement;
    17121712            break;
    1713         case CPUMODE_64BIT:
     1713        case DISCPUMODE_64BIT:
    17141714            pRegFrame->rdi += offIncrement;
    17151715            break;
     
    17701770        switch (pDis->addrmode)
    17711771        {
    1772         case CPUMODE_16BIT:
     1772        case DISCPUMODE_16BIT:
    17731773            pRegFrame->di = GCOffset;
    17741774            pRegFrame->cx = cTransfers;
    17751775            break;
    1776         case CPUMODE_32BIT:
     1776        case DISCPUMODE_32BIT:
    17771777            pRegFrame->edi = GCOffset;
    17781778            pRegFrame->ecx = cTransfers;
    17791779            break;
    1780         case CPUMODE_64BIT:
     1780        case DISCPUMODE_64BIT:
    17811781            pRegFrame->rdi = GCOffset;
    17821782            pRegFrame->rcx = cTransfers;
     
    18481848    LogFlow(("%s %RGv rax=%RX64 %RX64\n", emGetMnemonic(pDis), GCPtrPar1, pRegFrame->rax, valpar));
    18491849
    1850     if (pDis->prefix & PREFIX_LOCK)
     1850    if (pDis->prefix & DISPREFIX_LOCK)
    18511851        eflags = EMEmulateLockCmpXchg(pvParam1, &pRegFrame->rax, valpar, pDis->param2.cb);
    18521852    else
     
    18701870static int emInterpretCmpXchg8b(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize)
    18711871{
    1872     Assert(pDis->mode != CPUMODE_64BIT);    /** @todo check */
     1872    Assert(pDis->mode != DISCPUMODE_64BIT);    /** @todo check */
    18731873    OP_PARAMVAL param1;
    18741874    NOREF(pvFault);
     
    19011901    LogFlow(("%s %RGv=%08x eax=%08x\n", emGetMnemonic(pDis), pvParam1, pRegFrame->eax));
    19021902
    1903     if (pDis->prefix & PREFIX_LOCK)
     1903    if (pDis->prefix & DISPREFIX_LOCK)
    19041904        eflags = EMEmulateLockCmpXchg8b(pvParam1, &pRegFrame->eax, &pRegFrame->edx, pRegFrame->ebx, pRegFrame->ecx);
    19051905    else
     
    19241924static int emInterpretXAdd(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize)
    19251925{
    1926     Assert(pDis->mode != CPUMODE_64BIT);    /** @todo check */
     1926    Assert(pDis->mode != DISCPUMODE_64BIT);    /** @todo check */
    19271927    OP_PARAMVAL param1;
    19281928    void *pvParamReg2;
     
    19701970            LogFlow(("XAdd %RGv=%p reg=%08llx\n", GCPtrPar1, pvParam1, *(uint64_t *)pvParamReg2));
    19711971
    1972             if (pDis->prefix & PREFIX_LOCK)
     1972            if (pDis->prefix & DISPREFIX_LOCK)
    19731973                eflags = EMEmulateLockXAdd(pvParam1, pvParamReg2, cbParamReg2);
    19741974            else
     
    26542654    AssertRCReturn(rc, VERR_EM_INTERPRETER);
    26552655
    2656     if (!(pDis->prefix & PREFIX_OPSIZE))
     2656    if (!(pDis->prefix & DISPREFIX_OPSIZE))
    26572657        dtr32.uAddr &= 0xffffff; /* 16 bits operand size */
    26582658
     
    30303030    /* Note: The Intel manual claims there's a REX version of RDMSR that's slightly
    30313031             different, so we play safe by completely disassembling the instruction. */
    3032     Assert(!(pDis->prefix & PREFIX_REX));
     3032    Assert(!(pDis->prefix & DISPREFIX_REX));
    30333033    NOREF(pDis); NOREF(pvFault); NOREF(pcbSize);
    30343034    return EMInterpretRdmsr(pVM, pVCpu, pRegFrame);
     
    31043104
    31053105#ifdef IN_RC
    3106     if (    (pDis->prefix & (PREFIX_REPNE | PREFIX_REP))
    3107         ||  (   (pDis->prefix & PREFIX_LOCK)
     3106    if (    (pDis->prefix & (DISPREFIX_REPNE | DISPREFIX_REP))
     3107        ||  (   (pDis->prefix & DISPREFIX_LOCK)
    31083108             && pDis->pCurInstr->opcode != OP_CMPXCHG
    31093109             && pDis->pCurInstr->opcode != OP_CMPXCHG8B
     
    31163116       )
    31173117#else
    3118     if (    (pDis->prefix & PREFIX_REPNE)
    3119         ||  (   (pDis->prefix & PREFIX_REP)
     3118    if (    (pDis->prefix & DISPREFIX_REPNE)
     3119        ||  (   (pDis->prefix & DISPREFIX_REP)
    31203120             && pDis->pCurInstr->opcode != OP_STOSWD
    31213121            )
    3122         ||  (   (pDis->prefix & PREFIX_LOCK)
     3122        ||  (   (pDis->prefix & DISPREFIX_LOCK)
    31233123             && pDis->pCurInstr->opcode != OP_OR
    31243124             && pDis->pCurInstr->opcode != OP_AND
     
    32283228# define INTERPRET_CASE_EX_LOCK_PARAM3(opcode, Instr, InstrFn, pfnEmulate, pfnEmulateLock) \
    32293229        case opcode:\
    3230             if (pDis->prefix & PREFIX_LOCK) \
     3230            if (pDis->prefix & DISPREFIX_LOCK) \
    32313231                rc = emInterpretLock##InstrFn(pVM, pVCpu, pDis, pRegFrame, pvFault, pcbSize, pfnEmulateLock); \
    32323232            else \
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