Changeset 41678 in vbox for trunk/src/VBox/Disassembler
- Timestamp:
- Jun 13, 2012 9:37:47 AM (12 years ago)
- Location:
- trunk/src/VBox/Disassembler
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Disassembler/DisasmCore.cpp
r41676 r41678 616 616 if (ppszSIBIndexReg[index]) 617 617 { 618 pParam->f lags|= DISUSE_INDEX | regtype;618 pParam->fUse |= DISUSE_INDEX | regtype; 619 619 pParam->index.reg_gen = index; 620 620 621 621 if (scale != 0) 622 622 { 623 pParam->f lags|= DISUSE_SCALE;623 pParam->fUse |= DISUSE_SCALE; 624 624 pParam->scale = (1<<scale); 625 625 } … … 631 631 if (pCpu->addrmode == DISCPUMODE_32BIT) 632 632 { 633 pParam->f lags|= DISUSE_DISPLACEMENT32;633 pParam->fUse |= DISUSE_DISPLACEMENT32; 634 634 pParam->uDisp.i32 = pCpu->i32SibDisp; 635 635 } 636 636 else 637 637 { /* sign-extend to 64 bits */ 638 pParam->f lags|= DISUSE_DISPLACEMENT64;638 pParam->fUse |= DISUSE_DISPLACEMENT64; 639 639 pParam->uDisp.i64 = pCpu->i32SibDisp; 640 640 } … … 642 642 else 643 643 { 644 pParam->f lags|= DISUSE_BASE | regtype;644 pParam->fUse |= DISUSE_BASE | regtype; 645 645 pParam->base.reg_gen = base; 646 646 } … … 735 735 { 736 736 case OP_PARM_C: //control register 737 pParam->f lags|= DISUSE_REG_CR;737 pParam->fUse |= DISUSE_REG_CR; 738 738 739 739 if ( pCpu->pCurInstr->opcode == OP_MOV_CR … … 749 749 750 750 case OP_PARM_D: //debug register 751 pParam->f lags|= DISUSE_REG_DBG;751 pParam->fUse |= DISUSE_REG_DBG; 752 752 pParam->base.reg_dbg = reg; 753 753 return 0; … … 755 755 case OP_PARM_P: //MMX register 756 756 reg &= 7; /* REX.R has no effect here */ 757 pParam->f lags|= DISUSE_REG_MMX;757 pParam->fUse |= DISUSE_REG_MMX; 758 758 pParam->base.reg_mmx = reg; 759 759 return 0; … … 762 762 reg &= 7; /* REX.R has no effect here */ 763 763 disasmModRMSReg(pCpu, pOp, reg, pParam); 764 pParam->f lags|= DISUSE_REG_SEG;764 pParam->fUse |= DISUSE_REG_SEG; 765 765 return 0; 766 766 767 767 case OP_PARM_T: //test register 768 768 reg &= 7; /* REX.R has no effect here */ 769 pParam->f lags|= DISUSE_REG_TEST;769 pParam->fUse |= DISUSE_REG_TEST; 770 770 pParam->base.reg_test = reg; 771 771 return 0; … … 778 778 779 779 case OP_PARM_V: //XMM register 780 pParam->f lags|= DISUSE_REG_XMM;780 pParam->fUse |= DISUSE_REG_XMM; 781 781 pParam->base.reg_xmm = reg; 782 782 return 0; … … 807 807 if (pCpu->mode != DISCPUMODE_64BIT) 808 808 { 809 pParam->f lags|= DISUSE_DISPLACEMENT32;809 pParam->fUse |= DISUSE_DISPLACEMENT32; 810 810 pParam->uDisp.i32 = pCpu->i32SibDisp; 811 811 } 812 812 else 813 813 { 814 pParam->f lags|= DISUSE_RIPDISPLACEMENT32;814 pParam->fUse |= DISUSE_RIPDISPLACEMENT32; 815 815 pParam->uDisp.i32 = pCpu->i32SibDisp; 816 816 } … … 818 818 else 819 819 { //register address 820 pParam->f lags|= DISUSE_BASE;820 pParam->fUse |= DISUSE_BASE; 821 821 disasmModRMReg(pCpu, pOp, rm, pParam, 1); 822 822 } … … 829 829 else 830 830 { 831 pParam->f lags|= DISUSE_BASE;831 pParam->fUse |= DISUSE_BASE; 832 832 disasmModRMReg(pCpu, pOp, rm, pParam, 1); 833 833 } 834 834 pParam->uDisp.i8 = pCpu->i32SibDisp; 835 pParam->f lags|= DISUSE_DISPLACEMENT8;835 pParam->fUse |= DISUSE_DISPLACEMENT8; 836 836 break; 837 837 … … 842 842 else 843 843 { 844 pParam->f lags|= DISUSE_BASE;844 pParam->fUse |= DISUSE_BASE; 845 845 disasmModRMReg(pCpu, pOp, rm, pParam, 1); 846 846 } 847 847 pParam->uDisp.i32 = pCpu->i32SibDisp; 848 pParam->f lags|= DISUSE_DISPLACEMENT32;848 pParam->fUse |= DISUSE_DISPLACEMENT32; 849 849 break; 850 850 … … 862 862 {//16 bits displacement 863 863 pParam->uDisp.i16 = pCpu->i32SibDisp; 864 pParam->f lags|= DISUSE_DISPLACEMENT16;864 pParam->fUse |= DISUSE_DISPLACEMENT16; 865 865 } 866 866 else 867 867 { 868 pParam->f lags|= DISUSE_BASE;868 pParam->fUse |= DISUSE_BASE; 869 869 disasmModRMReg16(pCpu, pOp, rm, pParam); 870 870 } … … 874 874 disasmModRMReg16(pCpu, pOp, rm, pParam); 875 875 pParam->uDisp.i8 = pCpu->i32SibDisp; 876 pParam->f lags|= DISUSE_BASE | DISUSE_DISPLACEMENT8;876 pParam->fUse |= DISUSE_BASE | DISUSE_DISPLACEMENT8; 877 877 break; 878 878 … … 880 880 disasmModRMReg16(pCpu, pOp, rm, pParam); 881 881 pParam->uDisp.i16 = pCpu->i32SibDisp; 882 pParam->f lags|= DISUSE_BASE | DISUSE_DISPLACEMENT16;882 pParam->fUse |= DISUSE_BASE | DISUSE_DISPLACEMENT16; 883 883 break; 884 884 … … 1165 1165 NOREF(pOp); 1166 1166 pParam->parval = DISReadByte(pCpu, uCodePtr); 1167 pParam->f lags|= DISUSE_IMMEDIATE8;1167 pParam->fUse |= DISUSE_IMMEDIATE8; 1168 1168 pParam->cb = sizeof(uint8_t); 1169 1169 return sizeof(uint8_t); … … 1184 1184 { 1185 1185 pParam->parval = (uint32_t)(int8_t)DISReadByte(pCpu, uCodePtr); 1186 pParam->f lags|= DISUSE_IMMEDIATE32_SX8;1186 pParam->fUse |= DISUSE_IMMEDIATE32_SX8; 1187 1187 pParam->cb = sizeof(uint32_t); 1188 1188 } … … 1191 1191 { 1192 1192 pParam->parval = (uint64_t)(int8_t)DISReadByte(pCpu, uCodePtr); 1193 pParam->f lags|= DISUSE_IMMEDIATE64_SX8;1193 pParam->fUse |= DISUSE_IMMEDIATE64_SX8; 1194 1194 pParam->cb = sizeof(uint64_t); 1195 1195 } … … 1197 1197 { 1198 1198 pParam->parval = (uint16_t)(int8_t)DISReadByte(pCpu, uCodePtr); 1199 pParam->f lags|= DISUSE_IMMEDIATE16_SX8;1199 pParam->fUse |= DISUSE_IMMEDIATE16_SX8; 1200 1200 pParam->cb = sizeof(uint16_t); 1201 1201 } … … 1215 1215 NOREF(pOp); 1216 1216 pParam->parval = DISReadWord(pCpu, uCodePtr); 1217 pParam->f lags|= DISUSE_IMMEDIATE16;1217 pParam->fUse |= DISUSE_IMMEDIATE16; 1218 1218 pParam->cb = sizeof(uint16_t); 1219 1219 return sizeof(uint16_t); … … 1232 1232 NOREF(pOp); 1233 1233 pParam->parval = DISReadDWord(pCpu, uCodePtr); 1234 pParam->f lags|= DISUSE_IMMEDIATE32;1234 pParam->fUse |= DISUSE_IMMEDIATE32; 1235 1235 pParam->cb = sizeof(uint32_t); 1236 1236 return sizeof(uint32_t); … … 1249 1249 NOREF(pOp); 1250 1250 pParam->parval = DISReadQWord(pCpu, uCodePtr); 1251 pParam->f lags|= DISUSE_IMMEDIATE64;1251 pParam->fUse |= DISUSE_IMMEDIATE64; 1252 1252 pParam->cb = sizeof(uint64_t); 1253 1253 return sizeof(uint64_t); … … 1268 1268 { 1269 1269 pParam->parval = DISReadDWord(pCpu, uCodePtr); 1270 pParam->f lags|= DISUSE_IMMEDIATE32;1270 pParam->fUse |= DISUSE_IMMEDIATE32; 1271 1271 pParam->cb = sizeof(uint32_t); 1272 1272 return sizeof(uint32_t); … … 1276 1276 { 1277 1277 pParam->parval = DISReadQWord(pCpu, uCodePtr); 1278 pParam->f lags|= DISUSE_IMMEDIATE64;1278 pParam->fUse |= DISUSE_IMMEDIATE64; 1279 1279 pParam->cb = sizeof(uint64_t); 1280 1280 return sizeof(uint64_t); … … 1282 1282 1283 1283 pParam->parval = DISReadWord(pCpu, uCodePtr); 1284 pParam->f lags|= DISUSE_IMMEDIATE16;1284 pParam->fUse |= DISUSE_IMMEDIATE16; 1285 1285 pParam->cb = sizeof(uint16_t); 1286 1286 return sizeof(uint16_t); … … 1306 1306 { 1307 1307 pParam->parval = DISReadWord(pCpu, uCodePtr); 1308 pParam->f lags|= DISUSE_IMMEDIATE16;1308 pParam->fUse |= DISUSE_IMMEDIATE16; 1309 1309 pParam->cb = sizeof(uint16_t); 1310 1310 return sizeof(uint16_t); … … 1315 1315 { 1316 1316 pParam->parval = (uint64_t)(int32_t)DISReadDWord(pCpu, uCodePtr); 1317 pParam->f lags|= DISUSE_IMMEDIATE64;1317 pParam->fUse |= DISUSE_IMMEDIATE64; 1318 1318 pParam->cb = sizeof(uint64_t); 1319 1319 } … … 1321 1321 { 1322 1322 pParam->parval = DISReadDWord(pCpu, uCodePtr); 1323 pParam->f lags|= DISUSE_IMMEDIATE32;1323 pParam->fUse |= DISUSE_IMMEDIATE32; 1324 1324 pParam->cb = sizeof(uint32_t); 1325 1325 } … … 1344 1344 NOREF(pOp); 1345 1345 pParam->parval = DISReadByte(pCpu, uCodePtr); 1346 pParam->f lags|= DISUSE_IMMEDIATE8_REL;1346 pParam->fUse |= DISUSE_IMMEDIATE8_REL; 1347 1347 pParam->cb = sizeof(uint8_t); 1348 1348 return sizeof(char); … … 1365 1365 { 1366 1366 pParam->parval = DISReadDWord(pCpu, uCodePtr); 1367 pParam->f lags|= DISUSE_IMMEDIATE32_REL;1367 pParam->fUse |= DISUSE_IMMEDIATE32_REL; 1368 1368 pParam->cb = sizeof(int32_t); 1369 1369 return sizeof(int32_t); … … 1374 1374 /* 32 bits relative immediate sign extended to 64 bits. */ 1375 1375 pParam->parval = (uint64_t)(int32_t)DISReadDWord(pCpu, uCodePtr); 1376 pParam->f lags|= DISUSE_IMMEDIATE64_REL;1376 pParam->fUse |= DISUSE_IMMEDIATE64_REL; 1377 1377 pParam->cb = sizeof(int64_t); 1378 1378 return sizeof(int32_t); … … 1380 1380 1381 1381 pParam->parval = DISReadWord(pCpu, uCodePtr); 1382 pParam->f lags|= DISUSE_IMMEDIATE16_REL;1382 pParam->fUse |= DISUSE_IMMEDIATE16_REL; 1383 1383 pParam->cb = sizeof(int16_t); 1384 1384 return sizeof(int16_t); … … 1406 1406 pParam->parval = DISReadDWord(pCpu, uCodePtr); 1407 1407 *((uint32_t*)&pParam->parval+1) = DISReadWord(pCpu, uCodePtr+sizeof(uint32_t)); 1408 pParam->f lags|= DISUSE_IMMEDIATE_ADDR_16_32;1408 pParam->fUse |= DISUSE_IMMEDIATE_ADDR_16_32; 1409 1409 pParam->cb = sizeof(uint16_t) + sizeof(uint32_t); 1410 1410 return sizeof(uint32_t) + sizeof(uint16_t); … … 1418 1418 */ 1419 1419 pParam->uDisp.i32 = DISReadDWord(pCpu, uCodePtr); 1420 pParam->f lags|= DISUSE_DISPLACEMENT32;1420 pParam->fUse |= DISUSE_DISPLACEMENT32; 1421 1421 pParam->cb = sizeof(uint32_t); 1422 1422 return sizeof(uint32_t); … … 1433 1433 */ 1434 1434 pParam->uDisp.i64 = DISReadQWord(pCpu, uCodePtr); 1435 pParam->f lags|= DISUSE_DISPLACEMENT64;1435 pParam->fUse |= DISUSE_DISPLACEMENT64; 1436 1436 pParam->cb = sizeof(uint64_t); 1437 1437 return sizeof(uint64_t); … … 1441 1441 /* far 16:16 pointer */ 1442 1442 pParam->parval = DISReadDWord(pCpu, uCodePtr); 1443 pParam->f lags|= DISUSE_IMMEDIATE_ADDR_16_16;1443 pParam->fUse |= DISUSE_IMMEDIATE_ADDR_16_16; 1444 1444 pParam->cb = 2*sizeof(uint16_t); 1445 1445 return sizeof(uint32_t); … … 1453 1453 */ 1454 1454 pParam->uDisp.i16 = DISReadWord(pCpu, uCodePtr); 1455 pParam->f lags|= DISUSE_DISPLACEMENT16;1455 pParam->fUse |= DISUSE_DISPLACEMENT16; 1456 1456 pParam->cb = sizeof(uint16_t); 1457 1457 return sizeof(uint16_t); … … 1502 1502 pParam->parval = DISReadDWord(pCpu, uCodePtr); 1503 1503 *((uint32_t*)&pParam->parval+1) = DISReadWord(pCpu, uCodePtr+sizeof(uint32_t)); 1504 pParam->f lags|= DISUSE_IMMEDIATE_ADDR_16_32;1504 pParam->fUse |= DISUSE_IMMEDIATE_ADDR_16_32; 1505 1505 pParam->cb = sizeof(uint16_t) + sizeof(uint32_t); 1506 1506 return sizeof(uint32_t) + sizeof(uint16_t); … … 1509 1509 // far 16:16 pointer 1510 1510 pParam->parval = DISReadDWord(pCpu, uCodePtr); 1511 pParam->f lags|= DISUSE_IMMEDIATE_ADDR_16_16;1511 pParam->fUse |= DISUSE_IMMEDIATE_ADDR_16_16; 1512 1512 pParam->cb = 2*sizeof(uint16_t); 1513 1513 return sizeof(uint32_t); … … 1560 1560 /* Use 32-bit registers. */ 1561 1561 pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN32_START; 1562 pParam->f lags|= DISUSE_REG_GEN32;1562 pParam->fUse |= DISUSE_REG_GEN32; 1563 1563 pParam->cb = 4; 1564 1564 } … … 1574 1574 pParam->base.reg_gen += 8; 1575 1575 1576 pParam->f lags|= DISUSE_REG_GEN64;1576 pParam->fUse |= DISUSE_REG_GEN64; 1577 1577 pParam->cb = 8; 1578 1578 } … … 1581 1581 /* Use 16-bit registers. */ 1582 1582 pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN32_START; 1583 pParam->f lags|= DISUSE_REG_GEN16;1583 pParam->fUse |= DISUSE_REG_GEN16; 1584 1584 pParam->cb = 2; 1585 1585 pParam->param = pParam->param - OP_PARM_REG_GEN32_START + OP_PARM_REG_GEN16_START; … … 1591 1591 /* Segment ES..GS registers. */ 1592 1592 pParam->base.reg_seg = (DIS_SELREG)(pParam->param - OP_PARM_REG_SEG_START); 1593 pParam->f lags|= DISUSE_REG_SEG;1593 pParam->fUse |= DISUSE_REG_SEG; 1594 1594 pParam->cb = 2; 1595 1595 } … … 1599 1599 /* 16-bit AX..DI registers. */ 1600 1600 pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN16_START; 1601 pParam->f lags|= DISUSE_REG_GEN16;1601 pParam->fUse |= DISUSE_REG_GEN16; 1602 1602 pParam->cb = 2; 1603 1603 } … … 1607 1607 /* 8-bit AL..DL, AH..DH registers. */ 1608 1608 pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN8_START; 1609 pParam->f lags|= DISUSE_REG_GEN8;1609 pParam->fUse |= DISUSE_REG_GEN8; 1610 1610 pParam->cb = 1; 1611 1611 … … 1624 1624 /* FPU registers. */ 1625 1625 pParam->base.reg_fp = pParam->param - OP_PARM_REG_FP_START; 1626 pParam->f lags|= DISUSE_REG_FP;1626 pParam->fUse |= DISUSE_REG_FP; 1627 1627 pParam->cb = 10; 1628 1628 } … … 1639 1639 NOREF(uCodePtr); 1640 1640 1641 pParam->f lags|= DISUSE_POINTER_DS_BASED;1641 pParam->fUse |= DISUSE_POINTER_DS_BASED; 1642 1642 if (pCpu->addrmode == DISCPUMODE_32BIT) 1643 1643 { 1644 1644 pParam->base.reg_gen = USE_REG_ESI; 1645 pParam->f lags|= DISUSE_REG_GEN32;1645 pParam->fUse |= DISUSE_REG_GEN32; 1646 1646 } 1647 1647 else … … 1649 1649 { 1650 1650 pParam->base.reg_gen = USE_REG_RSI; 1651 pParam->f lags|= DISUSE_REG_GEN64;1651 pParam->fUse |= DISUSE_REG_GEN64; 1652 1652 } 1653 1653 else 1654 1654 { 1655 1655 pParam->base.reg_gen = USE_REG_SI; 1656 pParam->f lags|= DISUSE_REG_GEN16;1656 pParam->fUse |= DISUSE_REG_GEN16; 1657 1657 } 1658 1658 return 0; //no additional opcode bytes … … 1664 1664 NOREF(uCodePtr); NOREF(pOp); 1665 1665 1666 pParam->f lags|= DISUSE_POINTER_DS_BASED;1666 pParam->fUse |= DISUSE_POINTER_DS_BASED; 1667 1667 if (pCpu->addrmode == DISCPUMODE_32BIT) 1668 1668 { 1669 1669 pParam->base.reg_gen = USE_REG_ESI; 1670 pParam->f lags|= DISUSE_REG_GEN32;1670 pParam->fUse |= DISUSE_REG_GEN32; 1671 1671 } 1672 1672 else … … 1674 1674 { 1675 1675 pParam->base.reg_gen = USE_REG_RSI; 1676 pParam->f lags|= DISUSE_REG_GEN64;1676 pParam->fUse |= DISUSE_REG_GEN64; 1677 1677 } 1678 1678 else 1679 1679 { 1680 1680 pParam->base.reg_gen = USE_REG_SI; 1681 pParam->f lags|= DISUSE_REG_GEN16;1681 pParam->fUse |= DISUSE_REG_GEN16; 1682 1682 } 1683 1683 return 0; //no additional opcode bytes … … 1689 1689 NOREF(uCodePtr); 1690 1690 1691 pParam->f lags|= DISUSE_POINTER_ES_BASED;1691 pParam->fUse |= DISUSE_POINTER_ES_BASED; 1692 1692 if (pCpu->addrmode == DISCPUMODE_32BIT) 1693 1693 { 1694 1694 pParam->base.reg_gen = USE_REG_EDI; 1695 pParam->f lags|= DISUSE_REG_GEN32;1695 pParam->fUse |= DISUSE_REG_GEN32; 1696 1696 } 1697 1697 else … … 1699 1699 { 1700 1700 pParam->base.reg_gen = USE_REG_RDI; 1701 pParam->f lags|= DISUSE_REG_GEN64;1701 pParam->fUse |= DISUSE_REG_GEN64; 1702 1702 } 1703 1703 else 1704 1704 { 1705 1705 pParam->base.reg_gen = USE_REG_DI; 1706 pParam->f lags|= DISUSE_REG_GEN16;1706 pParam->fUse |= DISUSE_REG_GEN16; 1707 1707 } 1708 1708 return 0; //no additional opcode bytes … … 1714 1714 NOREF(uCodePtr); NOREF(pOp); 1715 1715 1716 pParam->f lags|= DISUSE_POINTER_ES_BASED;1716 pParam->fUse |= DISUSE_POINTER_ES_BASED; 1717 1717 if (pCpu->addrmode == DISCPUMODE_32BIT) 1718 1718 { 1719 1719 pParam->base.reg_gen = USE_REG_EDI; 1720 pParam->f lags|= DISUSE_REG_GEN32;1720 pParam->fUse |= DISUSE_REG_GEN32; 1721 1721 } 1722 1722 else … … 1724 1724 { 1725 1725 pParam->base.reg_gen = USE_REG_RDI; 1726 pParam->f lags|= DISUSE_REG_GEN64;1726 pParam->fUse |= DISUSE_REG_GEN64; 1727 1727 } 1728 1728 else 1729 1729 { 1730 1730 pParam->base.reg_gen = USE_REG_DI; 1731 pParam->f lags|= DISUSE_REG_GEN16;1731 pParam->fUse |= DISUSE_REG_GEN16; 1732 1732 } 1733 1733 return 0; //no additional opcode bytes … … 2341 2341 } 2342 2342 2343 pParam->f lags|= DISUSE_REG_GEN8;2343 pParam->fUse |= DISUSE_REG_GEN8; 2344 2344 pParam->base.reg_gen = idx; 2345 2345 break; … … 2348 2348 Assert(idx < (pCpu->prefix & DISPREFIX_REX) ? 16 : 8); 2349 2349 2350 pParam->f lags|= DISUSE_REG_GEN16;2350 pParam->fUse |= DISUSE_REG_GEN16; 2351 2351 pParam->base.reg_gen = idx; 2352 2352 break; … … 2355 2355 Assert(idx < (pCpu->prefix & DISPREFIX_REX) ? 16 : 8); 2356 2356 2357 pParam->f lags|= DISUSE_REG_GEN32;2357 pParam->fUse |= DISUSE_REG_GEN32; 2358 2358 pParam->base.reg_gen = idx; 2359 2359 break; 2360 2360 2361 2361 case OP_PARM_q: 2362 pParam->f lags|= DISUSE_REG_GEN64;2362 pParam->fUse |= DISUSE_REG_GEN64; 2363 2363 pParam->base.reg_gen = idx; 2364 2364 break; … … 2375 2375 { 2376 2376 NOREF(pCpu); NOREF(pOp); 2377 pParam->f lags|= DISUSE_REG_GEN16;2377 pParam->fUse |= DISUSE_REG_GEN16; 2378 2378 pParam->base.reg_gen = BaseModRMReg16[idx]; 2379 2379 if (idx < 4) 2380 2380 { 2381 pParam->f lags|= DISUSE_INDEX;2381 pParam->fUse |= DISUSE_INDEX; 2382 2382 pParam->index.reg_gen = IndexModRMReg16[idx]; 2383 2383 } … … 2395 2395 } 2396 2396 2397 pParam->f lags|= DISUSE_REG_SEG;2397 pParam->fUse |= DISUSE_REG_SEG; 2398 2398 pParam->base.reg_seg = (DIS_SELREG)idx; 2399 2399 } … … 2655 2655 case OP_XCHG: 2656 2656 case OP_XOR: 2657 if (pCpu->param1.flags & (DISUSE_BASE | DISUSE_INDEX | DISUSE_DISPLACEMENT64 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT8 | DISUSE_RIPDISPLACEMENT32)) 2657 if (pCpu->param1.fUse & (DISUSE_BASE | DISUSE_INDEX | DISUSE_DISPLACEMENT64 | DISUSE_DISPLACEMENT32 2658 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT8 | DISUSE_RIPDISPLACEMENT32)) 2658 2659 return; 2659 2660 break; -
trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp
r41676 r41678 93 93 static const char *disasmFormatYasmBaseReg(PCDISCPUSTATE pCpu, PCOP_PARAMETER pParam, size_t *pcchReg) 94 94 { 95 switch (pParam->f lags& ( DISUSE_REG_GEN8 | DISUSE_REG_GEN16 | DISUSE_REG_GEN32 | DISUSE_REG_GEN6496 97 95 switch (pParam->fUse & ( DISUSE_REG_GEN8 | DISUSE_REG_GEN16 | DISUSE_REG_GEN32 | DISUSE_REG_GEN64 96 | DISUSE_REG_FP | DISUSE_REG_MMX | DISUSE_REG_XMM | DISUSE_REG_CR 97 | DISUSE_REG_DBG | DISUSE_REG_SEG | DISUSE_REG_TEST)) 98 98 99 99 { … … 187 187 188 188 default: 189 AssertMsgFailed(("%#x\n", pParam->f lags));189 AssertMsgFailed(("%#x\n", pParam->fUse)); 190 190 *pcchReg = 3; 191 191 return "r??"; … … 231 231 232 232 default: 233 AssertMsgFailed(("%#x %#x\n", pParam->f lags, pCpu->addrmode));233 AssertMsgFailed(("%#x %#x\n", pParam->fUse, pCpu->addrmode)); 234 234 *pcchReg = 3; 235 235 return "r??"; … … 591 591 break; \ 592 592 case OP_PARM_p: break; /* see PUT_FAR */ \ 593 case OP_PARM_s: if (pParam->f lags& DISUSE_REG_FP) PUT_SZ("tword "); break; /* ?? */ \593 case OP_PARM_s: if (pParam->fUse & DISUSE_REG_FP) PUT_SZ("tword "); break; /* ?? */ \ 594 594 case OP_PARM_z: break; \ 595 595 case OP_PARM_NONE: \ 596 596 if ( OP_PARM_VTYPE(pParam->param) == OP_PARM_M \ 597 && ((pParam->f lags& DISUSE_REG_FP) || pOp->opcode == OP_FLD)) \597 && ((pParam->fUse & DISUSE_REG_FP) || pOp->opcode == OP_FLD)) \ 598 598 PUT_SZ("tword "); \ 599 599 break; \ … … 613 613 */ 614 614 if ( (pCpu->prefix & DISPREFIX_SEG) 615 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param1.f lags)616 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param2.f lags)617 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param3.f lags))615 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param1.fUse) 616 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param2.fUse) 617 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param3.fUse)) 618 618 { 619 619 PUT_STR(s_szSegPrefix[pCpu->enmPrefixSeg], 2); … … 647 647 { 648 648 pszFmt += RT_C_IS_ALPHA(pszFmt[0]) ? RT_C_IS_ALPHA(pszFmt[1]) ? 2 : 1 : 0; 649 Assert(!(pParam->f lags& (DISUSE_INDEX | DISUSE_SCALE) /* No SIB here... */));650 Assert(!(pParam->f lags& (DISUSE_DISPLACEMENT8 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT64 | DISUSE_RIPDISPLACEMENT32)));649 Assert(!(pParam->fUse & (DISUSE_INDEX | DISUSE_SCALE) /* No SIB here... */)); 650 Assert(!(pParam->fUse & (DISUSE_DISPLACEMENT8 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT64 | DISUSE_RIPDISPLACEMENT32))); 651 651 652 652 size_t cchReg; … … 668 668 669 669 PUT_FAR(); 670 if (DISUSE_IS_EFFECTIVE_ADDR(pParam->f lags))670 if (DISUSE_IS_EFFECTIVE_ADDR(pParam->fUse)) 671 671 { 672 672 /* Work around mov seg,[mem16] and mov [mem16],seg as these always make a 16-bit mem … … 680 680 } 681 681 if ( (fFlags & DIS_FMT_FLAGS_STRICT) 682 && (pParam->f lags& (DISUSE_DISPLACEMENT8 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT64 | DISUSE_RIPDISPLACEMENT32)))682 && (pParam->fUse & (DISUSE_DISPLACEMENT8 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT64 | DISUSE_RIPDISPLACEMENT32))) 683 683 { 684 if ( (pParam->f lags& DISUSE_DISPLACEMENT8)684 if ( (pParam->fUse & DISUSE_DISPLACEMENT8) 685 685 && !pParam->uDisp.i8) 686 686 PUT_SZ("byte "); 687 else if ( (pParam->f lags& DISUSE_DISPLACEMENT16)687 else if ( (pParam->fUse & DISUSE_DISPLACEMENT16) 688 688 && (int8_t)pParam->uDisp.i16 == (int16_t)pParam->uDisp.i16) 689 689 PUT_SZ("word "); 690 else if ( (pParam->f lags& DISUSE_DISPLACEMENT32)690 else if ( (pParam->fUse & DISUSE_DISPLACEMENT32) 691 691 && (int16_t)pParam->uDisp.i32 == (int32_t)pParam->uDisp.i32) //?? 692 692 PUT_SZ("dword "); 693 else if ( (pParam->f lags& DISUSE_DISPLACEMENT64)693 else if ( (pParam->fUse & DISUSE_DISPLACEMENT64) 694 694 && (pCpu->SIB.Bits.Base != 5 || pCpu->ModRM.Bits.Mod != 0) 695 695 && (int32_t)pParam->uDisp.i64 == (int64_t)pParam->uDisp.i64) //?? 696 696 PUT_SZ("qword "); 697 697 } 698 if (DISUSE_IS_EFFECTIVE_ADDR(pParam->f lags))698 if (DISUSE_IS_EFFECTIVE_ADDR(pParam->fUse)) 699 699 PUT_SEGMENT_OVERRIDE(); 700 700 701 bool fBase = (pParam->f lags& DISUSE_BASE) /* When exactly is DISUSE_BASE supposed to be set? disasmModRMReg doesn't set it. */702 || ( (pParam->f lags& (DISUSE_REG_GEN8 | DISUSE_REG_GEN16 | DISUSE_REG_GEN32 | DISUSE_REG_GEN64))703 && !DISUSE_IS_EFFECTIVE_ADDR(pParam->f lags));701 bool fBase = (pParam->fUse & DISUSE_BASE) /* When exactly is DISUSE_BASE supposed to be set? disasmModRMReg doesn't set it. */ 702 || ( (pParam->fUse & (DISUSE_REG_GEN8 | DISUSE_REG_GEN16 | DISUSE_REG_GEN32 | DISUSE_REG_GEN64)) 703 && !DISUSE_IS_EFFECTIVE_ADDR(pParam->fUse)); 704 704 if (fBase) 705 705 { … … 709 709 } 710 710 711 if (pParam->f lags& DISUSE_INDEX)711 if (pParam->fUse & DISUSE_INDEX) 712 712 { 713 713 if (fBase) … … 718 718 PUT_STR(pszReg, cchReg); 719 719 720 if (pParam->f lags& DISUSE_SCALE)720 if (pParam->fUse & DISUSE_SCALE) 721 721 { 722 722 PUT_C('*'); … … 725 725 } 726 726 else 727 Assert(!(pParam->f lags& DISUSE_SCALE));728 729 if (pParam->f lags& (DISUSE_DISPLACEMENT8 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT64 | DISUSE_RIPDISPLACEMENT32))727 Assert(!(pParam->fUse & DISUSE_SCALE)); 728 729 if (pParam->fUse & (DISUSE_DISPLACEMENT8 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT64 | DISUSE_RIPDISPLACEMENT32)) 730 730 { 731 731 int64_t off2; 732 if (pParam->f lags& DISUSE_DISPLACEMENT8)732 if (pParam->fUse & DISUSE_DISPLACEMENT8) 733 733 off2 = pParam->uDisp.i8; 734 else if (pParam->f lags& DISUSE_DISPLACEMENT16)734 else if (pParam->fUse & DISUSE_DISPLACEMENT16) 735 735 off2 = pParam->uDisp.i16; 736 else if (pParam->f lags& (DISUSE_DISPLACEMENT32 | DISUSE_RIPDISPLACEMENT32))736 else if (pParam->fUse & (DISUSE_DISPLACEMENT32 | DISUSE_RIPDISPLACEMENT32)) 737 737 off2 = pParam->uDisp.i32; 738 else if (pParam->f lags& DISUSE_DISPLACEMENT64)738 else if (pParam->fUse & DISUSE_DISPLACEMENT64) 739 739 off2 = pParam->uDisp.i64; 740 740 else … … 744 744 } 745 745 746 if (fBase || (pParam->f lags& DISUSE_INDEX))746 if (fBase || (pParam->fUse & DISUSE_INDEX)) 747 747 { 748 748 PUT_C(off2 >= 0 ? '+' : '-'); … … 750 750 off2 = -off2; 751 751 } 752 if (pParam->f lags& DISUSE_DISPLACEMENT8)752 if (pParam->fUse & DISUSE_DISPLACEMENT8) 753 753 PUT_NUM_8( off2); 754 else if (pParam->f lags& DISUSE_DISPLACEMENT16)754 else if (pParam->fUse & DISUSE_DISPLACEMENT16) 755 755 PUT_NUM_16(off2); 756 else if (pParam->f lags& DISUSE_DISPLACEMENT32)756 else if (pParam->fUse & DISUSE_DISPLACEMENT32) 757 757 PUT_NUM_32(off2); 758 else if (pParam->f lags& DISUSE_DISPLACEMENT64)758 else if (pParam->fUse & DISUSE_DISPLACEMENT64) 759 759 PUT_NUM_64(off2); 760 760 else … … 765 765 } 766 766 767 if (DISUSE_IS_EFFECTIVE_ADDR(pParam->f lags))767 if (DISUSE_IS_EFFECTIVE_ADDR(pParam->fUse)) 768 768 PUT_C(']'); 769 769 break; … … 776 776 case 'I': /* Immediate data (ParseImmByte, ParseImmByteSX, ParseImmV, ParseImmUshort, ParseImmZ). */ 777 777 Assert(*pszFmt == 'b' || *pszFmt == 'v' || *pszFmt == 'w' || *pszFmt == 'z'); pszFmt++; 778 switch (pParam->f lags& ( DISUSE_IMMEDIATE8 | DISUSE_IMMEDIATE16 | DISUSE_IMMEDIATE32 | DISUSE_IMMEDIATE64779 778 switch (pParam->fUse & ( DISUSE_IMMEDIATE8 | DISUSE_IMMEDIATE16 | DISUSE_IMMEDIATE32 | DISUSE_IMMEDIATE64 779 | DISUSE_IMMEDIATE16_SX8 | DISUSE_IMMEDIATE32_SX8 | DISUSE_IMMEDIATE64_SX8)) 780 780 { 781 781 case DISUSE_IMMEDIATE8: … … 862 862 fFlags &= ~DIS_FMT_FLAGS_RELATIVE_BRANCH; 863 863 864 if (pParam->f lags& DISUSE_IMMEDIATE8_REL)864 if (pParam->fUse & DISUSE_IMMEDIATE8_REL) 865 865 { 866 866 if (fPrefix) … … 872 872 PUT_NUM_S8(offDisplacement); 873 873 } 874 else if (pParam->f lags& DISUSE_IMMEDIATE16_REL)874 else if (pParam->fUse & DISUSE_IMMEDIATE16_REL) 875 875 { 876 876 if (fPrefix) … … 887 887 PUT_SZ("near "); 888 888 offDisplacement = (int32_t)pParam->parval; 889 Assert(pParam->f lags& (DISUSE_IMMEDIATE32_REL|DISUSE_IMMEDIATE64_REL));889 Assert(pParam->fUse & (DISUSE_IMMEDIATE32_REL|DISUSE_IMMEDIATE64_REL)); 890 890 Assert(*pszFmt == 'v'); pszFmt++; 891 891 … … 938 938 PUT_SEGMENT_OVERRIDE(); 939 939 int rc = VERR_SYMBOL_NOT_FOUND; 940 switch (pParam->f lags& (DISUSE_IMMEDIATE_ADDR_16_16 | DISUSE_IMMEDIATE_ADDR_16_32 | DISUSE_DISPLACEMENT64 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT16))940 switch (pParam->fUse & (DISUSE_IMMEDIATE_ADDR_16_16 | DISUSE_IMMEDIATE_ADDR_16_32 | DISUSE_DISPLACEMENT64 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT16)) 941 941 { 942 942 case DISUSE_IMMEDIATE_ADDR_16_16: … … 1002 1002 PUT_SEGMENT_OVERRIDE(); 1003 1003 int rc = VERR_SYMBOL_NOT_FOUND; 1004 switch (pParam->f lags& (DISUSE_IMMEDIATE_ADDR_16_16 | DISUSE_IMMEDIATE_ADDR_16_32 | DISUSE_DISPLACEMENT64 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT16))1004 switch (pParam->fUse & (DISUSE_IMMEDIATE_ADDR_16_16 | DISUSE_IMMEDIATE_ADDR_16_32 | DISUSE_DISPLACEMENT64 | DISUSE_DISPLACEMENT32 | DISUSE_DISPLACEMENT16)) 1005 1005 { 1006 1006 case DISUSE_IMMEDIATE_ADDR_16_16: … … 1066 1066 PUT_SIZE_OVERRIDE(); 1067 1067 PUT_C('['); 1068 if (pParam->f lags& DISUSE_POINTER_DS_BASED)1068 if (pParam->fUse & DISUSE_POINTER_DS_BASED) 1069 1069 PUT_SZ("ds:"); 1070 1070 else … … 1281 1281 /* no effective address which it may apply to. */ 1282 1282 Assert((pCpu->prefix & DISPREFIX_SEG) || pCpu->mode == DISCPUMODE_64BIT); 1283 if ( !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param1.f lags)1284 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param2.f lags)1285 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param3.f lags))1283 if ( !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param1.fUse) 1284 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param2.fUse) 1285 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param3.fUse)) 1286 1286 return true; 1287 1287 } -
trunk/src/VBox/Disassembler/DisasmReg.cpp
r41676 r41678 268 268 { 269 269 /* Guess segment register by parameter type. */ 270 if (pParam->f lags& (DISUSE_REG_GEN32|DISUSE_REG_GEN64|DISUSE_REG_GEN16))270 if (pParam->fUse & (DISUSE_REG_GEN32|DISUSE_REG_GEN64|DISUSE_REG_GEN16)) 271 271 { 272 272 AssertCompile(USE_REG_ESP == USE_REG_RSP); … … 509 509 memset(pParamVal, 0, sizeof(*pParamVal)); 510 510 511 if (DISUSE_IS_EFFECTIVE_ADDR(pParam->f lags))511 if (DISUSE_IS_EFFECTIVE_ADDR(pParam->fUse)) 512 512 { 513 513 // Effective address … … 515 515 pParamVal->size = pParam->cb; 516 516 517 if (pParam->f lags& DISUSE_BASE)518 { 519 if (pParam->f lags& DISUSE_REG_GEN8)517 if (pParam->fUse & DISUSE_BASE) 518 { 519 if (pParam->fUse & DISUSE_REG_GEN8) 520 520 { 521 521 pParamVal->flags |= PARAM_VAL8; … … 523 523 } 524 524 else 525 if (pParam->f lags& DISUSE_REG_GEN16)525 if (pParam->fUse & DISUSE_REG_GEN16) 526 526 { 527 527 pParamVal->flags |= PARAM_VAL16; … … 529 529 } 530 530 else 531 if (pParam->f lags& DISUSE_REG_GEN32)531 if (pParam->fUse & DISUSE_REG_GEN32) 532 532 { 533 533 pParamVal->flags |= PARAM_VAL32; … … 535 535 } 536 536 else 537 if (pParam->f lags& DISUSE_REG_GEN64)537 if (pParam->fUse & DISUSE_REG_GEN64) 538 538 { 539 539 pParamVal->flags |= PARAM_VAL64; … … 547 547 } 548 548 // Note that scale implies index (SIB byte) 549 if (pParam->f lags& DISUSE_INDEX)550 { 551 if (pParam->f lags& DISUSE_REG_GEN16)549 if (pParam->fUse & DISUSE_INDEX) 550 { 551 if (pParam->fUse & DISUSE_REG_GEN16) 552 552 { 553 553 uint16_t val16; … … 556 556 if (RT_FAILURE(DISFetchReg16(pCtx, pParam->index.reg_gen, &val16))) return VERR_INVALID_PARAMETER; 557 557 558 Assert(!(pParam->f lags& DISUSE_SCALE)); /* shouldn't be possible in 16 bits mode */558 Assert(!(pParam->fUse & DISUSE_SCALE)); /* shouldn't be possible in 16 bits mode */ 559 559 560 560 pParamVal->val.val16 += val16; 561 561 } 562 562 else 563 if (pParam->f lags& DISUSE_REG_GEN32)563 if (pParam->fUse & DISUSE_REG_GEN32) 564 564 { 565 565 uint32_t val32; … … 568 568 if (RT_FAILURE(DISFetchReg32(pCtx, pParam->index.reg_gen, &val32))) return VERR_INVALID_PARAMETER; 569 569 570 if (pParam->f lags& DISUSE_SCALE)570 if (pParam->fUse & DISUSE_SCALE) 571 571 val32 *= pParam->scale; 572 572 … … 574 574 } 575 575 else 576 if (pParam->f lags& DISUSE_REG_GEN64)576 if (pParam->fUse & DISUSE_REG_GEN64) 577 577 { 578 578 uint64_t val64; … … 581 581 if (RT_FAILURE(DISFetchReg64(pCtx, pParam->index.reg_gen, &val64))) return VERR_INVALID_PARAMETER; 582 582 583 if (pParam->f lags& DISUSE_SCALE)583 if (pParam->fUse & DISUSE_SCALE) 584 584 val64 *= pParam->scale; 585 585 … … 590 590 } 591 591 592 if (pParam->f lags& DISUSE_DISPLACEMENT8)592 if (pParam->fUse & DISUSE_DISPLACEMENT8) 593 593 { 594 594 if (pCpu->mode == DISCPUMODE_32BIT) … … 601 601 } 602 602 else 603 if (pParam->f lags& DISUSE_DISPLACEMENT16)603 if (pParam->fUse & DISUSE_DISPLACEMENT16) 604 604 { 605 605 if (pCpu->mode == DISCPUMODE_32BIT) … … 612 612 } 613 613 else 614 if (pParam->f lags& DISUSE_DISPLACEMENT32)614 if (pParam->fUse & DISUSE_DISPLACEMENT32) 615 615 { 616 616 if (pCpu->mode == DISCPUMODE_32BIT) … … 620 620 } 621 621 else 622 if (pParam->f lags& DISUSE_DISPLACEMENT64)622 if (pParam->fUse & DISUSE_DISPLACEMENT64) 623 623 { 624 624 Assert(pCpu->mode == DISCPUMODE_64BIT); … … 626 626 } 627 627 else 628 if (pParam->f lags& DISUSE_RIPDISPLACEMENT32)628 if (pParam->fUse & DISUSE_RIPDISPLACEMENT32) 629 629 { 630 630 Assert(pCpu->mode == DISCPUMODE_64BIT); … … 635 635 } 636 636 637 if (pParam->f lags& (DISUSE_REG_GEN8|DISUSE_REG_GEN16|DISUSE_REG_GEN32|DISUSE_REG_GEN64|DISUSE_REG_FP|DISUSE_REG_MMX|DISUSE_REG_XMM|DISUSE_REG_CR|DISUSE_REG_DBG|DISUSE_REG_SEG|DISUSE_REG_TEST))637 if (pParam->fUse & (DISUSE_REG_GEN8|DISUSE_REG_GEN16|DISUSE_REG_GEN32|DISUSE_REG_GEN64|DISUSE_REG_FP|DISUSE_REG_MMX|DISUSE_REG_XMM|DISUSE_REG_CR|DISUSE_REG_DBG|DISUSE_REG_SEG|DISUSE_REG_TEST)) 638 638 { 639 639 if (parmtype == PARAM_DEST) … … 648 648 pParamVal->type = PARMTYPE_IMMEDIATE; 649 649 650 if (pParam->f lags& DISUSE_REG_GEN8)650 if (pParam->fUse & DISUSE_REG_GEN8) 651 651 { 652 652 pParamVal->flags |= PARAM_VAL8; … … 655 655 } 656 656 else 657 if (pParam->f lags& DISUSE_REG_GEN16)657 if (pParam->fUse & DISUSE_REG_GEN16) 658 658 { 659 659 pParamVal->flags |= PARAM_VAL16; … … 662 662 } 663 663 else 664 if (pParam->f lags& DISUSE_REG_GEN32)664 if (pParam->fUse & DISUSE_REG_GEN32) 665 665 { 666 666 pParamVal->flags |= PARAM_VAL32; … … 669 669 } 670 670 else 671 if (pParam->f lags& DISUSE_REG_GEN64)671 if (pParam->fUse & DISUSE_REG_GEN64) 672 672 { 673 673 pParamVal->flags |= PARAM_VAL64; … … 680 680 pParamVal->type = PARMTYPE_REGISTER; 681 681 } 682 Assert(!(pParam->f lags& DISUSE_IMMEDIATE));682 Assert(!(pParam->fUse & DISUSE_IMMEDIATE)); 683 683 return VINF_SUCCESS; 684 684 } 685 685 686 if (pParam->f lags& DISUSE_IMMEDIATE)686 if (pParam->fUse & DISUSE_IMMEDIATE) 687 687 { 688 688 pParamVal->type = PARMTYPE_IMMEDIATE; 689 if (pParam->f lags& (DISUSE_IMMEDIATE8|DISUSE_IMMEDIATE8_REL))689 if (pParam->fUse & (DISUSE_IMMEDIATE8|DISUSE_IMMEDIATE8_REL)) 690 690 { 691 691 pParamVal->flags |= PARAM_VAL8; … … 702 702 } 703 703 else 704 if (pParam->f lags& (DISUSE_IMMEDIATE16|DISUSE_IMMEDIATE16_REL|DISUSE_IMMEDIATE_ADDR_0_16|DISUSE_IMMEDIATE16_SX8))704 if (pParam->fUse & (DISUSE_IMMEDIATE16|DISUSE_IMMEDIATE16_REL|DISUSE_IMMEDIATE_ADDR_0_16|DISUSE_IMMEDIATE16_SX8)) 705 705 { 706 706 pParamVal->flags |= PARAM_VAL16; 707 707 pParamVal->size = sizeof(uint16_t); 708 708 pParamVal->val.val16 = (uint16_t)pParam->parval; 709 AssertMsg(pParamVal->size == pParam->cb || ((pParam->cb == 1) && (pParam->f lags& DISUSE_IMMEDIATE16_SX8)), ("pParamVal->size %d vs %d EIP=%RX32\n", pParamVal->size, pParam->cb, pCtx->eip) );710 } 711 else 712 if (pParam->f lags& (DISUSE_IMMEDIATE32|DISUSE_IMMEDIATE32_REL|DISUSE_IMMEDIATE_ADDR_0_32|DISUSE_IMMEDIATE32_SX8))709 AssertMsg(pParamVal->size == pParam->cb || ((pParam->cb == 1) && (pParam->fUse & DISUSE_IMMEDIATE16_SX8)), ("pParamVal->size %d vs %d EIP=%RX32\n", pParamVal->size, pParam->cb, pCtx->eip) ); 710 } 711 else 712 if (pParam->fUse & (DISUSE_IMMEDIATE32|DISUSE_IMMEDIATE32_REL|DISUSE_IMMEDIATE_ADDR_0_32|DISUSE_IMMEDIATE32_SX8)) 713 713 { 714 714 pParamVal->flags |= PARAM_VAL32; 715 715 pParamVal->size = sizeof(uint32_t); 716 716 pParamVal->val.val32 = (uint32_t)pParam->parval; 717 Assert(pParamVal->size == pParam->cb || ((pParam->cb == 1) && (pParam->f lags& DISUSE_IMMEDIATE32_SX8)) );718 } 719 else 720 if (pParam->f lags& (DISUSE_IMMEDIATE64 | DISUSE_IMMEDIATE64_REL | DISUSE_IMMEDIATE64_SX8))717 Assert(pParamVal->size == pParam->cb || ((pParam->cb == 1) && (pParam->fUse & DISUSE_IMMEDIATE32_SX8)) ); 718 } 719 else 720 if (pParam->fUse & (DISUSE_IMMEDIATE64 | DISUSE_IMMEDIATE64_REL | DISUSE_IMMEDIATE64_SX8)) 721 721 { 722 722 pParamVal->flags |= PARAM_VAL64; 723 723 pParamVal->size = sizeof(uint64_t); 724 724 pParamVal->val.val64 = pParam->parval; 725 Assert(pParamVal->size == pParam->cb || ((pParam->cb == 1) && (pParam->f lags& DISUSE_IMMEDIATE64_SX8)) );726 } 727 else 728 if (pParam->f lags& (DISUSE_IMMEDIATE_ADDR_16_16))725 Assert(pParamVal->size == pParam->cb || ((pParam->cb == 1) && (pParam->fUse & DISUSE_IMMEDIATE64_SX8)) ); 726 } 727 else 728 if (pParam->fUse & (DISUSE_IMMEDIATE_ADDR_16_16)) 729 729 { 730 730 pParamVal->flags |= PARAM_VALFARPTR16; … … 735 735 } 736 736 else 737 if (pParam->f lags& (DISUSE_IMMEDIATE_ADDR_16_32))737 if (pParam->fUse & (DISUSE_IMMEDIATE_ADDR_16_32)) 738 738 { 739 739 pParamVal->flags |= PARAM_VALFARPTR32; … … 767 767 { 768 768 NOREF(pCpu); 769 if (pParam->f lags& (DISUSE_REG_GEN8|DISUSE_REG_GEN16|DISUSE_REG_GEN32|DISUSE_REG_FP|DISUSE_REG_MMX|DISUSE_REG_XMM|DISUSE_REG_CR|DISUSE_REG_DBG|DISUSE_REG_SEG|DISUSE_REG_TEST))769 if (pParam->fUse & (DISUSE_REG_GEN8|DISUSE_REG_GEN16|DISUSE_REG_GEN32|DISUSE_REG_FP|DISUSE_REG_MMX|DISUSE_REG_XMM|DISUSE_REG_CR|DISUSE_REG_DBG|DISUSE_REG_SEG|DISUSE_REG_TEST)) 770 770 { 771 if (pParam->f lags& DISUSE_REG_GEN8)771 if (pParam->fUse & DISUSE_REG_GEN8) 772 772 { 773 773 uint8_t *pu8Reg; … … 780 780 } 781 781 else 782 if (pParam->f lags& DISUSE_REG_GEN16)782 if (pParam->fUse & DISUSE_REG_GEN16) 783 783 { 784 784 uint16_t *pu16Reg; … … 791 791 } 792 792 else 793 if (pParam->f lags& DISUSE_REG_GEN32)793 if (pParam->fUse & DISUSE_REG_GEN32) 794 794 { 795 795 uint32_t *pu32Reg; … … 802 802 } 803 803 else 804 if (pParam->f lags& DISUSE_REG_GEN64)804 if (pParam->fUse & DISUSE_REG_GEN64) 805 805 { 806 806 uint64_t *pu64Reg;
Note:
See TracChangeset
for help on using the changeset viewer.