VirtualBox

Changeset 41732 in vbox for trunk/src/VBox/VMM


Ignore:
Timestamp:
Jun 14, 2012 11:57:45 PM (13 years ago)
Author:
vboxsync
Message:

DISCPUSTATE::opsize -> cbInstr.

Location:
trunk/src/VBox/VMM
Files:
16 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/EMAll.cpp

    r41731 r41732  
    507507        if (RT_SUCCESS(rc))
    508508        {
    509             Assert(cbOp == pDis->opsize);
     509            Assert(cbOp == pDis->cbInstr);
    510510            uint32_t cbIgnored;
    511511            rc = emInterpretInstructionCPUOuter(pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_SUPERVISOR, &cbIgnored);
     
    561561        if (RT_SUCCESS(rc))
    562562        {
    563             Assert(cbOp == pDis->opsize);
     563            Assert(cbOp == pDis->cbInstr);
    564564            rc = emInterpretInstructionCPUOuter(pVCpu, pDis, pRegFrame, pvFault, EMCODETYPE_SUPERVISOR, pcbWritten);
    565565            if (RT_SUCCESS(rc))
     
    617617    VBOXSTRICTRC rc = emInterpretInstructionCPUOuter(pVCpu, pDis, pRegFrame, pvFault, enmCodeType, &cbIgnored);
    618618    if (RT_SUCCESS(rc))
    619         pRegFrame->rip += pDis->opsize; /* Move on to the next instruction. */
     619        pRegFrame->rip += pDis->cbInstr; /* Move on to the next instruction. */
    620620    return rc;
    621621#endif
     
    26882688    Assert(pvFault == SELMToFlat(pVM, DISSELREG_CS, pRegFrame, (RTGCPTR)pRegFrame->rip));
    26892689
    2690     pVCpu->em.s.GCPtrInhibitInterrupts = pRegFrame->eip + pDis->opsize;
     2690    pVCpu->em.s.GCPtrInhibitInterrupts = pRegFrame->eip + pDis->cbInstr;
    26912691    VMCPU_FF_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS);
    26922692
  • trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

    r41727 r41732  
    936936        pRegFrame->rcx--;
    937937    }
    938     pRegFrame->rip += pDis->opsize;
     938    pRegFrame->rip += pDis->cbInstr;
    939939
    940940    LogFlow(("pgmPoolAccessHandlerSTOSD: returns\n"));
  • trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp

    r40449 r41732  
    352352 * @param   pRegFrame   Pointer to the register frame for the trap.
    353353 * @param   iGate       Trap or interrupt gate number
    354  * @param   opsize      Instruction size (only relevant for software interrupts)
     354 * @param   cbInstr     Instruction size (only relevant for software interrupts)
    355355 * @param   enmError    TRPM_TRAP_HAS_ERRORCODE or TRPM_TRAP_NO_ERRORCODE.
    356356 * @param   enmType     TRPM event type
     
    358358 * @internal
    359359 */
    360 VMMDECL(int) TRPMForwardTrap(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t iGate, uint32_t opsize,
     360VMMDECL(int) TRPMForwardTrap(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t iGate, uint32_t cbInstr,
    361361                             TRPMERRORCODE enmError, TRPMEVENT enmType, int32_t iOrgTrap)
    362362{
     
    639639                    if (enmType == TRPM_SOFTWARE_INT)
    640640                    {
    641                         Assert(opsize);
    642                         pTrapStack[--idx] = pRegFrame->eip + opsize;    /* return address = next instruction */
     641                        Assert(cbInstr);
     642                        pTrapStack[--idx] = pRegFrame->eip + cbInstr;    /* return address = next instruction */
    643643                    }
    644644                    else
  • trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

    r41729 r41732  
    29872987            if (RT_SUCCESS(rc) && pDis->pCurInstr->opcode == OP_INVLPG)
    29882988            {
    2989                 Assert(cbOp == pDis->opsize);
     2989                Assert(cbOp == pDis->cbInstr);
    29902990                rc = hmR0svmInterpretInvlPg(pVCpu, pDis, pRegFrame, uASID);
    29912991                if (RT_SUCCESS(rc))
  • trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

    r41728 r41732  
    35533553
    35543554                    rc = VINF_SUCCESS;
    3555                     Assert(cbOp == pDis->opsize);
     3555                    Assert(cbOp == pDis->cbInstr);
    35563556                    switch (pDis->pCurInstr->opcode)
    35573557                    {
     
    35633563                    case OP_STI:
    35643564                        pCtx->eflags.Bits.u1IF = 1;
    3565                         EMSetInhibitInterruptsPC(pVCpu, pCtx->rip + pDis->opsize);
     3565                        EMSetInhibitInterruptsPC(pVCpu, pCtx->rip + pDis->cbInstr);
    35663566                        Assert(VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS));
    35673567                        rc2 = VMXWriteVMCS(VMX_VMCS32_GUEST_INTERRUPTIBILITY_STATE,
     
    35743574                        fUpdateRIP = false;
    35753575                        rc = VINF_EM_HALT;
    3576                         pCtx->rip += pDis->opsize;
     3576                        pCtx->rip += pDis->cbInstr;
    35773577                        STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatExitHlt);
    35783578                        break;
  • trunk/src/VBox/VMM/VMMR3/CSAM.cpp

    r41731 r41732  
    835835    case OP_CLI:
    836836    {
    837         uint32_t     cbInstr = 0;
    838         uint32_t     opsize  = pCpu->opsize;
    839         bool         fCode32 = pPage->fCode32;
     837        uint32_t     cbInstr = 0;
     838        uint32_t     cbCurInstr = pCpu->cbInstr;
     839        bool         fCode32    = pPage->fCode32;
    840840
    841841        Assert(fCode32);
     
    848848            DISCPUSTATE  cpu;
    849849
    850             if (cbInstr + opsize >= SIZEOF_NEARJUMP32)
     850            if (cbInstrs + cbCurInstr >= SIZEOF_NEARJUMP32)
    851851                break;
    852852
    853             if (csamIsCodeScanned(pVM, pCurInstrGC + opsize, &pPage) == true)
     853            if (csamIsCodeScanned(pVM, pCurInstrGC + cbCurInstr, &pPage) == true)
    854854            {
    855855                /* We've scanned the next instruction(s) already. This means we've followed a branch that ended up there before -> dangerous!! */
    856                 PATMR3DetectConflict(pVM, pCurInstrGC, pCurInstrGC + opsize);
     856                PATMR3DetectConflict(pVM, pCurInstrGC, pCurInstrGC + cbCurInstr);
    857857                break;
    858858            }
    859             pCurInstrGC += opsize;
    860             cbInstr     += opsize;
     859            pCurInstrGC += cbCurInstr;
     860            cbInstrs    += cbCurInstr;
    861861
    862862            {   /* Force pCurInstrHC out of scope after we stop using it (page lock!) */
     
    871871
    872872                rc = CSAMR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, (fCode32) ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
    873                                     &cpu, &opsize, NULL, 0);
     873                                    &cpu, &cbCurInstr, NULL, 0);
    874874            }
    875875            AssertRC(rc);
     
    10181018        {
    10191019            DISCPUSTATE  cpu;
    1020             uint32_t     opsize;
     1020            uint32_t     cbInstr;
    10211021            int          rc2;
    10221022#ifdef DEBUG
     
    10541054#ifdef DEBUG
    10551055                rc2 = CSAMR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, (fCode32) ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
    1056                                      &cpu, &opsize, szOutput, sizeof(szOutput));
     1056                                     &cpu, &cbInstr, szOutput, sizeof(szOutput));
    10571057                if (RT_SUCCESS(rc2)) Log(("CSAM Call Analysis: %s", szOutput));
    10581058#else
    10591059                rc2 = CSAMR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, (fCode32) ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
    1060                                      &cpu, &opsize, NULL, 0);
     1060                                     &cpu, &cbInstr, NULL, 0);
    10611061#endif
    10621062                STAM_PROFILE_STOP(&pVM->csam.s.StatTimeDisasm, a);
     
    10671067                }
    10681068
    1069                 STAM_COUNTER_ADD(&pVM->csam.s.StatNrBytesRead, opsize);
     1069                STAM_COUNTER_ADD(&pVM->csam.s.StatNrBytesRead, cbInstr);
    10701070
    10711071                RCPTRTYPE(uint8_t *) addr = 0;
    10721072                PCSAMPAGE pJmpPage = NULL;
    10731073
    1074                 if (PAGE_ADDRESS(pCurInstrGC) != PAGE_ADDRESS(pCurInstrGC + opsize - 1))
     1074                if (PAGE_ADDRESS(pCurInstrGC) != PAGE_ADDRESS(pCurInstrGC + cbInstr - 1))
    10751075                {
    1076                     if (!PGMGstIsPagePresent(pVM, pCurInstrGC + opsize - 1))
     1076                    if (!PGMGstIsPagePresent(pVM, pCurInstrGC + cbInstr - 1))
    10771077                    {
    10781078                        /// @todo fault in the page
     
    10811081                    }
    10821082                    //all is fine, let's continue
    1083                     csamR3CheckPageRecord(pVM, pCurInstrGC + opsize - 1);
     1083                    csamR3CheckPageRecord(pVM, pCurInstrGC + cbInstr - 1);
    10841084                }
    10851085
     
    11691169                }
    11701170                /* Mark it as scanned. */
    1171                 csamMarkCode(pVM, pPage, pCurInstrGC, opsize, true);
    1172                 pCurInstrGC += opsize;
     1171                csamMarkCode(pVM, pPage, pCurInstrGC, cbInstr, true);
     1172                pCurInstrGC += cbInstr;
    11731173            } /* for at most 16 instructions */
    11741174next_function:
     
    12021202    PCSAMPAGE pPage = (PCSAMPAGE)pUserData;
    12031203    int rc = VWRN_CONTINUE_ANALYSIS;
    1204     uint32_t opsize;
     1204    uint32_t cbInstr;
    12051205    int rc2;
    12061206    Assert(pVM->cCpus == 1);
     
    12671267#ifdef DEBUG
    12681268            rc2 = CSAMR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, fCode32 ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
    1269                                  &cpu, &opsize, szOutput, sizeof(szOutput));
     1269                                 &cpu, &cbInstr, szOutput, sizeof(szOutput));
    12701270            if (RT_SUCCESS(rc2)) Log(("CSAM Analysis: %s", szOutput));
    12711271#else
    12721272            rc2 = CSAMR3DISInstr(pVM, pCurInstrGC, pCurInstrHC, fCode32 ? DISCPUMODE_32BIT : DISCPUMODE_16BIT,
    1273                                  &cpu, &opsize, NULL, 0);
     1273                                 &cpu, &cbInstr, NULL, 0);
    12741274#endif
    12751275            STAM_PROFILE_STOP(&pVM->csam.s.StatTimeDisasm, a);
     
    12821282        }
    12831283
    1284         STAM_COUNTER_ADD(&pVM->csam.s.StatNrBytesRead, opsize);
    1285 
    1286         csamMarkCode(pVM, pPage, pCurInstrGC, opsize, true);
     1284        STAM_COUNTER_ADD(&pVM->csam.s.StatNrBytesRead, cbInstr);
     1285
     1286        csamMarkCode(pVM, pPage, pCurInstrGC, cbInstr, true);
    12871287
    12881288        RCPTRTYPE(uint8_t *) addr = 0;
    12891289        PCSAMPAGE pJmpPage = NULL;
    12901290
    1291         if (PAGE_ADDRESS(pCurInstrGC) != PAGE_ADDRESS(pCurInstrGC + opsize - 1))
    1292         {
    1293             if (!PGMGstIsPagePresent(pVCpu, pCurInstrGC + opsize - 1))
     1291        if (PAGE_ADDRESS(pCurInstrGC) != PAGE_ADDRESS(pCurInstrGC + cbInstr - 1))
     1292        {
     1293            if (!PGMGstIsPagePresent(pVCpu, pCurInstrGC + cbInstr - 1))
    12941294            {
    12951295                /// @todo fault in the page
     
    12991299            }
    13001300            //all is fine, let's continue
    1301             csamR3CheckPageRecord(pVM, pCurInstrGC + opsize - 1);
     1301            csamR3CheckPageRecord(pVM, pCurInstrGC + cbInstr - 1);
    13021302        }
    13031303        /*
     
    13171317            &&  pCacheRec->pCallExitRec->cInstrAfterRet < CSAM_MAX_CALLEXIT_RET)
    13181318        {
    1319             pCacheRec->pCallExitRec->pInstrAfterRetGC[pCacheRec->pCallExitRec->cInstrAfterRet] = pCurInstrGC + opsize;
     1319            pCacheRec->pCallExitRec->pInstrAfterRetGC[pCacheRec->pCallExitRec->cInstrAfterRet] = pCurInstrGC + cbInstr;
    13201320            pCacheRec->pCallExitRec->cInstrAfterRet++;
    13211321        }
     
    14631463            goto done;
    14641464        }
    1465         pCurInstrGC += opsize;
     1465        pCurInstrGC += cbInstr;
    14661466    }
    14671467done:
     
    21812181 * @param   pPage       Patch structure pointer
    21822182 * @param   pInstr      Instruction pointer
    2183  * @param   opsize      Instruction size
     2183 * @param   cbInstr      Instruction size
    21842184 * @param   fScanned    Mark as scanned or not
    21852185 */
    2186 static void csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTRCPTR pInstr, uint32_t opsize, bool fScanned)
    2187 {
    2188     LogFlow(("csamMarkCodeAsScanned %RRv opsize=%d\n", pInstr, opsize));
     2186static void csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTRCPTR pInstr, uint32_t cbInstr, bool fScanned)
     2187{
     2188    LogFlow(("csamMarkCodeAsScanned %RRv cbInstr=%d\n", pInstr, cbInstr));
    21892189    CSAMMarkPage(pVM, pInstr, fScanned);
    21902190
     
    21982198        if (ASMBitTest(pPage->pBitmap, pInstr & PAGE_OFFSET_MASK) == 0)
    21992199        {
    2200             pPage->uSize += opsize;
     2200            pPage->uSize += cbInstr;
    22012201            STAM_COUNTER_ADD(&pVM->csam.s.StatNrInstr, 1);
    22022202        }
     
    22202220 * @param   pVM         The VM to operate on.
    22212221 * @param   pInstr      Instruction pointer
    2222  * @param   opsize      Instruction size
     2222 * @param   cbInstr      Instruction size
    22232223 * @param   fScanned    Mark as scanned or not
    22242224 */
    2225 VMMR3DECL(int) CSAMR3MarkCode(PVM pVM, RTRCPTR pInstr, uint32_t opsize, bool fScanned)
     2225VMMR3DECL(int) CSAMR3MarkCode(PVM pVM, RTRCPTR pInstr, uint32_t cbInstr, bool fScanned)
    22262226{
    22272227    PCSAMPAGE pPage = 0;
     
    22362236    }
    22372237
    2238     Log(("CSAMR3MarkCode: %RRv size=%d fScanned=%d\n", pInstr, opsize, fScanned));
    2239     csamMarkCode(pVM, pPage, pInstr, opsize, fScanned);
     2238    Log(("CSAMR3MarkCode: %RRv size=%d fScanned=%d\n", pInstr, cbInstr, fScanned));
     2239    csamMarkCode(pVM, pPage, pInstr, cbInstr, fScanned);
    22402240    return VINF_SUCCESS;
    22412241}
  • trunk/src/VBox/VMM/VMMR3/DBGFDisas.cpp

    r41727 r41732  
    500500    else
    501501    {
    502         uint32_t cbBits = State.Cpu.opsize;
     502        uint32_t cbBits = State.Cpu.cbInstr;
    503503        uint8_t *pau8Bits = (uint8_t *)alloca(cbBits);
    504504        rc = dbgfR3DisasInstrRead(&State.Cpu, pau8Bits, GCPtr, cbBits);
     
    542542
    543543    if (pcbInstr)
    544         *pcbInstr = State.Cpu.opsize;
     544        *pcbInstr = State.Cpu.cbInstr;
    545545
    546546    dbgfR3DisasInstrDone(&State);
  • trunk/src/VBox/VMM/VMMR3/EMHwaccm.cpp

    r41727 r41732  
    354354        if (IOM_SUCCESS(rcStrict))
    355355        {
    356             pCtx->rip += Cpu.opsize;
     356            pCtx->rip += Cpu.cbInstr;
    357357            STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
    358358            return VBOXSTRICTRC_TODO(rcStrict);
  • trunk/src/VBox/VMM/VMMR3/EMRaw.cpp

    r41728 r41732  
    475475        if (IOM_SUCCESS(rcStrict))
    476476        {
    477             pCtx->rip += Cpu.opsize;
     477            pCtx->rip += Cpu.cbInstr;
    478478            STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
    479479            return VBOXSTRICTRC_TODO(rcStrict);
     
    10481048                case OP_CLI:
    10491049                    pCtx->eflags.u32 &= ~X86_EFL_IF;
    1050                     Assert(Cpu.opsize == 1);
    1051                     pCtx->rip += Cpu.opsize;
     1050                    Assert(Cpu.cbInstr == 1);
     1051                    pCtx->rip += Cpu.cbInstr;
    10521052                    STAM_PROFILE_STOP(&pVCpu->em.s.StatPrivEmu, a);
    10531053                    return VINF_EM_RESCHEDULE_REM; /* must go to the recompiler now! */
     
    10551055                case OP_STI:
    10561056                    pCtx->eflags.u32 |= X86_EFL_IF;
    1057                     EMSetInhibitInterruptsPC(pVCpu, pCtx->rip + Cpu.opsize);
    1058                     Assert(Cpu.opsize == 1);
    1059                     pCtx->rip += Cpu.opsize;
     1057                    EMSetInhibitInterruptsPC(pVCpu, pCtx->rip + Cpu.cbInstr);
     1058                    Assert(Cpu.cbInstr == 1);
     1059                    pCtx->rip += Cpu.cbInstr;
    10601060                    STAM_PROFILE_STOP(&pVCpu->em.s.StatPrivEmu, a);
    10611061                    return VINF_SUCCESS;
  • trunk/src/VBox/VMM/VMMR3/PATM.cpp

    r41731 r41732  
    14141414        {
    14151415            if (   pCurInstrGC > pPatch->pPrivInstrGC
    1416                 && pCurInstrGC + pCpu->opsize < pPatch->pPrivInstrGC + SIZEOF_NEARJUMP32) /* hardcoded patch jump size; cbPatchJump is still zero */
     1416                && pCurInstrGC + pCpu->cbInstr < pPatch->pPrivInstrGC + SIZEOF_NEARJUMP32) /* hardcoded patch jump size; cbPatchJump is still zero */
    14171417            {
    14181418                Log(("Dangerous unconditional jump ends in our generated patch jump!! (%x vs %x)\n", pCurInstrGC, pPatch->pPrivInstrGC));
     
    14491449    }
    14501450
    1451     pPatch->cbPatchBlockSize += pCpu->opsize;
     1451    pPatch->cbPatchBlockSize += pCpu->cbInstr;
    14521452
    14531453    /* Illegal instruction -> end of analysis phase for this code block */
     
    15141514    {
    15151515        /* The end marker for this kind of patch is any instruction at a location outside our patch jump. */
    1516         Log(("End of block at %RRv size %d\n", pCurInstrGC, pCpu->opsize));
     1516        Log(("End of block at %RRv size %d\n", pCurInstrGC, pCpu->cbInstr));
    15171517        return VINF_SUCCESS;
    15181518    }
     
    15911591    }
    15921592
    1593     pPatch->cbPatchBlockSize += pCpu->opsize;
     1593    pPatch->cbPatchBlockSize += pCpu->cbInstr;
    15941594
    15951595    /* Illegal instruction -> end of analysis phase for this code block */
     
    16811681    else
    16821682    if (pCurInstrGC > pPatch->pInstrGCHighest)
    1683         pPatch->pInstrGCHighest = pCurInstrGC + pCpu->opsize;
     1683        pPatch->pInstrGCHighest = pCurInstrGC + pCpu->cbInstr;
    16841684
    16851685    /* Illegal instruction -> end of recompile phase for this code block. */
     
    17901790            pPatch->flags   |= PATMFL_INHIBIT_IRQS | PATMFL_GENERATE_JUMPTOGUEST;
    17911791            fInhibitIRQInstr = true;
    1792             pNextInstrGC     = pCurInstrGC + pCpu->opsize;
     1792            pNextInstrGC     = pCurInstrGC + pCpu->cbInstr;
    17931793            Log(("Inhibit irqs for instruction OP_STI at %RRv\n", pCurInstrGC));
    17941794        }
     
    17981798        {
    17991799            DISCPUSTATE cpu = *pCpu;
    1800             unsigned    opsize;
     1800            unsigned    cbInstr;
    18011801            int         disret;
    18021802            RCPTRTYPE(uint8_t *) pReturnInstrGC;
     
    18041804            pPatch->flags |= PATMFL_FOUND_PATCHEND;
    18051805
    1806             pNextInstrGC = pCurInstrGC + pCpu->opsize;
     1806            pNextInstrGC = pCurInstrGC + pCpu->cbInstr;
    18071807            {   /* Force pNextInstrHC out of scope after using it */
    18081808                uint8_t *pNextInstrHC = PATMGCVirtToHCVirt(pVM, pCacheRec, pNextInstrGC);
     
    18141814
    18151815                // Disassemble the next instruction
    1816                 disret = patmR3DisInstr(pVM, pPatch, pNextInstrGC, pNextInstrHC, PATMREAD_ORGCODE, &cpu, &opsize);
     1816                disret = patmR3DisInstr(pVM, pPatch, pNextInstrGC, pNextInstrHC, PATMREAD_ORGCODE, &cpu, &cbInstr);
    18171817            }
    18181818            if (disret == false)
     
    18211821                return VERR_PATCHING_REFUSED;
    18221822            }
    1823             pReturnInstrGC = pNextInstrGC + opsize;
     1823            pReturnInstrGC = pNextInstrGC + cbInstr;
    18241824
    18251825            if (   (pPatch->flags & (PATMFL_DUPLICATE_FUNCTION))
     
    18481848    case OP_POPF:
    18491849    {
    1850         bool fGenerateJmpBack = (pCurInstrGC + pCpu->opsize - pInstrGC >= SIZEOF_NEARJUMP32);
     1850        bool fGenerateJmpBack = (pCurInstrGC + pCpu->cbInstr - pInstrGC >= SIZEOF_NEARJUMP32);
    18511851
    18521852        /* Not an exit point for IDT handler or function replacement patches */
     
    18551855            fGenerateJmpBack = false;
    18561856
    1857         rc = patmPatchGenPopf(pVM, pPatch, pCurInstrGC + pCpu->opsize, !!(pCpu->prefix & DISPREFIX_OPSIZE), fGenerateJmpBack);
     1857        rc = patmPatchGenPopf(pVM, pPatch, pCurInstrGC + pCpu->cbInstr, !!(pCpu->prefix & DISPREFIX_OPSIZE), fGenerateJmpBack);
    18581858        if (RT_SUCCESS(rc))
    18591859        {
     
    20242024    {
    20252025        int     rc2;
    2026         RTRCPTR pNextInstrGC = pCurInstrGC + pCpu->opsize;
     2026        RTRCPTR pNextInstrGC = pCurInstrGC + pCpu->cbInstr;
    20272027
    20282028        pPatch->flags &= ~PATMFL_INHIBIT_IRQS;
     
    20482048        // If single instruction patch, we've copied enough instructions *and* the current instruction is not a relative jump
    20492049        if (    (pPatch->flags & PATMFL_CHECK_SIZE)
    2050              &&  pCurInstrGC + pCpu->opsize - pInstrGC >= SIZEOF_NEARJUMP32
     2050             &&  pCurInstrGC + pCpu->cbInstr - pInstrGC >= SIZEOF_NEARJUMP32
    20512051             &&  !(pCpu->pCurInstr->optype & DISOPTYPE_RELATIVE_CONTROLFLOW)
    20522052             &&  !(pPatch->flags & PATMFL_RECOMPILE_NEXT) /* do not do this when the next instruction *must* be executed! */
    20532053           )
    20542054        {
    2055             RTRCPTR pNextInstrGC = pCurInstrGC + pCpu->opsize;
     2055            RTRCPTR pNextInstrGC = pCurInstrGC + pCpu->cbInstr;
    20562056
    20572057            // The end marker for this kind of patch is any instruction at a location outside our patch jump
    2058             Log(("patmRecompileCallback: end found for single instruction patch at %RRv opsize %d\n", pNextInstrGC, pCpu->opsize));
     2058            Log(("patmRecompileCallback: end found for single instruction patch at %RRv cbInstr %d\n", pNextInstrGC, pCpu->cbInstr));
    20592059
    20602060            rc = patmPatchGenJumpToGuest(pVM, pPatch, pNextInstrGC);
     
    21792179    PPATCHINFO pPatch = (PPATCHINFO)pCacheRec->pPatch;
    21802180    int rc = VWRN_CONTINUE_ANALYSIS;
    2181     uint32_t opsize, delta;
     2181    uint32_t cbInstr, delta;
    21822182    R3PTRTYPE(uint8_t *) pCurInstrHC = 0;
    21832183    bool disret;
     
    21992199
    22002200        disret = patmR3DisInstrToStr(pVM, pPatch, pCurInstrGC, pCurInstrHC, PATMREAD_RAWCODE,
    2201                                      &cpu, &opsize, szOutput, sizeof(szOutput));
     2201                                     &cpu, &cbInstr, szOutput, sizeof(szOutput));
    22022202        if (PATMIsPatchGCAddr(pVM, pCurInstrGC))
    22032203        {
     
    22832283            rc = VWRN_CONTINUE_ANALYSIS;
    22842284        }
    2285         pCurInstrGC += opsize;
     2285        pCurInstrGC += cbInstr;
    22862286    }
    22872287end:
     
    23492349    PPATCHINFO pPatch = (PPATCHINFO)pCacheRec->pPatch;
    23502350    int rc = VWRN_CONTINUE_ANALYSIS;
    2351     uint32_t opsize;
     2351    uint32_t cbInstr;
    23522352    R3PTRTYPE(uint8_t *) pCurInstrHC = 0;
    23532353    bool disret;
     
    23662366#ifdef LOG_ENABLED
    23672367        disret = patmR3DisInstrToStr(pVM, pPatch, pCurInstrGC, pCurInstrHC, PATMREAD_ORGCODE,
    2368                                      &cpu, &opsize, szOutput, sizeof(szOutput));
     2368                                     &cpu, &cbInstr, szOutput, sizeof(szOutput));
    23692369        Log(("Recompile: %s", szOutput));
    23702370#else
    2371         disret = patmR3DisInstr(pVM, pPatch, pCurInstrGC, pCurInstrHC, PATMREAD_ORGCODE, &cpu, &opsize);
     2371        disret = patmR3DisInstr(pVM, pPatch, pCurInstrGC, pCurInstrHC, PATMREAD_ORGCODE, &cpu, &cbInstr);
    23722372#endif
    23732373        if (disret == false)
     
    23922392                uint32_t    opsizenext;
    23932393                uint8_t *pNextInstrHC;
    2394                 RTRCPTR  pNextInstrGC = pCurInstrGC + opsize;
     2394                RTRCPTR  pNextInstrGC = pCurInstrGC + cbInstr;
    23952395
    23962396                Log(("patmRecompileCodeStream: irqs inhibited by instruction %RRv\n", pNextInstrGC));
     
    24732473                Log(("patmRecompileCodeStream continue passed conditional jump\n"));
    24742474                /* First we need to finish this linear code stream until the next exit point. */
    2475                 rc = patmRecompileCodeStream(pVM, pInstrGC, pCurInstrGC+opsize, pfnPATMR3Recompile, pCacheRec);
     2475                rc = patmRecompileCodeStream(pVM, pInstrGC, pCurInstrGC+cbInstr, pfnPATMR3Recompile, pCacheRec);
    24762476                if (RT_FAILURE(rc))
    24772477                {
     
    25222522            goto end;
    25232523        }
    2524         pCurInstrGC += opsize;
     2524        pCurInstrGC += cbInstr;
    25252525    }
    25262526end:
     
    26312631    DISCPUSTATE cpu;
    26322632    char szOutput[256];
    2633     uint32_t opsize, i = 0;
     2633    uint32_t cbInstr, i = 0;
    26342634    bool disret;
    26352635
     
    26372637    {
    26382638        disret = patmR3DisInstrToStr(pVM, pPatch, pPatch->pPrivInstrGC + i, NULL, PATMREAD_ORGCODE,
    2639                                      &cpu, &opsize, szOutput, sizeof(szOutput));
     2639                                     &cpu, &cbInstr, szOutput, sizeof(szOutput));
    26402640        if (disret == false)
    26412641            break;
    26422642
    26432643        Log(("Org patch jump: %s", szOutput));
    2644         Assert(opsize);
    2645         i += opsize;
     2644        Assert(cbInstr);
     2645        i += cbInstr;
    26462646    }
    26472647#endif
     
    26562656        {
    26572657            disret = patmR3DisInstrToStr(pVM, pPatch, pPatch->pPrivInstrGC + i, NULL, PATMREAD_ORGCODE,
    2658                                          &cpu, &opsize, szOutput, sizeof(szOutput));
     2658                                         &cpu, &cbInstr, szOutput, sizeof(szOutput));
    26592659            if (disret == false)
    26602660                break;
    26612661
    26622662            Log(("Org instr: %s", szOutput));
    2663             Assert(opsize);
    2664             i += opsize;
     2663            Assert(cbInstr);
     2664            i += cbInstr;
    26652665        }
    26662666    }
     
    29632963    bool disret;
    29642964    DISCPUSTATE cpuPush, cpuJmp;
    2965     uint32_t opsize;
     2965    uint32_t cbInstr;
    29662966    RTRCPTR  pCurInstrGC = pInstrGC;
    29672967    uint8_t *pCurInstrHC, *pInstrHC;
     
    29762976     * condition here and only patch the common entypoint once.
    29772977     */
    2978     disret = patmR3DisInstr(pVM, pPatch, pCurInstrGC, pCurInstrHC, PATMREAD_ORGCODE, &cpuPush, &opsize);
     2978    disret = patmR3DisInstr(pVM, pPatch, pCurInstrGC, pCurInstrHC, PATMREAD_ORGCODE, &cpuPush, &cbInstr);
    29792979    Assert(disret);
    29802980    if (disret && cpuPush.pCurInstr->opcode == OP_PUSH)
     
    29822982        RTRCPTR  pJmpInstrGC;
    29832983        int      rc;
    2984         pCurInstrGC += opsize;
    2985 
    2986         disret = patmR3DisInstr(pVM, pPatch, pCurInstrGC, pCurInstrHC, PATMREAD_ORGCODE, &cpuJmp, &opsize);
     2984        pCurInstrGC += cbInstr;
     2985
     2986        disret = patmR3DisInstr(pVM, pPatch, pCurInstrGC, pCurInstrHC, PATMREAD_ORGCODE, &cpuJmp, &cbInstr);
    29872987        if (   disret
    29882988            && cpuJmp.pCurInstr->opcode == OP_JMP
     
    35693569    RTRCPTR       pTargetGC;
    35703570    PPATMPATCHREC pPatchFunction;
    3571     uint32_t      opsize;
     3571    uint32_t      cbInstr;
    35723572    bool          disret;
    35733573
    35743574    Assert(pPatch->flags & PATMFL_REPLACE_FUNCTION_CALL);
    3575     Assert((pCpu->pCurInstr->opcode == OP_CALL || pCpu->pCurInstr->opcode == OP_JMP) && pCpu->opsize == SIZEOF_NEARJUMP32);
    3576 
    3577     if ((pCpu->pCurInstr->opcode != OP_CALL && pCpu->pCurInstr->opcode != OP_JMP) || pCpu->opsize != SIZEOF_NEARJUMP32)
     3575    Assert((pCpu->pCurInstr->opcode == OP_CALL || pCpu->pCurInstr->opcode == OP_JMP) && pCpu->cbInstr == SIZEOF_NEARJUMP32);
     3576
     3577    if ((pCpu->pCurInstr->opcode != OP_CALL && pCpu->pCurInstr->opcode != OP_JMP) || pCpu->cbInstr != SIZEOF_NEARJUMP32)
    35783578    {
    35793579        rc = VERR_PATCHING_REFUSED;
     
    36043604                break;
    36053605
    3606             disret = patmR3DisInstr(pVM, pPatch, pTargetGC, pTmpInstrHC, PATMREAD_ORGCODE, &cpu, &opsize);
     3606            disret = patmR3DisInstr(pVM, pPatch, pTargetGC, pTmpInstrHC, PATMREAD_ORGCODE, &cpu, &cbInstr);
    36073607            if (disret == false || cpu.pCurInstr->opcode != OP_JMP)
    36083608                break;
     
    36393639    /* Lowest and highest address for write monitoring. */
    36403640    pPatch->pInstrGCLowest  = pInstrGC;
    3641     pPatch->pInstrGCHighest = pInstrGC + pCpu->opsize;
     3641    pPatch->pInstrGCHighest = pInstrGC + pCpu->cbInstr;
    36423642    PATM_LOG_ORG_PATCH_INSTR(pVM, pPatch, "Call");
    36433643
     
    36843684
    36853685    /* Add relocation record for cached data access. */
    3686     if (patmPatchAddReloc32(pVM, pPatch, &pPB[pCpu->opsize - sizeof(RTRCPTR)], FIXUP_ABSOLUTE, pPatch->pPrivInstrGC, pVM->patm.s.mmio.pCachedData) != VINF_SUCCESS)
     3686    if (patmPatchAddReloc32(pVM, pPatch, &pPB[pCpu->cbInstr - sizeof(RTRCPTR)], FIXUP_ABSOLUTE, pPatch->pPrivInstrGC, pVM->patm.s.mmio.pCachedData) != VINF_SUCCESS)
    36873687    {
    36883688        Log(("Relocation failed for cached mmio address!!\n"));
     
    36983698
    36993699    /* Replace address with that of the cached item. */
    3700     rc = PGMPhysSimpleDirtyWriteGCPtr(VMMGetCpu0(pVM), pInstrGC + pCpu->opsize - sizeof(RTRCPTR), &pVM->patm.s.mmio.pCachedData, sizeof(RTRCPTR));
     3700    rc = PGMPhysSimpleDirtyWriteGCPtr(VMMGetCpu0(pVM), pInstrGC + pCpu->cbInstr - sizeof(RTRCPTR), &pVM->patm.s.mmio.pCachedData, sizeof(RTRCPTR));
    37013701    AssertRC(rc);
    37023702    if (RT_FAILURE(rc))
     
    37333733{
    37343734    DISCPUSTATE   cpu;
    3735     uint32_t      opsize;
     3735    uint32_t      cbInstr;
    37363736    bool          disret;
    37373737    uint8_t      *pInstrHC;
     
    37453745    /* Disassemble mmio instruction. */
    37463746    disret = patmR3DisInstrNoStrOpMode(pVM, pPatch, pInstrGC, pInstrHC, PATMREAD_ORGCODE,
    3747                                        &cpu, &opsize);
     3747                                       &cpu, &cbInstr);
    37483748    if (disret == false)
    37493749    {
     
    37523752    }
    37533753
    3754     AssertMsg(opsize <= MAX_INSTR_SIZE, ("privileged instruction too big %d!!\n", opsize));
    3755     if (opsize > MAX_INSTR_SIZE)
     3754    AssertMsg(cbInstr <= MAX_INSTR_SIZE, ("privileged instruction too big %d!!\n", cbInstr));
     3755    if (cbInstr > MAX_INSTR_SIZE)
    37563756        return VERR_PATCHING_REFUSED;
    37573757    if (cpu.param2.fUse != DISUSE_DISPLACEMENT32)
     
    37593759
    37603760    /* Add relocation record for cached data access. */
    3761     if (patmPatchAddReloc32(pVM, pPatch, &pInstrHC[cpu.opsize - sizeof(RTRCPTR)], FIXUP_ABSOLUTE) != VINF_SUCCESS)
     3761    if (patmPatchAddReloc32(pVM, pPatch, &pInstrHC[cpu.cbInstr - sizeof(RTRCPTR)], FIXUP_ABSOLUTE) != VINF_SUCCESS)
    37623762    {
    37633763        Log(("Relocation failed for cached mmio address!!\n"));
     
    37653765    }
    37663766    /* Replace address with that of the cached item. */
    3767     *(RTRCPTR *)&pInstrHC[cpu.opsize - sizeof(RTRCPTR)] = pVM->patm.s.mmio.pCachedData;
     3767    *(RTRCPTR *)&pInstrHC[cpu.cbInstr - sizeof(RTRCPTR)] = pVM->patm.s.mmio.pCachedData;
    37683768
    37693769    /* Lowest and highest address for write monitoring. */
    37703770    pPatch->pInstrGCLowest  = pInstrGC;
    3771     pPatch->pInstrGCHighest = pInstrGC + cpu.opsize;
     3771    pPatch->pInstrGCHighest = pInstrGC + cpu.cbInstr;
    37723772
    37733773    PATM_LOG_ORG_PATCH_INSTR(pVM, pPatch, "MMIO");
     
    38593859    /* Lowest and highest address for write monitoring. */
    38603860    pPatch->pInstrGCLowest  = pInstrGC;
    3861     pPatch->pInstrGCHighest = pInstrGC + pCpu->opsize;
     3861    pPatch->pInstrGCHighest = pInstrGC + pCpu->cbInstr;
    38623862
    38633863    pPatch->uState = PATCH_ENABLED;
     
    39213921            goto failure;
    39223922
    3923         Assert(pCpu->opsize == SIZEOF_NEARJUMP32 || pCpu->opsize == SIZEOF_NEAR_COND_JUMP32);
    3924         if (pCpu->opsize != SIZEOF_NEARJUMP32 && pCpu->opsize != SIZEOF_NEAR_COND_JUMP32)
     3923        Assert(pCpu->cbInstr == SIZEOF_NEARJUMP32 || pCpu->cbInstr == SIZEOF_NEAR_COND_JUMP32);
     3924        if (pCpu->cbInstr != SIZEOF_NEARJUMP32 && pCpu->cbInstr != SIZEOF_NEAR_COND_JUMP32)
    39253925            goto failure;
    39263926
    3927         if (PAGE_ADDRESS(pInstrGC) != PAGE_ADDRESS(pInstrGC + pCpu->opsize))
     3927        if (PAGE_ADDRESS(pInstrGC) != PAGE_ADDRESS(pInstrGC + pCpu->cbInstr))
    39283928        {
    39293929            STAM_COUNTER_INC(&pVM->patm.s.StatPageBoundaryCrossed);
     
    39403940
    39413941    // make a copy of the guest code bytes that will be overwritten
    3942     Assert(pCpu->opsize <= sizeof(pPatch->aPrivInstr));
    3943     Assert(pCpu->opsize >= SIZEOF_NEARJUMP32);
    3944     pPatch->cbPatchJump = pCpu->opsize;
     3942    Assert(pCpu->cbInstr <= sizeof(pPatch->aPrivInstr));
     3943    Assert(pCpu->cbInstr >= SIZEOF_NEARJUMP32);
     3944    pPatch->cbPatchJump = pCpu->cbInstr;
    39453945
    39463946    rc = PGMPhysSimpleReadGCPtr(VMMGetCpu0(pVM), pPatch->aPrivInstr, pPatch->pPrivInstrGC, pPatch->cbPatchJump);
     
    39523952     * references the target instruction in the conflict patch.
    39533953     */
    3954     RTRCPTR pJmpDest = PATMR3GuestGCPtrToPatchGCPtr(pVM, pInstrGC + pCpu->opsize + (int32_t)pCpu->param1.parval);
    3955 
    3956     AssertMsg(pJmpDest, ("PATMR3GuestGCPtrToPatchGCPtr failed for %RRv\n", pInstrGC + pCpu->opsize + (int32_t)pCpu->param1.parval));
     3954    RTRCPTR pJmpDest = PATMR3GuestGCPtrToPatchGCPtr(pVM, pInstrGC + pCpu->cbInstr + (int32_t)pCpu->param1.parval);
     3955
     3956    AssertMsg(pJmpDest, ("PATMR3GuestGCPtrToPatchGCPtr failed for %RRv\n", pInstrGC + pCpu->cbInstr + (int32_t)pCpu->param1.parval));
    39573957    pPatch->pPatchJumpDestGC = pJmpDest;
    39583958
     
    40264026    DISCPUSTATE cpu;
    40274027    R3PTRTYPE(uint8_t *) pInstrHC;
    4028     uint32_t opsize;
     4028    uint32_t cbInstr;
    40294029    PPATMPATCHREC pPatchRec;
    40304030    PCPUMCTX pCtx = 0;
     
    42424242    }
    42434243
    4244     disret = patmR3DisInstrNoStrOpMode(pVM, &pPatchRec->patch, pInstrGC, NULL, PATMREAD_ORGCODE, &cpu, &opsize);
     4244    disret = patmR3DisInstrNoStrOpMode(pVM, &pPatchRec->patch, pInstrGC, NULL, PATMREAD_ORGCODE, &cpu, &cbInstr);
    42454245    if (disret == false)
    42464246    {
     
    42494249    }
    42504250
    4251     AssertMsg(opsize <= MAX_INSTR_SIZE, ("privileged instruction too big %d!!\n", opsize));
    4252     if (opsize > MAX_INSTR_SIZE)
     4251    AssertMsg(cbInstr <= MAX_INSTR_SIZE, ("privileged instruction too big %d!!\n", cbInstr));
     4252    if (cbInstr > MAX_INSTR_SIZE)
    42534253        return VERR_PATCHING_REFUSED;
    42544254
    4255     pPatchRec->patch.cbPrivInstr = opsize;
     4255    pPatchRec->patch.cbPrivInstr = cbInstr;
    42564256    pPatchRec->patch.opcode      = cpu.pCurInstr->opcode;
    42574257
     
    43084308            pPatchRec->patch.flags |= PATMFL_IDTHANDLER;    /* we treat a sysenter handler as an IDT handler */
    43094309
    4310         rc = patmIdtHandler(pVM, pInstrGC, opsize, pPatchRec, &cacheRec);
     4310        rc = patmIdtHandler(pVM, pInstrGC, cbInstr, pPatchRec, &cacheRec);
    43114311#ifdef VBOX_WITH_STATISTICS
    43124312        if (    rc == VINF_SUCCESS
     
    43844384        case OP_CLI:
    43854385            Log(("PATMR3InstallPatch %s %RRv code32=%d\n", patmGetInstructionString(pPatchRec->patch.opcode, pPatchRec->patch.flags), pInstrGC, (flags & PATMFL_CODE32) ? 1 : 0));
    4386             rc = PATMR3PatchBlock(pVM, pInstrGC, pInstrHC, cpu.pCurInstr->opcode, opsize, pPatchRec);
     4386            rc = PATMR3PatchBlock(pVM, pInstrGC, pInstrHC, cpu.pCurInstr->opcode, cbInstr, pPatchRec);
    43874387            break;
    43884388
     
    44934493        DISCPUSTATE cpu;
    44944494        bool        disret;
    4495         uint32_t    opsize;
    4496 
    4497         disret = patmR3DisInstr(pVM, pPatch, pInstrGC, pInstrHC, PATMREAD_ORGCODE | PATMREAD_NOCHECK, &cpu, &opsize);
     4495        uint32_t    cbInstr;
     4496
     4497        disret = patmR3DisInstr(pVM, pPatch, pInstrGC, pInstrHC, PATMREAD_ORGCODE | PATMREAD_NOCHECK, &cpu, &cbInstr);
    44984498        PGMPhysReleasePageMappingLock(pVM, &Lock);
    44994499        if (disret)
    4500             return opsize;
     4500            return cbInstr;
    45014501    }
    45024502    return 0;
     
    51875187    DISCPUSTATE          cpu;
    51885188    R3PTRTYPE(uint8_t *) pInstrHC;
    5189     uint32_t             opsize;
     5189    uint32_t             cbInstr;
    51905190    bool                 disret;
    51915191    int                  rc;
     
    51935193    RT_ZERO(patch);
    51945194    pInstrHC = PATMGCVirtToHCVirt(pVM, &patch, pInstrGC);
    5195     disret = patmR3DisInstr(pVM, &patch, pInstrGC, pInstrHC, PATMREAD_ORGCODE, &cpu, &opsize);
     5195    disret = patmR3DisInstr(pVM, &patch, pInstrGC, pInstrHC, PATMREAD_ORGCODE, &cpu, &cbInstr);
    51965196    /*
    51975197     * If it's a 5 byte relative jump, then we can work around the problem by replacing the 32 bits relative offset
     
    53355335                        DISCPUSTATE cpu;
    53365336                        char szOutput[256];
    5337                         uint32_t opsize;
     5337                        uint32_t cbInstr;
    53385338                        uint32_t i = 0;
    53395339                        bool disret;
     
    53415341                        {
    53425342                            disret = patmR3DisInstrToStr(pVM, pPatch, pPatch->pPrivInstrGC + i, NULL, PATMREAD_ORGCODE,
    5343                                                          &cpu, &opsize, szOutput, sizeof(szOutput));
     5343                                                         &cpu, &cbInstr, szOutput, sizeof(szOutput));
    53445344                            Log(("Renewed patch instr: %s", szOutput));
    5345                             i += opsize;
     5345                            i += cbInstr;
    53465346                        }
    53475347                    }
     
    60206020        {
    60216021            if (RT_SUCCESS(rc))
    6022                 cbDirty += CpuOld.opsize;
     6022                cbDirty += CpuOld.cbInstr;
    60236023            else
    60246024            if (!cbDirty)
     
    60406040        pPatchToGuestRec = NULL;
    60416041
    6042         pCurPatchInstrGC += CpuOld.opsize;
    6043         cbDirty          += CpuOld.opsize;
     6042        pCurPatchInstrGC += CpuOld.cbInstr;
     6043        cbDirty          += CpuOld.cbInstr;
    60446044
    60456045        /* Let's see if there's another dirty instruction right after. */
     
    60866086            /* If the instruction is completely harmless (which implies a 1:1 patch copy). */
    60876087            if (    rc == VINF_SUCCESS
    6088                 &&  CpuNew.opsize <= cbLeft /* must still fit */
     6088                &&  CpuNew.cbInstr <= cbLeft /* must still fit */
    60896089                &&  fValidInstr
    60906090               )
     
    60986098
    60996099                /* Copy the new instruction. */
    6100                 rc = PGMPhysSimpleReadGCPtr(VMMGetCpu0(pVM), pCurPatchInstrHC, pCurInstrGC, CpuNew.opsize);
     6100                rc = PGMPhysSimpleReadGCPtr(VMMGetCpu0(pVM), pCurPatchInstrHC, pCurInstrGC, CpuNew.cbInstr);
    61016101                AssertRC(rc);
    61026102
     
    61196119                break;
    61206120            }
    6121             pCurInstrGC      += CpuNew.opsize;
    6122             pCurPatchInstrHC += CpuNew.opsize;
    6123             pCurPatchInstrGC += CpuNew.opsize;
    6124             cbLeft           -= CpuNew.opsize;
     6121            pCurInstrGC      += CpuNew.cbInstr;
     6122            pCurPatchInstrHC += CpuNew.cbInstr;
     6123            pCurPatchInstrGC += CpuNew.cbInstr;
     6124            cbLeft           -= CpuNew.cbInstr;
    61256125
    61266126            /* Check if we expanded a complex guest instruction into a patch stream (e.g. call) */
     
    64026402        DISCPUSTATE cpu;
    64036403        bool        disret;
    6404         uint32_t    opsize;
     6404        uint32_t    cbInstr;
    64056405        PATMP2GLOOKUPREC cacheRec;
    64066406        RT_ZERO(cacheRec);
     
    64086408
    64096409        disret = patmR3DisInstr(pVM, &pPatch->patch, pNewEip, PATMGCVirtToHCVirt(pVM, &cacheRec, pNewEip), PATMREAD_RAWCODE,
    6410                                 &cpu, &opsize);
     6410                                &cpu, &cbInstr);
    64116411        if (cacheRec.Lock.pvMap)
    64126412            PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
     
    64416441        DISCPUSTATE cpu;
    64426442        bool        disret;
    6443         uint32_t    opsize;
     6443        uint32_t    cbInstr;
    64446444        PATMP2GLOOKUPREC cacheRec;
    64456445        RT_ZERO(cacheRec);
     
    64476447
    64486448        disret = patmR3DisInstr(pVM, &pPatch->patch, pNewEip, PATMGCVirtToHCVirt(pVM, &cacheRec, pNewEip), PATMREAD_ORGCODE,
    6449                                 &cpu, &opsize);
     6449                                &cpu, &cbInstr);
    64506450        if (cacheRec.Lock.pvMap)
    64516451            PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
     
    64556455            cpu.mode = (pPatch->patch.flags & PATMFL_CODE32) ? DISCPUMODE_32BIT : DISCPUMODE_16BIT;
    64566456            disret = patmR3DisInstr(pVM, &pPatch->patch, pNewEip, PATMGCVirtToHCVirt(pVM, &cacheRec, pNewEip), PATMREAD_RAWCODE,
    6457                                     &cpu, &opsize);
     6457                                    &cpu, &cbInstr);
    64586458            if (cacheRec.Lock.pvMap)
    64596459                PGMPhysReleasePageMappingLock(pVM, &cacheRec.Lock);
  • trunk/src/VBox/VMM/VMMR3/PATMPatch.cpp

    r41728 r41732  
    421421    PATCHGEN_PROLOG(pVM, pPatch);
    422422
    423     uint32_t const cbInstrShutUpGcc = pCpu->opsize;
     423    uint32_t const cbInstrShutUpGcc = pCpu->cbInstr;
    424424    rc = patmPatchReadBytes(pVM, pPB, pCurInstrGC, cbInstrShutUpGcc);
    425425    AssertRC(rc);
     
    712712            i++;    //skip segment prefix
    713713
    714         rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);
     714        rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->cbInstr - i);
    715715        AssertRCReturn(rc, rc);
    716         offset += (pCpu->opsize - i);
     716        offset += (pCpu->cbInstr - i);
    717717    }
    718718    else
     
    725725
    726726        /* Relative call to patch code (patch to patch -> no fixup). */
    727         Log(("PatchGenCall from %RRv (next=%RRv) to %RRv\n", pCurInstrGC, pCurInstrGC + pCpu->opsize, pTargetGC));
     727        Log(("PatchGenCall from %RRv (next=%RRv) to %RRv\n", pCurInstrGC, pCurInstrGC + pCpu->cbInstr, pTargetGC));
    728728
    729729        /* We push it onto the stack here, so the guest's context isn't ruined when this happens to cause
     
    749749    /* 3: Generate code to lookup address in our local cache; call hypervisor PATM code if it can't be located. */
    750750    PATCHGEN_PROLOG_NODEF(pVM, pPatch);
    751     callInfo.pReturnGC      = pCurInstrGC + pCpu->opsize;
     751    callInfo.pReturnGC      = pCurInstrGC + pCpu->cbInstr;
    752752    callInfo.pTargetGC      = (fIndirect) ? 0xDEADBEEF : pTargetGC;
    753753    size = patmPatchGenCode(pVM, pPatch, pPB, (fIndirect) ? &PATMCallIndirectRecord : &PATMCallRecord, 0, false, &callInfo);
     
    809809        i++;    //skip segment prefix
    810810
    811     rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);
     811    rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->cbInstr - i);
    812812    AssertRCReturn(rc, rc);
    813     offset += (pCpu->opsize - i);
     813    offset += (pCpu->cbInstr - i);
    814814
    815815    /* align this block properly to make sure the jump table will not be misaligned. */
     
    826826    /* 3: Generate code to lookup address in our local cache; call hypervisor PATM code if it can't be located. */
    827827    PATCHGEN_PROLOG_NODEF(pVM, pPatch);
    828     callInfo.pReturnGC      = pCurInstrGC + pCpu->opsize;
     828    callInfo.pReturnGC      = pCurInstrGC + pCpu->cbInstr;
    829829    callInfo.pTargetGC      = 0xDEADBEEF;
    830830    size = patmPatchGenCode(pVM, pPatch, pPB, &PATMJumpIndirectRecord, 0, false, &callInfo);
     
    13751375            i++;    //skip segment prefix
    13761376
    1377         rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);
     1377        rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->cbInstr - i);
    13781378        AssertRCReturn(rc, rc);
    1379         offset += (pCpu->opsize - i);
     1379        offset += (pCpu->cbInstr - i);
    13801380
    13811381        pPB[offset++] = 0x66;              // mov       ax, CPUMCTX.tr/ldtr
     
    14691469    if (pCpu->prefix == DISPREFIX_SEG)
    14701470        i++;    //skip segment prefix
    1471     rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);
     1471    rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->cbInstr - i);
    14721472    AssertRCReturn(rc, rc);
    1473     offset += (pCpu->opsize - i);
     1473    offset += (pCpu->cbInstr - i);
    14741474
    14751475    pPB[offset++] = 0x66;              // mov       ax, CPUMCTX.gdtr.limit
  • trunk/src/VBox/VMM/VMMRC/TRPMRC.cpp

    r40449 r41732  
    187187        {
    188188            /* Just ignore the write. */
    189             pRegFrame->eip += Cpu.opsize;
     189            pRegFrame->eip += Cpu.cbInstr;
    190190            return VINF_SUCCESS;
    191191        }
  • trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp

    r41678 r41732  
    754754                }
    755755            }
    756             rc = TRPMForwardTrap(pVCpu, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
     756            rc = TRPMForwardTrap(pVCpu, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->cbInstr, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
    757757            if (RT_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
    758758                return trpmGCExitTrap(pVM, pVCpu, VINF_SUCCESS, pRegFrame);
     
    775775                break;
    776776
    777             pRegFrame->eip += pCpu->opsize;
     777            pRegFrame->eip += pCpu->cbInstr;
    778778            return trpmGCExitTrap(pVM, pVCpu, VINF_EM_HALT, pRegFrame);
    779779
     
    846846        {
    847847            Assert(pCpu->param1.fUse & DISUSE_IMMEDIATE8);
    848             rc = TRPMForwardTrap(pVCpu, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->opsize, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
     848            rc = TRPMForwardTrap(pVCpu, pRegFrame, (uint32_t)pCpu->param1.parval, pCpu->cbInstr, TRPM_TRAP_NO_ERRORCODE, TRPM_SOFTWARE_INT, 0xd);
    849849            if (RT_SUCCESS(rc) && rc != VINF_EM_RAW_GUEST_TRAP)
    850850                return trpmGCExitTrap(pVM, pVCpu, VINF_SUCCESS, pRegFrame);
  • trunk/src/VBox/VMM/include/CSAMInternal.h

    r41678 r41732  
    271271    }
    272272#ifdef IN_RC
    273     return (RTRCPTR)((uint8_t *)pBranchInstrGC + pCpu->opsize + disp);
     273    return (RTRCPTR)((uint8_t *)pBranchInstrGC + pCpu->cbInstr + disp);
    274274#else
    275     return pBranchInstrGC + pCpu->opsize + disp;
     275    return pBranchInstrGC + pCpu->cbInstr + disp;
    276276#endif
    277277}
  • trunk/src/VBox/VMM/include/PATMInternal.h

    r41678 r41732  
    781781    }
    782782#ifdef IN_RC
    783     return (RTRCPTR)((uint8_t *)pBranchInstrGC + pCpu->opsize + disp);
     783    return (RTRCPTR)((uint8_t *)pBranchInstrGC + pCpu->cbInstr + disp);
    784784#else
    785     return pBranchInstrGC + pCpu->opsize + disp;
     785    return pBranchInstrGC + pCpu->cbInstr + disp;
    786786#endif
    787787}
  • trunk/src/VBox/VMM/testcase/tstVMStruct.h

    r41692 r41732  
    14041404    GEN_CHECK_OFF(DISCPUSTATE, fFilter);
    14051405    GEN_CHECK_OFF(DISCPUSTATE, uInstrAddr);
    1406 #endif   
     1406    GEN_CHECK_OFF(DISCPUSTATE, abInstr);
     1407    GEN_CHECK_OFF(DISCPUSTATE, pvUser);
     1408#endif
Note: See TracChangeset for help on using the changeset viewer.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette