- Timestamp:
- Jun 15, 2012 12:39:37 AM (13 years ago)
- Location:
- trunk/src/VBox
- Files:
-
- 12 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Disassembler/DisasmCore.cpp
r41735 r41736 291 291 RT_BZERO(pCpu, RT_OFFSETOF(DISCPUSTATE, pvUser2)); 292 292 293 pCpu-> mode= enmCpuMode;293 pCpu->uCpuMode = enmCpuMode; 294 294 if (enmCpuMode == DISCPUMODE_64BIT) 295 295 { … … 360 360 pCpu->idxSegPrefix = (DISSELREG)(paOneByteMap[codebyte].param1 - OP_PARM_REG_SEG_START); 361 361 /* Segment prefixes for CS, DS, ES and SS are ignored in long mode. */ 362 if ( pCpu-> mode != DISCPUMODE_64BIT362 if ( pCpu->uCpuMode != DISCPUMODE_64BIT 363 363 || pCpu->idxSegPrefix >= DISSELREG_FS) 364 364 { … … 377 377 case OP_ADDRSIZE: 378 378 pCpu->fPrefix |= DISPREFIX_ADDRSIZE; 379 if (pCpu-> mode == DISCPUMODE_16BIT)379 if (pCpu->uCpuMode == DISCPUMODE_16BIT) 380 380 pCpu->uAddrMode = DISCPUMODE_32BIT; 381 381 else 382 if (pCpu-> mode == DISCPUMODE_32BIT)382 if (pCpu->uCpuMode == DISCPUMODE_32BIT) 383 383 pCpu->uAddrMode = DISCPUMODE_16BIT; 384 384 else … … 391 391 case OP_OPSIZE: 392 392 pCpu->fPrefix |= DISPREFIX_OPSIZE; 393 if (pCpu-> mode == DISCPUMODE_16BIT)393 if (pCpu->uCpuMode == DISCPUMODE_16BIT) 394 394 pCpu->uOpMode = DISCPUMODE_32BIT; 395 395 else … … 411 411 412 412 case OP_REX: 413 Assert(pCpu-> mode == DISCPUMODE_64BIT);413 Assert(pCpu->uCpuMode == DISCPUMODE_64BIT); 414 414 /* REX prefix byte */ 415 415 pCpu->fPrefix |= DISPREFIX_REX; … … 476 476 477 477 /* Correct the operand size if the instruction is marked as forced or default 64 bits */ 478 if (pCpu-> mode == DISCPUMODE_64BIT)478 if (pCpu->uCpuMode == DISCPUMODE_64BIT) 479 479 { 480 480 if (pOp->optype & DISOPTYPE_FORCED_64_OP_SIZE) … … 489 489 { 490 490 /* Forced 32 bits operand size for certain instructions (mov crx, mov drx). */ 491 Assert(pCpu-> mode != DISCPUMODE_64BIT);491 Assert(pCpu->uCpuMode != DISCPUMODE_64BIT); 492 492 pCpu->uOpMode = DISCPUMODE_32BIT; 493 493 } … … 554 554 555 555 /* Correct the operand size if the instruction is marked as forced or default 64 bits */ 556 if (pCpu-> mode == DISCPUMODE_64BIT)556 if (pCpu->uCpuMode == DISCPUMODE_64BIT) 557 557 { 558 558 /* Note: redundant, but just in case this ever changes */ … … 805 805 { 806 806 /* 32 bits displacement */ 807 if (pCpu-> mode != DISCPUMODE_64BIT)807 if (pCpu->uCpuMode != DISCPUMODE_64BIT) 808 808 { 809 809 pParam->fUse |= DISUSE_DISPLACEMENT32; … … 1082 1082 if (pCpu->fPrefix & DISPREFIX_REX) 1083 1083 { 1084 Assert(pCpu-> mode == DISCPUMODE_64BIT);1084 Assert(pCpu->uCpuMode == DISCPUMODE_64BIT); 1085 1085 1086 1086 /* REX.R extends the Reg field. */ … … 1128 1128 if (pCpu->fPrefix & DISPREFIX_REX) 1129 1129 { 1130 Assert(pCpu-> mode == DISCPUMODE_64BIT);1130 Assert(pCpu->uCpuMode == DISCPUMODE_64BIT); 1131 1131 1132 1132 /* REX.R extends the Reg field. */ … … 1761 1761 /* Cancel prefix changes. */ 1762 1762 pCpu->fPrefix &= ~DISPREFIX_OPSIZE; 1763 pCpu->uOpMode = pCpu-> mode;1763 pCpu->uOpMode = pCpu->uCpuMode; 1764 1764 } 1765 1765 break; … … 1828 1828 /* Cancel prefix changes. */ 1829 1829 pCpu->fPrefix &= ~DISPREFIX_OPSIZE; 1830 pCpu->uOpMode = pCpu-> mode;1830 pCpu->uOpMode = pCpu->uCpuMode; 1831 1831 } 1832 1832 } … … 1879 1879 /* Cancel prefix changes. */ 1880 1880 pCpu->fPrefix &= ~DISPREFIX_OPSIZE; 1881 pCpu->uOpMode = pCpu-> mode;1881 pCpu->uOpMode = pCpu->uCpuMode; 1882 1882 } 1883 1883 } -
trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp
r41735 r41736 800 800 801 801 case DISUSE_IMMEDIATE16: 802 if ( pCpu-> mode != pCpu->uOpMode802 if ( pCpu->uCpuMode != pCpu->uOpMode 803 803 || ( (fFlags & DIS_FMT_FLAGS_STRICT) 804 804 && ( (int8_t)pParam->parval == (int16_t)pParam->parval … … 823 823 824 824 case DISUSE_IMMEDIATE32: 825 if ( pCpu->uOpMode != (pCpu-> mode == DISCPUMODE_16BIT ? DISCPUMODE_16BIT : DISCPUMODE_32BIT) /* not perfect */825 if ( pCpu->uOpMode != (pCpu->uCpuMode == DISCPUMODE_16BIT ? DISCPUMODE_16BIT : DISCPUMODE_32BIT) /* not perfect */ 826 826 || ( (fFlags & DIS_FMT_FLAGS_STRICT) 827 827 && ( (int8_t)pParam->parval == (int32_t)pParam->parval … … 908 908 909 909 RTUINTPTR uTrgAddr = pCpu->uInstrAddr + pCpu->cbInstr + offDisplacement; 910 if (pCpu-> mode == DISCPUMODE_16BIT)910 if (pCpu->uCpuMode == DISCPUMODE_16BIT) 911 911 PUT_NUM_16(uTrgAddr); 912 else if (pCpu-> mode == DISCPUMODE_32BIT)912 else if (pCpu->uCpuMode == DISCPUMODE_32BIT) 913 913 PUT_NUM_32(uTrgAddr); 914 914 else … … 1273 1273 case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47: 1274 1274 case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f: 1275 f = pCpu-> mode == DISCPUMODE_64BIT ? DISPREFIX_REX : 0;1275 f = pCpu->uCpuMode == DISCPUMODE_64BIT ? DISPREFIX_REX : 0; 1276 1276 break; 1277 1277 … … 1291 1291 { 1292 1292 /* no effective address which it may apply to. */ 1293 Assert((pCpu->fPrefix & DISPREFIX_SEG) || pCpu-> mode == DISCPUMODE_64BIT);1293 Assert((pCpu->fPrefix & DISPREFIX_SEG) || pCpu->uCpuMode == DISCPUMODE_64BIT); 1294 1294 if ( !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param1.fUse) 1295 1295 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param2.fUse) … … 1517 1517 if ( pCpu->pCurInstr->opcode == OP_MOVZX 1518 1518 && pCpu->bOpCode == 0xB7 1519 && (pCpu-> mode == DISCPUMODE_16BIT) != !!(fPrefixes & DISPREFIX_OPSIZE))1519 && (pCpu->uCpuMode == DISCPUMODE_16BIT) != !!(fPrefixes & DISPREFIX_OPSIZE)) 1520 1520 return true; 1521 1521 -
trunk/src/VBox/Disassembler/DisasmReg.cpp
r41735 r41736 587 587 if (pParam->fUse & DISUSE_DISPLACEMENT8) 588 588 { 589 if (pCpu-> mode == DISCPUMODE_32BIT)589 if (pCpu->uCpuMode == DISCPUMODE_32BIT) 590 590 pParamVal->val.val32 += (int32_t)pParam->uDisp.i8; 591 591 else 592 if (pCpu-> mode == DISCPUMODE_64BIT)592 if (pCpu->uCpuMode == DISCPUMODE_64BIT) 593 593 pParamVal->val.val64 += (int64_t)pParam->uDisp.i8; 594 594 else … … 598 598 if (pParam->fUse & DISUSE_DISPLACEMENT16) 599 599 { 600 if (pCpu-> mode == DISCPUMODE_32BIT)600 if (pCpu->uCpuMode == DISCPUMODE_32BIT) 601 601 pParamVal->val.val32 += (int32_t)pParam->uDisp.i16; 602 602 else 603 if (pCpu-> mode == DISCPUMODE_64BIT)603 if (pCpu->uCpuMode == DISCPUMODE_64BIT) 604 604 pParamVal->val.val64 += (int64_t)pParam->uDisp.i16; 605 605 else … … 609 609 if (pParam->fUse & DISUSE_DISPLACEMENT32) 610 610 { 611 if (pCpu-> mode == DISCPUMODE_32BIT)611 if (pCpu->uCpuMode == DISCPUMODE_32BIT) 612 612 pParamVal->val.val32 += pParam->uDisp.i32; 613 613 else … … 617 617 if (pParam->fUse & DISUSE_DISPLACEMENT64) 618 618 { 619 Assert(pCpu-> mode == DISCPUMODE_64BIT);619 Assert(pCpu->uCpuMode == DISCPUMODE_64BIT); 620 620 pParamVal->val.val64 += pParam->uDisp.i64; 621 621 } … … 623 623 if (pParam->fUse & DISUSE_RIPDISPLACEMENT32) 624 624 { 625 Assert(pCpu-> mode == DISCPUMODE_64BIT);625 Assert(pCpu->uCpuMode == DISCPUMODE_64BIT); 626 626 /* Relative to the RIP of the next instruction. */ 627 627 pParamVal->val.val64 += pParam->uDisp.i32 + pCtx->rip + pCpu->cbInstr; -
trunk/src/VBox/Runtime/testcase/tstLdr-3.cpp
r41731 r41736 154 154 155 155 156 static bool MyDisBlock( PDISCPUSTATE pCpu, RTHCUINTPTR pvCodeBlock, int32_t cbMax, RTUINTPTR off,156 static bool MyDisBlock(DISCPUMODE enmCpuMode, RTHCUINTPTR pvCodeBlock, int32_t cbMax, RTUINTPTR off, 157 157 RTUINTPTR uNearAddr, RTUINTPTR uSearchAddr) 158 158 { 159 int32_t i = 0; 159 DISCPUSTATE Cpu; 160 int32_t i = 0; 160 161 while (i < cbMax) 161 162 { … … 164 165 char szOutput[256]; 165 166 unsigned cbInstr; 166 int rc = DISInstrWithReader(uNearAddr + i, (DISCPUMODE)pCpu->mode,167 int rc = DISInstrWithReader(uNearAddr + i, enmCpuMode, 167 168 MyReadBytes, (uint8_t *)pvCodeBlock - (uintptr_t)uNearAddr, 168 pCpu, &cbInstr);169 &Cpu, &cbInstr); 169 170 RTAssertSetMayPanic(fMayPanic); 170 171 RTAssertSetQuiet(fQuiet); … … 172 173 return false; 173 174 174 DISFormatYasmEx( pCpu, szOutput, sizeof(szOutput),175 DISFormatYasmEx(&Cpu, szOutput, sizeof(szOutput), 175 176 DIS_FMT_FLAGS_RELATIVE_BRANCH | DIS_FMT_FLAGS_BYTES_RIGHT | DIS_FMT_FLAGS_ADDR_LEFT | DIS_FMT_FLAGS_BYTES_SPACED, 176 177 MyGetSymbol, NULL); … … 244 245 if (NearSym.Addr - NearSym.aSyms[0].Value < 0x10000) 245 246 { 246 DISCPUSTATE Cpu;247 memset(&Cpu, 0, sizeof(Cpu));248 247 #ifdef RT_ARCH_X86 /** @todo select according to the module type. */ 249 Cpu.mode = DISCPUMODE_32BIT;248 DISCPUMODE enmDisCpuMode = DISCPUMODE_32BIT; 250 249 #else 251 Cpu.mode = DISCPUMODE_64BIT;250 DISCPUMODE enmDisCpuMode = DISCPUMODE_64BIT; 252 251 #endif 253 252 uint8_t *pbCode = (uint8_t *)g_pvBits + (NearSym.aSyms[0].Value - g_uLoadAddr); 254 MyDisBlock( &Cpu, (uintptr_t)pbCode,253 MyDisBlock(enmDisCpuMode, (uintptr_t)pbCode, 255 254 RT_MAX(NearSym.aSyms[1].Value - NearSym.aSyms[0].Value, 0x20000), 256 255 NearSym.aSyms[0].Value - (RTUINTPTR)pbCode, -
trunk/src/VBox/Runtime/testcase/tstLdrDisasmTest.cpp
r41734 r41736 122 122 123 123 memset(&Cpu, 0, sizeof(Cpu)); 124 Cpu.mode = DISCPUMODE_32BIT;125 124 126 125 #define DISAS_AND_CHECK(cbInstr, enmOp) \ -
trunk/src/VBox/Runtime/testcase/tstLdrObjR0.cpp
r41675 r41736 96 96 97 97 memset(&Cpu, 0, sizeof(Cpu)); 98 Cpu.mode = DISCPUMODE_32BIT;99 98 100 99 DISInstr((void *)(uintptr_t)SomeExportFunction3, DISCPUMODE_32BIT, &Cpu, &cb); -
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r41735 r41736 364 364 State.GCPtr = NIL_RTGCPTR; 365 365 } 366 return DISInstrWithReader(InstrGC, (DISCPUMODE)pDis-> mode, emReadBytes, &State, pDis, pOpsize);366 return DISInstrWithReader(InstrGC, (DISCPUMODE)pDis->uCpuMode, emReadBytes, &State, pDis, pOpsize); 367 367 } 368 368 … … 377 377 State.GCPtr = InstrGC; 378 378 379 return DISInstrWithReader(InstrGC, (DISCPUMODE)pDis-> mode, emReadBytes, &State, pDis, pOpsize);379 return DISInstrWithReader(InstrGC, (DISCPUMODE)pDis->uCpuMode, emReadBytes, &State, pDis, pOpsize); 380 380 } 381 381 … … 503 503 uint32_t cbOp; 504 504 PDISCPUSTATE pDis = &pVCpu->em.s.DisState; 505 pDis-> mode = SELMGetCpuModeFromSelector(pVCpu, pRegFrame->eflags, pRegFrame->cs, &pRegFrame->csHid);505 pDis->uCpuMode = SELMGetCpuModeFromSelector(pVCpu, pRegFrame->eflags, pRegFrame->cs, &pRegFrame->csHid); 506 506 rc = emDisCoreOne(pVCpu->CTX_SUFF(pVM), pVCpu, pDis, (RTGCUINTPTR)pbCode, &cbOp); 507 507 if (RT_SUCCESS(rc)) … … 557 557 uint32_t cbOp; 558 558 PDISCPUSTATE pDis = &pVCpu->em.s.DisState; 559 pDis-> mode = SELMGetCpuModeFromSelector(pVCpu, pRegFrame->eflags, pRegFrame->cs, &pRegFrame->csHid);559 pDis->uCpuMode = SELMGetCpuModeFromSelector(pVCpu, pRegFrame->eflags, pRegFrame->cs, &pRegFrame->csHid); 560 560 rc = emDisCoreOne(pVCpu->CTX_SUFF(pVM), pVCpu, pDis, (RTGCUINTPTR)pbCode, &cbOp); 561 561 if (RT_SUCCESS(rc)) … … 1009 1009 static int emInterpretPop(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize) 1010 1010 { 1011 Assert(pDis-> mode != DISCPUMODE_64BIT); /** @todo check */1011 Assert(pDis->uCpuMode != DISCPUMODE_64BIT); /** @todo check */ 1012 1012 DISQPVPARAMVAL param1; 1013 1013 NOREF(pvFault); … … 1561 1561 } 1562 1562 #ifdef LOG_ENABLED 1563 if (pDis-> mode == DISCPUMODE_64BIT)1563 if (pDis->uCpuMode == DISCPUMODE_64BIT) 1564 1564 LogFlow(("EMInterpretInstruction at %RGv: OP_MOV %RGv <- %RX64 (%d) &val64=%RHv\n", (RTGCPTR)pRegFrame->rip, pDest, val64, param2.size, &val64)); 1565 1565 else … … 1624 1624 } 1625 1625 #ifdef LOG_ENABLED 1626 if (pDis-> mode == DISCPUMODE_64BIT)1626 if (pDis->uCpuMode == DISCPUMODE_64BIT) 1627 1627 LogFlow(("EMInterpretInstruction: OP_MOV %RGv -> %RX64 (%d)\n", pSrc, val64, param1.size)); 1628 1628 else … … 1870 1870 static int emInterpretCmpXchg8b(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize) 1871 1871 { 1872 Assert(pDis-> mode != DISCPUMODE_64BIT); /** @todo check */1872 Assert(pDis->uCpuMode != DISCPUMODE_64BIT); /** @todo check */ 1873 1873 DISQPVPARAMVAL param1; 1874 1874 NOREF(pvFault); … … 1924 1924 static int emInterpretXAdd(PVM pVM, PVMCPU pVCpu, PDISCPUSTATE pDis, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize) 1925 1925 { 1926 Assert(pDis-> mode != DISCPUMODE_64BIT); /** @todo check */1926 Assert(pDis->uCpuMode != DISCPUMODE_64BIT); /** @todo check */ 1927 1927 DISQPVPARAMVAL param1; 1928 1928 void *pvParamReg2; -
trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp
r41734 r41736 107 107 rc = EMInterpretDisasOne(pVM, pVCpu, pRegFrame, pDis, &cbOp); 108 108 if ( RT_SUCCESS(rc) 109 && pDis-> mode == DISCPUMODE_32BIT /** @todo why does this matter? */109 && pDis->uCpuMode == DISCPUMODE_32BIT /** @todo why does this matter? */ 110 110 && !(pDis->fPrefix & (DISPREFIX_REPNE | DISPREFIX_REP | DISPREFIX_SEG))) 111 111 { -
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r41735 r41736 797 797 ) 798 798 { 799 Assert(pDis-> mode == DISCPUMODE_64BIT);799 Assert(pDis->uCpuMode == DISCPUMODE_64BIT); 800 800 801 801 Log(("pgmPoolMonitorIsReused: OP_STOSQ\n")); … … 890 890 NOREF(pVM); 891 891 892 Assert(pDis-> mode == DISCPUMODE_32BIT || pDis->mode == DISCPUMODE_64BIT);892 Assert(pDis->uCpuMode == DISCPUMODE_32BIT || pDis->uCpuMode == DISCPUMODE_64BIT); 893 893 Assert(pRegFrame->rcx <= 0x20); 894 894 … … 1198 1198 if ( pDis->pCurInstr->opcode == OP_STOSWD 1199 1199 && !pRegFrame->eflags.Bits.u1DF 1200 && pDis->uOpMode == pDis-> mode1201 && pDis->uAddrMode == pDis-> mode)1200 && pDis->uOpMode == pDis->uCpuMode 1201 && pDis->uAddrMode == pDis->uCpuMode) 1202 1202 { 1203 1203 bool fValidStosd = false; 1204 1204 1205 if ( pDis-> mode == DISCPUMODE_32BIT1205 if ( pDis->uCpuMode == DISCPUMODE_32BIT 1206 1206 && pDis->fPrefix == DISPREFIX_REP 1207 1207 && pRegFrame->ecx <= 0x20 … … 1215 1215 } 1216 1216 else 1217 if ( pDis-> mode == DISCPUMODE_64BIT1217 if ( pDis->uCpuMode == DISCPUMODE_64BIT 1218 1218 && pDis->fPrefix == (DISPREFIX_REP | DISPREFIX_REX) 1219 1219 && pRegFrame->rcx <= 0x20 -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r41735 r41736 2982 2982 PDISCPUSTATE pDis = &pVCpu->hwaccm.s.DisState; 2983 2983 2984 pDis-> mode = enmMode;2984 pDis->uCpuMode = enmMode; 2985 2985 rc = EMInterpretDisasOneEx(pVM, pVCpu, pbCode, pRegFrame, pDis, &cbOp); 2986 2986 Assert(RT_FAILURE(rc) || pDis->pCurInstr->opcode == OP_INVLPG); -
trunk/src/VBox/VMM/VMMR3/PATM.cpp
r41734 r41736 3189 3189 PPATCHINFO pPatch = &pPatchRec->patch; 3190 3190 int rc = VERR_PATCHING_REFUSED; 3191 DISCPUSTATE cpu;3192 3191 uint32_t orgOffsetPatchMem = ~0; 3193 3192 bool fInserted; … … 3215 3214 pPatch->pPatchBlockOffset = pVM->patm.s.offPatchMem; 3216 3215 pPatch->uCurPatchOffset = 0; 3217 3218 cpu.mode = (pPatch->flags & PATMFL_CODE32) ? DISCPUMODE_32BIT : DISCPUMODE_16BIT;3219 3216 3220 3217 /* Note: Set the PATM interrupt flag here; it was cleared before the patched call. (!!!) */ … … 6453 6450 if (disret && (cpu.pCurInstr->opcode == OP_SYSEXIT || cpu.pCurInstr->opcode == OP_HLT || cpu.pCurInstr->opcode == OP_INT3)) 6454 6451 { 6455 cpu.mode = (pPatch->patch.flags & PATMFL_CODE32) ? DISCPUMODE_32BIT : DISCPUMODE_16BIT;6456 6452 disret = patmR3DisInstr(pVM, &pPatch->patch, pNewEip, PATMGCVirtToHCVirt(pVM, &cacheRec, pNewEip), PATMREAD_RAWCODE, 6457 6453 &cpu, &cbInstr); -
trunk/src/VBox/VMM/VMMRC/PATMRC.cpp
r41692 r41736 510 510 } 511 511 512 cpu.mode = SELMGetCpuModeFromSelector(VMMGetCpu0(pVM), pRegFrame->eflags, pRegFrame->cs, 0);513 if ( cpu.mode != DISCPUMODE_32BIT)512 DISCPUMODE enmCpuMode = SELMGetCpuModeFromSelector(VMMGetCpu0(pVM), pRegFrame->eflags, pRegFrame->cs, 0); 513 if (enmCpuMode != DISCPUMODE_32BIT) 514 514 { 515 515 AssertFailed(); … … 523 523 rc = VBOXSTRICTRC_TODO(rcStrict); 524 524 #else 525 rc = DISInstr(&pRec->patch.aPrivInstr[0], (DISCPUMODE)cpu.mode, &cpu, &cbOp);525 rc = DISInstr(&pRec->patch.aPrivInstr[0], enmCpuMode, &cpu, &cbOp); 526 526 if (RT_FAILURE(rc)) 527 527 {
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