Changeset 41736 in vbox for trunk/src/VBox/Disassembler
- Timestamp:
- Jun 15, 2012 12:39:37 AM (12 years ago)
- Location:
- trunk/src/VBox/Disassembler
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Disassembler/DisasmCore.cpp
r41735 r41736 291 291 RT_BZERO(pCpu, RT_OFFSETOF(DISCPUSTATE, pvUser2)); 292 292 293 pCpu-> mode= enmCpuMode;293 pCpu->uCpuMode = enmCpuMode; 294 294 if (enmCpuMode == DISCPUMODE_64BIT) 295 295 { … … 360 360 pCpu->idxSegPrefix = (DISSELREG)(paOneByteMap[codebyte].param1 - OP_PARM_REG_SEG_START); 361 361 /* Segment prefixes for CS, DS, ES and SS are ignored in long mode. */ 362 if ( pCpu-> mode != DISCPUMODE_64BIT362 if ( pCpu->uCpuMode != DISCPUMODE_64BIT 363 363 || pCpu->idxSegPrefix >= DISSELREG_FS) 364 364 { … … 377 377 case OP_ADDRSIZE: 378 378 pCpu->fPrefix |= DISPREFIX_ADDRSIZE; 379 if (pCpu-> mode == DISCPUMODE_16BIT)379 if (pCpu->uCpuMode == DISCPUMODE_16BIT) 380 380 pCpu->uAddrMode = DISCPUMODE_32BIT; 381 381 else 382 if (pCpu-> mode == DISCPUMODE_32BIT)382 if (pCpu->uCpuMode == DISCPUMODE_32BIT) 383 383 pCpu->uAddrMode = DISCPUMODE_16BIT; 384 384 else … … 391 391 case OP_OPSIZE: 392 392 pCpu->fPrefix |= DISPREFIX_OPSIZE; 393 if (pCpu-> mode == DISCPUMODE_16BIT)393 if (pCpu->uCpuMode == DISCPUMODE_16BIT) 394 394 pCpu->uOpMode = DISCPUMODE_32BIT; 395 395 else … … 411 411 412 412 case OP_REX: 413 Assert(pCpu-> mode == DISCPUMODE_64BIT);413 Assert(pCpu->uCpuMode == DISCPUMODE_64BIT); 414 414 /* REX prefix byte */ 415 415 pCpu->fPrefix |= DISPREFIX_REX; … … 476 476 477 477 /* Correct the operand size if the instruction is marked as forced or default 64 bits */ 478 if (pCpu-> mode == DISCPUMODE_64BIT)478 if (pCpu->uCpuMode == DISCPUMODE_64BIT) 479 479 { 480 480 if (pOp->optype & DISOPTYPE_FORCED_64_OP_SIZE) … … 489 489 { 490 490 /* Forced 32 bits operand size for certain instructions (mov crx, mov drx). */ 491 Assert(pCpu-> mode != DISCPUMODE_64BIT);491 Assert(pCpu->uCpuMode != DISCPUMODE_64BIT); 492 492 pCpu->uOpMode = DISCPUMODE_32BIT; 493 493 } … … 554 554 555 555 /* Correct the operand size if the instruction is marked as forced or default 64 bits */ 556 if (pCpu-> mode == DISCPUMODE_64BIT)556 if (pCpu->uCpuMode == DISCPUMODE_64BIT) 557 557 { 558 558 /* Note: redundant, but just in case this ever changes */ … … 805 805 { 806 806 /* 32 bits displacement */ 807 if (pCpu-> mode != DISCPUMODE_64BIT)807 if (pCpu->uCpuMode != DISCPUMODE_64BIT) 808 808 { 809 809 pParam->fUse |= DISUSE_DISPLACEMENT32; … … 1082 1082 if (pCpu->fPrefix & DISPREFIX_REX) 1083 1083 { 1084 Assert(pCpu-> mode == DISCPUMODE_64BIT);1084 Assert(pCpu->uCpuMode == DISCPUMODE_64BIT); 1085 1085 1086 1086 /* REX.R extends the Reg field. */ … … 1128 1128 if (pCpu->fPrefix & DISPREFIX_REX) 1129 1129 { 1130 Assert(pCpu-> mode == DISCPUMODE_64BIT);1130 Assert(pCpu->uCpuMode == DISCPUMODE_64BIT); 1131 1131 1132 1132 /* REX.R extends the Reg field. */ … … 1761 1761 /* Cancel prefix changes. */ 1762 1762 pCpu->fPrefix &= ~DISPREFIX_OPSIZE; 1763 pCpu->uOpMode = pCpu-> mode;1763 pCpu->uOpMode = pCpu->uCpuMode; 1764 1764 } 1765 1765 break; … … 1828 1828 /* Cancel prefix changes. */ 1829 1829 pCpu->fPrefix &= ~DISPREFIX_OPSIZE; 1830 pCpu->uOpMode = pCpu-> mode;1830 pCpu->uOpMode = pCpu->uCpuMode; 1831 1831 } 1832 1832 } … … 1879 1879 /* Cancel prefix changes. */ 1880 1880 pCpu->fPrefix &= ~DISPREFIX_OPSIZE; 1881 pCpu->uOpMode = pCpu-> mode;1881 pCpu->uOpMode = pCpu->uCpuMode; 1882 1882 } 1883 1883 } -
trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp
r41735 r41736 800 800 801 801 case DISUSE_IMMEDIATE16: 802 if ( pCpu-> mode != pCpu->uOpMode802 if ( pCpu->uCpuMode != pCpu->uOpMode 803 803 || ( (fFlags & DIS_FMT_FLAGS_STRICT) 804 804 && ( (int8_t)pParam->parval == (int16_t)pParam->parval … … 823 823 824 824 case DISUSE_IMMEDIATE32: 825 if ( pCpu->uOpMode != (pCpu-> mode == DISCPUMODE_16BIT ? DISCPUMODE_16BIT : DISCPUMODE_32BIT) /* not perfect */825 if ( pCpu->uOpMode != (pCpu->uCpuMode == DISCPUMODE_16BIT ? DISCPUMODE_16BIT : DISCPUMODE_32BIT) /* not perfect */ 826 826 || ( (fFlags & DIS_FMT_FLAGS_STRICT) 827 827 && ( (int8_t)pParam->parval == (int32_t)pParam->parval … … 908 908 909 909 RTUINTPTR uTrgAddr = pCpu->uInstrAddr + pCpu->cbInstr + offDisplacement; 910 if (pCpu-> mode == DISCPUMODE_16BIT)910 if (pCpu->uCpuMode == DISCPUMODE_16BIT) 911 911 PUT_NUM_16(uTrgAddr); 912 else if (pCpu-> mode == DISCPUMODE_32BIT)912 else if (pCpu->uCpuMode == DISCPUMODE_32BIT) 913 913 PUT_NUM_32(uTrgAddr); 914 914 else … … 1273 1273 case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47: 1274 1274 case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f: 1275 f = pCpu-> mode == DISCPUMODE_64BIT ? DISPREFIX_REX : 0;1275 f = pCpu->uCpuMode == DISCPUMODE_64BIT ? DISPREFIX_REX : 0; 1276 1276 break; 1277 1277 … … 1291 1291 { 1292 1292 /* no effective address which it may apply to. */ 1293 Assert((pCpu->fPrefix & DISPREFIX_SEG) || pCpu-> mode == DISCPUMODE_64BIT);1293 Assert((pCpu->fPrefix & DISPREFIX_SEG) || pCpu->uCpuMode == DISCPUMODE_64BIT); 1294 1294 if ( !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param1.fUse) 1295 1295 && !DISUSE_IS_EFFECTIVE_ADDR(pCpu->param2.fUse) … … 1517 1517 if ( pCpu->pCurInstr->opcode == OP_MOVZX 1518 1518 && pCpu->bOpCode == 0xB7 1519 && (pCpu-> mode == DISCPUMODE_16BIT) != !!(fPrefixes & DISPREFIX_OPSIZE))1519 && (pCpu->uCpuMode == DISCPUMODE_16BIT) != !!(fPrefixes & DISPREFIX_OPSIZE)) 1520 1520 return true; 1521 1521 -
trunk/src/VBox/Disassembler/DisasmReg.cpp
r41735 r41736 587 587 if (pParam->fUse & DISUSE_DISPLACEMENT8) 588 588 { 589 if (pCpu-> mode == DISCPUMODE_32BIT)589 if (pCpu->uCpuMode == DISCPUMODE_32BIT) 590 590 pParamVal->val.val32 += (int32_t)pParam->uDisp.i8; 591 591 else 592 if (pCpu-> mode == DISCPUMODE_64BIT)592 if (pCpu->uCpuMode == DISCPUMODE_64BIT) 593 593 pParamVal->val.val64 += (int64_t)pParam->uDisp.i8; 594 594 else … … 598 598 if (pParam->fUse & DISUSE_DISPLACEMENT16) 599 599 { 600 if (pCpu-> mode == DISCPUMODE_32BIT)600 if (pCpu->uCpuMode == DISCPUMODE_32BIT) 601 601 pParamVal->val.val32 += (int32_t)pParam->uDisp.i16; 602 602 else 603 if (pCpu-> mode == DISCPUMODE_64BIT)603 if (pCpu->uCpuMode == DISCPUMODE_64BIT) 604 604 pParamVal->val.val64 += (int64_t)pParam->uDisp.i16; 605 605 else … … 609 609 if (pParam->fUse & DISUSE_DISPLACEMENT32) 610 610 { 611 if (pCpu-> mode == DISCPUMODE_32BIT)611 if (pCpu->uCpuMode == DISCPUMODE_32BIT) 612 612 pParamVal->val.val32 += pParam->uDisp.i32; 613 613 else … … 617 617 if (pParam->fUse & DISUSE_DISPLACEMENT64) 618 618 { 619 Assert(pCpu-> mode == DISCPUMODE_64BIT);619 Assert(pCpu->uCpuMode == DISCPUMODE_64BIT); 620 620 pParamVal->val.val64 += pParam->uDisp.i64; 621 621 } … … 623 623 if (pParam->fUse & DISUSE_RIPDISPLACEMENT32) 624 624 { 625 Assert(pCpu-> mode == DISCPUMODE_64BIT);625 Assert(pCpu->uCpuMode == DISCPUMODE_64BIT); 626 626 /* Relative to the RIP of the next instruction. */ 627 627 pParamVal->val.val64 += pParam->uDisp.i32 + pCtx->rip + pCpu->cbInstr;
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