- Timestamp:
- Jun 15, 2012 1:41:24 AM (13 years ago)
- Location:
- trunk/src/VBox/Disassembler
- Files:
-
- 3 edited
-
DisasmCore.cpp (modified) (17 diffs)
-
DisasmFormatYasm.cpp (modified) (8 diffs)
-
DisasmReg.cpp (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Disassembler/DisasmCore.cpp
r41739 r41740 471 471 472 472 // Should contain the parameter type on input 473 pCpu->Param1. param = pOp->fParam1;474 pCpu->Param2. param = pOp->fParam2;475 pCpu->Param3. param = pOp->fParam3;473 pCpu->Param1.fParam = pOp->fParam1; 474 pCpu->Param2.fParam = pOp->fParam2; 475 pCpu->Param3.fParam = pOp->fParam3; 476 476 477 477 /* Correct the operand size if the instruction is marked as forced or default 64 bits */ … … 534 534 535 535 // Should contain the parameter type on input 536 pCpu->Param1. param = fpop->fParam1;537 pCpu->Param2. param = fpop->fParam2;536 pCpu->Param1.fParam = fpop->fParam1; 537 pCpu->Param2.fParam = fpop->fParam2; 538 538 } 539 539 else … … 718 718 unsigned UseModRM(RTUINTPTR uCodePtr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pCpu) 719 719 { 720 int vtype = OP_PARM_VTYPE(pParam->param);720 unsigned vtype = OP_PARM_VTYPE(pParam->fParam); 721 721 unsigned reg = pCpu->ModRM.Bits.Reg; 722 722 unsigned mod = pCpu->ModRM.Bits.Mod; … … 1401 1401 if (pCpu->uAddrMode == DISCPUMODE_32BIT) 1402 1402 { 1403 if (OP_PARM_VSUBTYPE(pParam-> param) == OP_PARM_p)1403 if (OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_p) 1404 1404 { 1405 1405 /* far 16:32 pointer */ … … 1425 1425 if (pCpu->uAddrMode == DISCPUMODE_64BIT) 1426 1426 { 1427 Assert(OP_PARM_VSUBTYPE(pParam-> param) != OP_PARM_p);1427 Assert(OP_PARM_VSUBTYPE(pParam->fParam) != OP_PARM_p); 1428 1428 /* 1429 1429 * near 64 bits pointer … … 1437 1437 return sizeof(uint64_t); 1438 1438 } 1439 if (OP_PARM_VSUBTYPE(pParam-> param) == OP_PARM_p)1439 if (OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_p) 1440 1440 { 1441 1441 /* far 16:16 pointer */ … … 1464 1464 if (pCpu->uAddrMode == DISCPUMODE_32BIT) 1465 1465 { 1466 if (OP_PARM_VSUBTYPE(pParam-> param) == OP_PARM_p)1466 if (OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_p) 1467 1467 {// far 16:32 pointer 1468 1468 return sizeof(uint32_t) + sizeof(uint16_t); … … 1475 1475 if (pCpu->uAddrMode == DISCPUMODE_64BIT) 1476 1476 { 1477 Assert(OP_PARM_VSUBTYPE(pParam-> param) != OP_PARM_p);1477 Assert(OP_PARM_VSUBTYPE(pParam->fParam) != OP_PARM_p); 1478 1478 return sizeof(uint64_t); 1479 1479 } 1480 1480 else 1481 1481 { 1482 if (OP_PARM_VSUBTYPE(pParam-> param) == OP_PARM_p)1482 if (OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_p) 1483 1483 {// far 16:16 pointer 1484 1484 return sizeof(uint32_t); … … 1496 1496 // immediate far pointers - only 16:16 or 16:32; determined by operand, *not* address size! 1497 1497 Assert(pCpu->uOpMode == DISCPUMODE_16BIT || pCpu->uOpMode == DISCPUMODE_32BIT); 1498 Assert(OP_PARM_VSUBTYPE(pParam-> param) == OP_PARM_p);1498 Assert(OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_p); 1499 1499 if (pCpu->uOpMode == DISCPUMODE_32BIT) 1500 1500 { … … 1520 1520 // immediate far pointers - only 16:16 or 16:32 1521 1521 Assert(pCpu->uOpMode == DISCPUMODE_16BIT || pCpu->uOpMode == DISCPUMODE_32BIT); 1522 Assert(OP_PARM_VSUBTYPE(pParam-> param) == OP_PARM_p);1522 Assert(OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_p); 1523 1523 if (pCpu->uOpMode == DISCPUMODE_32BIT) 1524 1524 { … … 1542 1542 */ 1543 1543 1544 if (pParam-> param == OP_PARM_NONE)1544 if (pParam->fParam == OP_PARM_NONE) 1545 1545 { 1546 1546 /* No parameter at all. */ … … 1553 1553 AssertCompile(OP_PARM_REG_GEN8_END < OP_PARM_REG_FP_END); 1554 1554 1555 if (pParam-> param <= OP_PARM_REG_GEN32_END)1555 if (pParam->fParam <= OP_PARM_REG_GEN32_END) 1556 1556 { 1557 1557 /* 32-bit EAX..EDI registers. */ … … 1559 1559 { 1560 1560 /* Use 32-bit registers. */ 1561 pParam->base.reg_gen = pParam-> param - OP_PARM_REG_GEN32_START;1561 pParam->base.reg_gen = pParam->fParam - OP_PARM_REG_GEN32_START; 1562 1562 pParam->fUse |= DISUSE_REG_GEN32; 1563 1563 pParam->cb = 4; … … 1567 1567 { 1568 1568 /* Use 64-bit registers. */ 1569 pParam->base.reg_gen = pParam-> param - OP_PARM_REG_GEN32_START;1569 pParam->base.reg_gen = pParam->fParam - OP_PARM_REG_GEN32_START; 1570 1570 if ( (pOp->fOpType & DISOPTYPE_REXB_EXTENDS_OPREG) 1571 1571 && pParam == &pCpu->Param1 /* ugly assumption that it only applies to the first parameter */ … … 1580 1580 { 1581 1581 /* Use 16-bit registers. */ 1582 pParam->base.reg_gen = pParam-> param - OP_PARM_REG_GEN32_START;1582 pParam->base.reg_gen = pParam->fParam - OP_PARM_REG_GEN32_START; 1583 1583 pParam->fUse |= DISUSE_REG_GEN16; 1584 1584 pParam->cb = 2; 1585 pParam-> param = pParam->param - OP_PARM_REG_GEN32_START + OP_PARM_REG_GEN16_START;1586 } 1587 } 1588 else 1589 if (pParam-> param <= OP_PARM_REG_SEG_END)1585 pParam->fParam = pParam->fParam - OP_PARM_REG_GEN32_START + OP_PARM_REG_GEN16_START; 1586 } 1587 } 1588 else 1589 if (pParam->fParam <= OP_PARM_REG_SEG_END) 1590 1590 { 1591 1591 /* Segment ES..GS registers. */ 1592 pParam->base.reg_seg = (DISSELREG)(pParam-> param - OP_PARM_REG_SEG_START);1592 pParam->base.reg_seg = (DISSELREG)(pParam->fParam - OP_PARM_REG_SEG_START); 1593 1593 pParam->fUse |= DISUSE_REG_SEG; 1594 1594 pParam->cb = 2; 1595 1595 } 1596 1596 else 1597 if (pParam-> param <= OP_PARM_REG_GEN16_END)1597 if (pParam->fParam <= OP_PARM_REG_GEN16_END) 1598 1598 { 1599 1599 /* 16-bit AX..DI registers. */ 1600 pParam->base.reg_gen = pParam-> param - OP_PARM_REG_GEN16_START;1600 pParam->base.reg_gen = pParam->fParam - OP_PARM_REG_GEN16_START; 1601 1601 pParam->fUse |= DISUSE_REG_GEN16; 1602 1602 pParam->cb = 2; 1603 1603 } 1604 1604 else 1605 if (pParam-> param <= OP_PARM_REG_GEN8_END)1605 if (pParam->fParam <= OP_PARM_REG_GEN8_END) 1606 1606 { 1607 1607 /* 8-bit AL..DL, AH..DH registers. */ 1608 pParam->base.reg_gen = pParam-> param - OP_PARM_REG_GEN8_START;1608 pParam->base.reg_gen = pParam->fParam - OP_PARM_REG_GEN8_START; 1609 1609 pParam->fUse |= DISUSE_REG_GEN8; 1610 1610 pParam->cb = 1; … … 1620 1620 } 1621 1621 else 1622 if (pParam-> param <= OP_PARM_REG_FP_END)1622 if (pParam->fParam <= OP_PARM_REG_FP_END) 1623 1623 { 1624 1624 /* FPU registers. */ 1625 pParam->base.reg_fp = pParam-> param - OP_PARM_REG_FP_START;1625 pParam->base.reg_fp = pParam->fParam - OP_PARM_REG_FP_START; 1626 1626 pParam->fUse |= DISUSE_REG_FP; 1627 1627 pParam->cb = 10; 1628 1628 } 1629 Assert(!(pParam-> param >= OP_PARM_REG_GEN64_START && pParam->param <= OP_PARM_REG_GEN64_END));1629 Assert(!(pParam->fParam >= OP_PARM_REG_GEN64_START && pParam->fParam <= OP_PARM_REG_GEN64_END)); 1630 1630 1631 1631 /* else - not supported for now registers. */ … … 2298 2298 static void disasmModRMReg(PDISCPUSTATE pCpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam, int fRegAddr) 2299 2299 { 2300 int subtype, type, mod;2301 2300 NOREF(pOp); NOREF(pCpu); 2302 2301 2303 mod = pCpu->ModRM.Bits.Mod;2304 2305 type = OP_PARM_VTYPE(pParam->param);2306 subtype = OP_PARM_VSUBTYPE(pParam->param);2302 unsigned mod = pCpu->ModRM.Bits.Mod; 2303 2304 unsigned type = OP_PARM_VTYPE(pParam->fParam); 2305 unsigned subtype = OP_PARM_VSUBTYPE(pParam->fParam); 2307 2306 if (fRegAddr) 2308 2307 subtype = (pCpu->uAddrMode == DISCPUMODE_64BIT) ? OP_PARM_q : OP_PARM_d; -
trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp
r41739 r41740 543 543 case OP_FLD: 544 544 if (pCpu->bOpCode == 0xdb) /* m80fp workaround. */ 545 *(int *)&pCpu->Param1. param &= ~0x1f; /* make it pure OP_PARM_M */545 *(int *)&pCpu->Param1.fParam &= ~0x1f; /* make it pure OP_PARM_M */ 546 546 break; 547 547 case OP_LAR: /* hack w -> v, probably not correct. */ 548 *(int *)&pCpu->Param2. param &= ~0x1f;549 *(int *)&pCpu->Param2. param |= OP_PARM_v;548 *(int *)&pCpu->Param2.fParam &= ~0x1f; 549 *(int *)&pCpu->Param2.fParam |= OP_PARM_v; 550 550 break; 551 551 } … … 559 559 #define PUT_FAR() \ 560 560 do { \ 561 if ( OP_PARM_VSUBTYPE(pParam-> param) == OP_PARM_p \561 if ( OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_p \ 562 562 && pOp->uOpcode != OP_LDS /* table bugs? */ \ 563 563 && pOp->uOpcode != OP_LES \ … … 571 571 #define PUT_SIZE_OVERRIDE() \ 572 572 do { \ 573 switch (OP_PARM_VSUBTYPE(pParam-> param)) \573 switch (OP_PARM_VSUBTYPE(pParam->fParam)) \ 574 574 { \ 575 575 case OP_PARM_v: \ … … 587 587 case OP_PARM_q: PUT_SZ("qword "); break; \ 588 588 case OP_PARM_dq: \ 589 if (OP_PARM_VTYPE(pParam-> param) != OP_PARM_W) /* these are 128 bit, pray they are all unambiguous.. */ \589 if (OP_PARM_VTYPE(pParam->fParam) != OP_PARM_W) /* these are 128 bit, pray they are all unambiguous.. */ \ 590 590 PUT_SZ("qword "); \ 591 591 break; \ … … 594 594 case OP_PARM_z: break; \ 595 595 case OP_PARM_NONE: \ 596 if ( OP_PARM_VTYPE(pParam-> param) == OP_PARM_M \596 if ( OP_PARM_VTYPE(pParam->fParam) == OP_PARM_M \ 597 597 && ((pParam->fUse & DISUSE_REG_FP) || pOp->uOpcode == OP_FLD)) \ 598 598 PUT_SZ("tword "); \ … … 673 673 /* Work around mov seg,[mem16] and mov [mem16],seg as these always make a 16-bit mem 674 674 while the register variants deals with 16, 32 & 64 in the normal fashion. */ 675 if ( pParam-> param != OP_PARM_Ev675 if ( pParam->fParam != OP_PARM_Ev 676 676 || pOp->uOpcode != OP_MOV 677 677 || ( pOp->fParam1 != OP_PARM_Sw … … 808 808 ) 809 809 { 810 if (OP_PARM_VSUBTYPE(pParam-> param) == OP_PARM_b)810 if (OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_b) 811 811 PUT_SZ_STRICT("strict byte ", "byte "); 812 else if ( OP_PARM_VSUBTYPE(pParam-> param) == OP_PARM_v813 || OP_PARM_VSUBTYPE(pParam-> param) == OP_PARM_z)812 else if ( OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_v 813 || OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_z) 814 814 PUT_SZ_STRICT("strict word ", "word "); 815 815 } … … 831 831 ) 832 832 { 833 if (OP_PARM_VSUBTYPE(pParam-> param) == OP_PARM_b)833 if (OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_b) 834 834 PUT_SZ_STRICT("strict byte ", "byte "); 835 else if ( OP_PARM_VSUBTYPE(pParam-> param) == OP_PARM_v836 || OP_PARM_VSUBTYPE(pParam-> param) == OP_PARM_z)835 else if ( OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_v 836 || OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_z) 837 837 PUT_SZ_STRICT("strict dword ", "dword "); 838 838 } -
trunk/src/VBox/Disassembler/DisasmReg.cpp
r41736 r41740 203 203 DISDECL(int) DISGetParamSize(PDISCPUSTATE pCpu, PDISOPPARAM pParam) 204 204 { 205 int subtype = OP_PARM_VSUBTYPE(pParam->param);205 unsigned subtype = OP_PARM_VSUBTYPE(pParam->fParam); 206 206 207 207 if (subtype == OP_PARM_v) … … 224 224 } 225 225 226 switch (subtype)226 switch (subtype) 227 227 { 228 228 case OP_PARM_b:
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