Changeset 41744 in vbox for trunk/src/VBox/Disassembler

Timestamp:

Jun 15, 2012 2:29:09 AM (13 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

78552

Message:

DISOPPARAM: s/base.reg_*/Base.idx*Reg/ + docs

Location:

trunk/src/VBox/Disassembler

Files:

• DisasmCore.cpp (modified) (26 diffs)
• DisasmFormatYasm.cpp (modified) (11 diffs)
• DisasmReg.cpp (modified) (13 diffs)

trunk/src/VBox/Disassembler/DisasmCore.cpp

@@ -643 +643 @@
     {
         pParam->fUse |= DISUSE_BASE | regtype;
-        pParam->base.reg_gen = base;
+        pParam->Base.idxGenReg = base;
     }
     return;   /* Already fetched everything in ParseSIB; no size returned */
@@ -742 +742 @@
                 {
                     pCpu->fPrefix &= ~DISPREFIX_LOCK;
-                    pParam->base.reg_ctrl = DISCREG_CR8;
+                    pParam->Base.idxCtrlReg = DISCREG_CR8;
                 }
                 else
-                    pParam->base.reg_ctrl = reg;
+                    pParam->Base.idxCtrlReg = reg;
                 return 0;
 
             case OP_PARM_D: //debug register
                 pParam->fUse |= DISUSE_REG_DBG;
-                pParam->base.reg_dbg = reg;
+                pParam->Base.idxDbgReg = reg;
                 return 0;
 
@@ -756 +756 @@
                 reg &= 7;   /* REX.R has no effect here */
                 pParam->fUse |= DISUSE_REG_MMX;
-                pParam->base.reg_mmx = reg;
+                pParam->Base.idxMmxReg = reg;
                 return 0;
 
@@ -768 +768 @@
                 reg &= 7;   /* REX.R has no effect here */
                 pParam->fUse |= DISUSE_REG_TEST;
-                pParam->base.reg_test = reg;
+                pParam->Base.idxTestReg = reg;
                 return 0;
 
@@ -779 +779 @@
             case OP_PARM_V: //XMM register
                 pParam->fUse |= DISUSE_REG_XMM;
-                pParam->base.reg_xmm = reg;
+                pParam->Base.idxXmmReg = reg;
                 return 0;
             }
@@ -1559 +1559 @@
         {
             /* Use 32-bit registers. */
-            pParam->base.reg_gen = pParam->fParam - OP_PARM_REG_GEN32_START;
+            pParam->Base.idxGenReg = pParam->fParam - OP_PARM_REG_GEN32_START;
             pParam->fUse  |= DISUSE_REG_GEN32;
             pParam->cb     = 4;
@@ -1567 +1567 @@
         {
             /* Use 64-bit registers. */
-            pParam->base.reg_gen = pParam->fParam - OP_PARM_REG_GEN32_START;
+            pParam->Base.idxGenReg = pParam->fParam - OP_PARM_REG_GEN32_START;
             if (    (pOp->fOpType & DISOPTYPE_REXB_EXTENDS_OPREG)
                 &&  pParam == &pCpu->Param1             /* ugly assumption that it only applies to the first parameter */
                 &&  (pCpu->fPrefix & DISPREFIX_REX)
                 &&  (pCpu->fRexPrefix & DISPREFIX_REX_FLAGS))
-                pParam->base.reg_gen += 8;
+                pParam->Base.idxGenReg += 8;
 
             pParam->fUse  |= DISUSE_REG_GEN64;
@@ -1580 +1580 @@
         {
             /* Use 16-bit registers. */
-            pParam->base.reg_gen = pParam->fParam - OP_PARM_REG_GEN32_START;
+            pParam->Base.idxGenReg = pParam->fParam - OP_PARM_REG_GEN32_START;
             pParam->fUse  |= DISUSE_REG_GEN16;
             pParam->cb     = 2;
@@ -1590 +1590 @@
     {
         /* Segment ES..GS registers. */
-        pParam->base.reg_seg = (DISSELREG)(pParam->fParam - OP_PARM_REG_SEG_START);
+        pParam->Base.idxSegReg = (DISSELREG)(pParam->fParam - OP_PARM_REG_SEG_START);
         pParam->fUse  |= DISUSE_REG_SEG;
         pParam->cb     = 2;
@@ -1598 +1598 @@
     {
         /* 16-bit AX..DI registers. */
-        pParam->base.reg_gen = pParam->fParam - OP_PARM_REG_GEN16_START;
+        pParam->Base.idxGenReg = pParam->fParam - OP_PARM_REG_GEN16_START;
         pParam->fUse  |= DISUSE_REG_GEN16;
         pParam->cb     = 2;
@@ -1606 +1606 @@
     {
         /* 8-bit AL..DL, AH..DH registers. */
-        pParam->base.reg_gen = pParam->fParam - OP_PARM_REG_GEN8_START;
+        pParam->Base.idxGenReg = pParam->fParam - OP_PARM_REG_GEN8_START;
         pParam->fUse  |= DISUSE_REG_GEN8;
         pParam->cb     = 1;
@@ -1616 +1616 @@
                 &&  (pCpu->fPrefix & DISPREFIX_REX)
                 &&  (pCpu->fRexPrefix & DISPREFIX_REX_FLAGS))
-                pParam->base.reg_gen += 8;              /* least significant byte of R8-R15 */
+                pParam->Base.idxGenReg += 8;              /* least significant byte of R8-R15 */
         }
     }
@@ -1623 +1623 @@
     {
         /* FPU registers. */
-        pParam->base.reg_fp = pParam->fParam - OP_PARM_REG_FP_START;
+        pParam->Base.idxFpuReg = pParam->fParam - OP_PARM_REG_FP_START;
         pParam->fUse  |= DISUSE_REG_FP;
         pParam->cb     = 10;
@@ -1642 +1642 @@
     if (pCpu->uAddrMode == DISCPUMODE_32BIT)
     {
-        pParam->base.reg_gen = DISGREG_ESI;
+        pParam->Base.idxGenReg = DISGREG_ESI;
         pParam->fUse |= DISUSE_REG_GEN32;
     }
@@ -1648 +1648 @@
     if (pCpu->uAddrMode == DISCPUMODE_64BIT)
     {
-        pParam->base.reg_gen = DISGREG_RSI;
+        pParam->Base.idxGenReg = DISGREG_RSI;
         pParam->fUse |= DISUSE_REG_GEN64;
     }
     else
     {
-        pParam->base.reg_gen = DISGREG_SI;
+        pParam->Base.idxGenReg = DISGREG_SI;
         pParam->fUse |= DISUSE_REG_GEN16;
     }
@@ -1667 +1667 @@
     if (pCpu->uAddrMode == DISCPUMODE_32BIT)
     {
-        pParam->base.reg_gen = DISGREG_ESI;
+        pParam->Base.idxGenReg = DISGREG_ESI;
         pParam->fUse |= DISUSE_REG_GEN32;
     }
@@ -1673 +1673 @@
     if (pCpu->uAddrMode == DISCPUMODE_64BIT)
     {
-        pParam->base.reg_gen = DISGREG_RSI;
+        pParam->Base.idxGenReg = DISGREG_RSI;
         pParam->fUse |= DISUSE_REG_GEN64;
     }
     else
     {
-        pParam->base.reg_gen = DISGREG_SI;
+        pParam->Base.idxGenReg = DISGREG_SI;
         pParam->fUse |= DISUSE_REG_GEN16;
     }
@@ -1692 +1692 @@
     if (pCpu->uAddrMode == DISCPUMODE_32BIT)
     {
-        pParam->base.reg_gen = DISGREG_EDI;
+        pParam->Base.idxGenReg = DISGREG_EDI;
         pParam->fUse |= DISUSE_REG_GEN32;
     }
@@ -1698 +1698 @@
     if (pCpu->uAddrMode == DISCPUMODE_64BIT)
     {
-        pParam->base.reg_gen = DISGREG_RDI;
+        pParam->Base.idxGenReg = DISGREG_RDI;
         pParam->fUse |= DISUSE_REG_GEN64;
     }
     else
     {
-        pParam->base.reg_gen = DISGREG_DI;
+        pParam->Base.idxGenReg = DISGREG_DI;
         pParam->fUse |= DISUSE_REG_GEN16;
     }
@@ -1717 +1717 @@
     if (pCpu->uAddrMode == DISCPUMODE_32BIT)
     {
-        pParam->base.reg_gen = DISGREG_EDI;
+        pParam->Base.idxGenReg = DISGREG_EDI;
         pParam->fUse |= DISUSE_REG_GEN32;
     }
@@ -1723 +1723 @@
     if (pCpu->uAddrMode == DISCPUMODE_64BIT)
     {
-        pParam->base.reg_gen = DISGREG_RDI;
+        pParam->Base.idxGenReg = DISGREG_RDI;
         pParam->fUse |= DISUSE_REG_GEN64;
     }
     else
     {
-        pParam->base.reg_gen = DISGREG_DI;
+        pParam->Base.idxGenReg = DISGREG_DI;
         pParam->fUse |= DISUSE_REG_GEN16;
     }
@@ -2341 +2341 @@
 
         pParam->fUse |= DISUSE_REG_GEN8;
-        pParam->base.reg_gen = idx;
+        pParam->Base.idxGenReg = idx;
         break;
 
@@ -2348 +2348 @@
 
         pParam->fUse |= DISUSE_REG_GEN16;
-        pParam->base.reg_gen = idx;
+        pParam->Base.idxGenReg = idx;
         break;
 
@@ -2355 +2355 @@
 
         pParam->fUse |= DISUSE_REG_GEN32;
-        pParam->base.reg_gen = idx;
+        pParam->Base.idxGenReg = idx;
         break;
 
     case OP_PARM_q:
         pParam->fUse |= DISUSE_REG_GEN64;
-        pParam->base.reg_gen = idx;
+        pParam->Base.idxGenReg = idx;
         break;
 
@@ -2375 +2375 @@
     NOREF(pCpu); NOREF(pOp);
     pParam->fUse |= DISUSE_REG_GEN16;
-    pParam->base.reg_gen = BaseModRMReg16[idx];
+    pParam->Base.idxGenReg = BaseModRMReg16[idx];
     if (idx < 4)
     {
@@ -2395 +2395 @@
 
     pParam->fUse |= DISUSE_REG_SEG;
-    pParam->base.reg_seg = (DISSELREG)idx;
+    pParam->Base.idxSegReg = (DISSELREG)idx;
 }
 

trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp

@@ -100 +100 @@
         case DISUSE_REG_GEN8:
         {
-            Assert(pParam->base.reg_gen < RT_ELEMENTS(g_aszYasmRegGen8));
-            const char *psz = g_aszYasmRegGen8[pParam->base.reg_gen];
+            Assert(pParam->Base.idxGenReg < RT_ELEMENTS(g_aszYasmRegGen8));
+            const char *psz = g_aszYasmRegGen8[pParam->Base.idxGenReg];
             *pcchReg = 2 + !!psz[2] + !!psz[3];
             return psz;
@@ -108 +108 @@
         case DISUSE_REG_GEN16:
         {
-            Assert(pParam->base.reg_gen < RT_ELEMENTS(g_aszYasmRegGen16));
-            const char *psz = g_aszYasmRegGen16[pParam->base.reg_gen];
+            Assert(pParam->Base.idxGenReg < RT_ELEMENTS(g_aszYasmRegGen16));
+            const char *psz = g_aszYasmRegGen16[pParam->Base.idxGenReg];
             *pcchReg = 2 + !!psz[2] + !!psz[3];
             return psz;
@@ -116 +116 @@
         case DISUSE_REG_GEN32:
         {
-            Assert(pParam->base.reg_gen < RT_ELEMENTS(g_aszYasmRegGen32));
-            const char *psz = g_aszYasmRegGen32[pParam->base.reg_gen];
+            Assert(pParam->Base.idxGenReg < RT_ELEMENTS(g_aszYasmRegGen32));
+            const char *psz = g_aszYasmRegGen32[pParam->Base.idxGenReg];
             *pcchReg = 2 + !!psz[2] + !!psz[3];
             return psz;
@@ -124 +124 @@
         case DISUSE_REG_GEN64:
         {
-            Assert(pParam->base.reg_gen < RT_ELEMENTS(g_aszYasmRegGen64));
-            const char *psz = g_aszYasmRegGen64[pParam->base.reg_gen];
+            Assert(pParam->Base.idxGenReg < RT_ELEMENTS(g_aszYasmRegGen64));
+            const char *psz = g_aszYasmRegGen64[pParam->Base.idxGenReg];
             *pcchReg = 2 + !!psz[2] + !!psz[3];
             return psz;
@@ -132 +132 @@
         case DISUSE_REG_FP:
         {
-            Assert(pParam->base.reg_fp < RT_ELEMENTS(g_aszYasmRegFP));
-            const char *psz = g_aszYasmRegFP[pParam->base.reg_fp];
+            Assert(pParam->Base.idxFpuReg < RT_ELEMENTS(g_aszYasmRegFP));
+            const char *psz = g_aszYasmRegFP[pParam->Base.idxFpuReg];
             *pcchReg = 3;
             return psz;
@@ -140 +140 @@
         case DISUSE_REG_MMX:
         {
-            Assert(pParam->base.reg_mmx < RT_ELEMENTS(g_aszYasmRegMMX));
-            const char *psz = g_aszYasmRegMMX[pParam->base.reg_mmx];
+            Assert(pParam->Base.idxMmxReg < RT_ELEMENTS(g_aszYasmRegMMX));
+            const char *psz = g_aszYasmRegMMX[pParam->Base.idxMmxReg];
             *pcchReg = 3;
             return psz;
@@ -148 +148 @@
         case DISUSE_REG_XMM:
         {
-            Assert(pParam->base.reg_xmm < RT_ELEMENTS(g_aszYasmRegXMM));
-            const char *psz = g_aszYasmRegXMM[pParam->base.reg_mmx];
+            Assert(pParam->Base.idxXmmReg < RT_ELEMENTS(g_aszYasmRegXMM));
+            const char *psz = g_aszYasmRegXMM[pParam->Base.idxMmxReg];
             *pcchReg = 4 + !!psz[4];
             return psz;
@@ -156 +156 @@
         case DISUSE_REG_CR:
         {
-            Assert(pParam->base.reg_ctrl < RT_ELEMENTS(g_aszYasmRegCRx));
-            const char *psz = g_aszYasmRegCRx[pParam->base.reg_ctrl];
+            Assert(pParam->Base.idxCtrlReg < RT_ELEMENTS(g_aszYasmRegCRx));
+            const char *psz = g_aszYasmRegCRx[pParam->Base.idxCtrlReg];
             *pcchReg = 3;
             return psz;
@@ -164 +164 @@
         case DISUSE_REG_DBG:
         {
-            Assert(pParam->base.reg_dbg < RT_ELEMENTS(g_aszYasmRegDRx));
-            const char *psz = g_aszYasmRegDRx[pParam->base.reg_dbg];
+            Assert(pParam->Base.idxDbgReg < RT_ELEMENTS(g_aszYasmRegDRx));
+            const char *psz = g_aszYasmRegDRx[pParam->Base.idxDbgReg];
             *pcchReg = 3;
             return psz;
@@ -172 +172 @@
         case DISUSE_REG_SEG:
         {
-            Assert(pParam->base.reg_seg < RT_ELEMENTS(g_aszYasmRegCRx));
-            const char *psz = g_aszYasmRegSeg[pParam->base.reg_seg];
+            Assert(pParam->Base.idxSegReg < RT_ELEMENTS(g_aszYasmRegCRx));
+            const char *psz = g_aszYasmRegSeg[pParam->Base.idxSegReg];
             *pcchReg = 2;
             return psz;
@@ -180 +180 @@
         case DISUSE_REG_TEST:
         {
-            Assert(pParam->base.reg_test < RT_ELEMENTS(g_aszYasmRegTRx));
-            const char *psz = g_aszYasmRegTRx[pParam->base.reg_test];
+            Assert(pParam->Base.idxTestReg < RT_ELEMENTS(g_aszYasmRegTRx));
+            const char *psz = g_aszYasmRegTRx[pParam->Base.idxTestReg];
             *pcchReg = 3;
             return psz;

trunk/src/VBox/Disassembler/DisasmReg.cpp

@@ -270 +270 @@
         AssertCompile(DISGREG_ESP == DISGREG_SP);
         AssertCompile(DISGREG_EBP == DISGREG_BP);
-        if (pParam->base.reg_gen == DISGREG_ESP || pParam->base.reg_gen == DISGREG_EBP)
+        if (pParam->Base.idxGenReg == DISGREG_ESP || pParam->Base.idxGenReg == DISGREG_EBP)
             return DISSELREG_SS;
     }
@@ -515 +515 @@
             {
                 pParamVal->flags |= DISQPV_FLAG_8;
-                if (RT_FAILURE(DISFetchReg8(pCtx, pParam->base.reg_gen, &pParamVal->val.val8))) return VERR_INVALID_PARAMETER;
+                if (RT_FAILURE(DISFetchReg8(pCtx, pParam->Base.idxGenReg, &pParamVal->val.val8))) return VERR_INVALID_PARAMETER;
             }
             else
@@ -521 +521 @@
             {
                 pParamVal->flags |= DISQPV_FLAG_16;
-                if (RT_FAILURE(DISFetchReg16(pCtx, pParam->base.reg_gen, &pParamVal->val.val16))) return VERR_INVALID_PARAMETER;
+                if (RT_FAILURE(DISFetchReg16(pCtx, pParam->Base.idxGenReg, &pParamVal->val.val16))) return VERR_INVALID_PARAMETER;
             }
             else
@@ -527 +527 @@
             {
                 pParamVal->flags |= DISQPV_FLAG_32;
-                if (RT_FAILURE(DISFetchReg32(pCtx, pParam->base.reg_gen, &pParamVal->val.val32))) return VERR_INVALID_PARAMETER;
+                if (RT_FAILURE(DISFetchReg32(pCtx, pParam->Base.idxGenReg, &pParamVal->val.val32))) return VERR_INVALID_PARAMETER;
             }
             else
@@ -533 +533 @@
             {
                 pParamVal->flags |= DISQPV_FLAG_64;
-                if (RT_FAILURE(DISFetchReg64(pCtx, pParam->base.reg_gen, &pParamVal->val.val64))) return VERR_INVALID_PARAMETER;
+                if (RT_FAILURE(DISFetchReg64(pCtx, pParam->Base.idxGenReg, &pParamVal->val.val64))) return VERR_INVALID_PARAMETER;
             }
             else
@@ -647 +647 @@
             pParamVal->flags |= DISQPV_FLAG_8;
             pParamVal->size   = sizeof(uint8_t);
-            if (RT_FAILURE(DISFetchReg8(pCtx, pParam->base.reg_gen, &pParamVal->val.val8))) return VERR_INVALID_PARAMETER;
+            if (RT_FAILURE(DISFetchReg8(pCtx, pParam->Base.idxGenReg, &pParamVal->val.val8))) return VERR_INVALID_PARAMETER;
         }
         else
@@ -654 +654 @@
             pParamVal->flags |= DISQPV_FLAG_16;
             pParamVal->size   = sizeof(uint16_t);
-            if (RT_FAILURE(DISFetchReg16(pCtx, pParam->base.reg_gen, &pParamVal->val.val16))) return VERR_INVALID_PARAMETER;
+            if (RT_FAILURE(DISFetchReg16(pCtx, pParam->Base.idxGenReg, &pParamVal->val.val16))) return VERR_INVALID_PARAMETER;
         }
         else
@@ -661 +661 @@
             pParamVal->flags |= DISQPV_FLAG_32;
             pParamVal->size   = sizeof(uint32_t);
-            if (RT_FAILURE(DISFetchReg32(pCtx, pParam->base.reg_gen, &pParamVal->val.val32))) return VERR_INVALID_PARAMETER;
+            if (RT_FAILURE(DISFetchReg32(pCtx, pParam->Base.idxGenReg, &pParamVal->val.val32))) return VERR_INVALID_PARAMETER;
         }
         else
@@ -668 +668 @@
             pParamVal->flags |= DISQPV_FLAG_64;
             pParamVal->size   = sizeof(uint64_t);
-            if (RT_FAILURE(DISFetchReg64(pCtx, pParam->base.reg_gen, &pParamVal->val.val64))) return VERR_INVALID_PARAMETER;
+            if (RT_FAILURE(DISFetchReg64(pCtx, pParam->Base.idxGenReg, &pParamVal->val.val64))) return VERR_INVALID_PARAMETER;
         }
         else
@@ -767 +767 @@
         {
             uint8_t *pu8Reg;
-            if (RT_SUCCESS(DISPtrReg8(pCtx, pParam->base.reg_gen, &pu8Reg)))
+            if (RT_SUCCESS(DISPtrReg8(pCtx, pParam->Base.idxGenReg, &pu8Reg)))
             {
                 *pcbSize = sizeof(uint8_t);
@@ -778 +778 @@
         {
             uint16_t *pu16Reg;
-            if (RT_SUCCESS(DISPtrReg16(pCtx, pParam->base.reg_gen, &pu16Reg)))
+            if (RT_SUCCESS(DISPtrReg16(pCtx, pParam->Base.idxGenReg, &pu16Reg)))
             {
                 *pcbSize = sizeof(uint16_t);
@@ -789 +789 @@
         {
             uint32_t *pu32Reg;
-            if (RT_SUCCESS(DISPtrReg32(pCtx, pParam->base.reg_gen, &pu32Reg)))
+            if (RT_SUCCESS(DISPtrReg32(pCtx, pParam->Base.idxGenReg, &pu32Reg)))
             {
                 *pcbSize = sizeof(uint32_t);
@@ -800 +800 @@
         {
             uint64_t *pu64Reg;
-            if (RT_SUCCESS(DISPtrReg64(pCtx, pParam->base.reg_gen, &pu64Reg)))
+            if (RT_SUCCESS(DISPtrReg64(pCtx, pParam->Base.idxGenReg, &pu64Reg)))
             {
                 *pcbSize = sizeof(uint64_t);