Changeset 41789 in vbox for trunk/src/VBox
- Timestamp:
- Jun 16, 2012 8:24:50 PM (13 years ago)
- Location:
- trunk/src/VBox/Disassembler
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Disassembler/Disasm.cpp
r41731 r41789 33 33 * 34 34 * @returns VBox error code 35 * @param pCpu Pointer to cpu structure which have DISCPUSTATE::mode36 * set correctly.37 35 * @param pvInstr Pointer to the instruction to disassemble. 36 * @param enmCpuMode The CPU state. 37 * @param pDis The disassembler state (output). 38 38 * @param pcbInstr Where to store the size of the instruction. NULL is 39 39 * allowed. … … 43 43 * @todo Define output callback. 44 44 */ 45 DISDECL(int) DISInstrToStr(void const *pvInstr, DISCPUMODE enmCpuMode, PDISCPUSTATE p Cpu, uint32_t *pcbInstr,45 DISDECL(int) DISInstrToStr(void const *pvInstr, DISCPUMODE enmCpuMode, PDISCPUSTATE pDis, uint32_t *pcbInstr, 46 46 char *pszOutput, size_t cbOutput) 47 47 { 48 48 return DISInstrToStrEx((uintptr_t)pvInstr, enmCpuMode, NULL, NULL, DISOPTYPE_ALL, 49 p Cpu, pcbInstr, pszOutput, cbOutput);49 pDis, pcbInstr, pszOutput, cbOutput); 50 50 } 51 51 … … 59 59 * @param pvUser The user argument (found in 60 60 * DISCPUSTATE::pvUser). 61 * @param p Cpu Where to return the disassembled instruction.61 * @param pDis The disassembler state (output). 62 62 * @param pcbInstr Where to store the size of the instruction. NULL is 63 63 * allowed. … … 68 68 */ 69 69 DISDECL(int) DISInstrToStrWithReader(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, PFNDISREADBYTES pfnReadBytes, void *pvUser, 70 PDISCPUSTATE p Cpu, uint32_t *pcbInstr, char *pszOutput, size_t cbOutput)70 PDISCPUSTATE pDis, uint32_t *pcbInstr, char *pszOutput, size_t cbOutput) 71 71 72 72 { 73 73 return DISInstrToStrEx(uInstrAddr, enmCpuMode, pfnReadBytes, pvUser, DISOPTYPE_ALL, 74 p Cpu, pcbInstr, pszOutput, cbOutput);74 pDis, pcbInstr, pszOutput, cbOutput); 75 75 } 76 76 … … 83 83 * @param pfnCallback The byte fetcher callback. 84 84 * @param uFilter Instruction filter. 85 * @param p Cpu Where to return the disassembled instruction.85 * @param pDis Where to return the disassembled instruction info. 86 86 * @param pcbInstr Where to store the size of the instruction. NULL is 87 87 * allowed. … … 93 93 DISDECL(int) DISInstrToStrEx(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, 94 94 PFNDISREADBYTES pfnReadBytes, void *pvUser, uint32_t uFilter, 95 PDISCPUSTATE p Cpu, uint32_t *pcbInstr, char *pszOutput, size_t cbOutput)95 PDISCPUSTATE pDis, uint32_t *pcbInstr, char *pszOutput, size_t cbOutput) 96 96 { 97 int rc = DISInstEx(uInstrAddr, enmCpuMode, uFilter, pfnReadBytes, pvUser, p Cpu, pcbInstr);97 int rc = DISInstEx(uInstrAddr, enmCpuMode, uFilter, pfnReadBytes, pvUser, pDis, pcbInstr); 98 98 if (RT_SUCCESS(rc) && pszOutput && cbOutput) 99 99 { 100 size_t cch = DISFormatYasmEx(p Cpu, pszOutput, cbOutput,100 size_t cch = DISFormatYasmEx(pDis, pszOutput, cbOutput, 101 101 DIS_FMT_FLAGS_BYTES_LEFT | DIS_FMT_FLAGS_BYTES_BRACKETS | DIS_FMT_FLAGS_BYTES_SPACED 102 102 | DIS_FMT_FLAGS_RELATIVE_BRANCH | DIS_FMT_FLAGS_ADDR_LEFT, -
trunk/src/VBox/Disassembler/DisasmCore.cpp
r41788 r41789 47 47 * Internal Functions * 48 48 *******************************************************************************/ 49 static void disasmModRMReg(PDISCPUSTATE p Cpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam, int fRegAddr);50 static void disasmModRMReg16(PDISCPUSTATE p Cpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam);51 static void disasmModRMSReg(PDISCPUSTATE p Cpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam);49 static void disasmModRMReg(PDISCPUSTATE pDis, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam, int fRegAddr); 50 static void disasmModRMReg16(PDISCPUSTATE pDis, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam); 51 static void disasmModRMSReg(PDISCPUSTATE pDis, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam); 52 52 53 53 … … 252 252 * The caller shall fend off reads beyond the DISCPUSTATE::abInstr buffer. 253 253 * 254 * @param p CpuThe disassembler state.254 * @param pDis The disassembler state. 255 255 * @param offInstr The offset of the read request. 256 256 * @param cbMin The size of the read request that needs to be 257 257 * satisfied. 258 258 */ 259 DECL_NO_INLINE(static, void) disReadMore(PDISCPUSTATE p Cpu, uint8_t offInstr, uint8_t cbMin)260 { 261 Assert(cbMin + offInstr <= sizeof(p Cpu->abInstr));259 DECL_NO_INLINE(static, void) disReadMore(PDISCPUSTATE pDis, uint8_t offInstr, uint8_t cbMin) 260 { 261 Assert(cbMin + offInstr <= sizeof(pDis->abInstr)); 262 262 263 263 /* … … 265 265 * been read and to make sure we don't leave unread gaps. 266 266 */ 267 if (offInstr < p Cpu->cbCachedInstr)268 { 269 Assert(offInstr + cbMin > p Cpu->cbCachedInstr);270 cbMin -= p Cpu->cbCachedInstr - offInstr;271 offInstr = p Cpu->cbCachedInstr;272 } 273 else if (offInstr > p Cpu->cbCachedInstr)274 { 275 cbMin += offInstr - p Cpu->cbCachedInstr;276 offInstr = p Cpu->cbCachedInstr;267 if (offInstr < pDis->cbCachedInstr) 268 { 269 Assert(offInstr + cbMin > pDis->cbCachedInstr); 270 cbMin -= pDis->cbCachedInstr - offInstr; 271 offInstr = pDis->cbCachedInstr; 272 } 273 else if (offInstr > pDis->cbCachedInstr) 274 { 275 cbMin += offInstr - pDis->cbCachedInstr; 276 offInstr = pDis->cbCachedInstr; 277 277 } 278 278 … … 282 282 * DISInstrEx API.) 283 283 */ 284 int rc = p Cpu->pfnReadBytes(pCpu, offInstr, cbMin, sizeof(pCpu->abInstr) - offInstr);284 int rc = pDis->pfnReadBytes(pDis, offInstr, cbMin, sizeof(pDis->abInstr) - offInstr); 285 285 if (RT_SUCCESS(rc)) 286 286 { 287 Assert(p Cpu->cbCachedInstr >= offInstr + cbMin);288 Assert(p Cpu->cbCachedInstr <= sizeof(pCpu->abInstr));287 Assert(pDis->cbCachedInstr >= offInstr + cbMin); 288 Assert(pDis->cbCachedInstr <= sizeof(pDis->abInstr)); 289 289 } 290 290 else 291 291 { 292 292 Log(("disReadMore failed with rc=%Rrc!!\n", rc)); 293 p Cpu->rc = VERR_DIS_MEM_READ;293 pDis->rc = VERR_DIS_MEM_READ; 294 294 } 295 295 } … … 300 300 * 301 301 * @returns The requested byte. 302 * @param p CpuThe disassembler state.302 * @param pDis The disassembler state. 303 303 * @param offInstr The offset of the byte relative to the 304 304 * instruction. 305 305 */ 306 DECL_NO_INLINE(static, uint8_t) disReadByteSlow(PDISCPUSTATE p Cpu, size_t offInstr)306 DECL_NO_INLINE(static, uint8_t) disReadByteSlow(PDISCPUSTATE pDis, size_t offInstr) 307 307 { 308 308 if (RT_UNLIKELY(offInstr >= DIS_MAX_INSTR_LENGTH)) 309 309 { 310 310 Log(("disReadByte: too long instruction...\n")); 311 p Cpu->rc = VERR_DIS_TOO_LONG_INSTR;311 pDis->rc = VERR_DIS_TOO_LONG_INSTR; 312 312 return 0; 313 313 } 314 314 315 disReadMore(p Cpu, (uint8_t)offInstr, 1);316 return p Cpu->abInstr[offInstr];315 disReadMore(pDis, (uint8_t)offInstr, 1); 316 return pDis->abInstr[offInstr]; 317 317 } 318 318 … … 322 322 * 323 323 * @returns The requested byte. 324 * @param p CpuThe disassembler state.324 * @param pDis The disassembler state. 325 325 * @param uAddress The address. 326 326 */ 327 DECLINLINE(uint8_t) disReadByte(PDISCPUSTATE p Cpu, size_t offInstr)328 { 329 if (RT_UNLIKELY(offInstr >= p Cpu->cbCachedInstr))330 return disReadByteSlow(p Cpu, offInstr);331 332 return p Cpu->abInstr[offInstr];327 DECLINLINE(uint8_t) disReadByte(PDISCPUSTATE pDis, size_t offInstr) 328 { 329 if (RT_UNLIKELY(offInstr >= pDis->cbCachedInstr)) 330 return disReadByteSlow(pDis, offInstr); 331 332 return pDis->abInstr[offInstr]; 333 333 } 334 334 … … 338 338 * 339 339 * @returns The requested word. 340 * @param p CpuThe disassembler state.340 * @param pDis The disassembler state. 341 341 * @param offInstr The offset of the word relative to the 342 342 * instruction. 343 343 */ 344 DECL_NO_INLINE(static, uint16_t) disReadWordSlow(PDISCPUSTATE p Cpu, size_t offInstr)344 DECL_NO_INLINE(static, uint16_t) disReadWordSlow(PDISCPUSTATE pDis, size_t offInstr) 345 345 { 346 346 if (RT_UNLIKELY(offInstr + 2 > DIS_MAX_INSTR_LENGTH)) 347 347 { 348 348 Log(("disReadWord: too long instruction...\n")); 349 p Cpu->rc = VERR_DIS_TOO_LONG_INSTR;349 pDis->rc = VERR_DIS_TOO_LONG_INSTR; 350 350 if (offInstr < DIS_MAX_INSTR_LENGTH) 351 return p Cpu->abInstr[offInstr];351 return pDis->abInstr[offInstr]; 352 352 return 0; 353 353 } 354 354 355 disReadMore(p Cpu, (uint8_t)offInstr, 2);355 disReadMore(pDis, (uint8_t)offInstr, 2); 356 356 #ifdef DIS_HOST_UNALIGNED_ACCESS_OK 357 return *(uint16_t const *)&p Cpu->abInstr[offInstr];357 return *(uint16_t const *)&pDis->abInstr[offInstr]; 358 358 #else 359 return RT_MAKE_U16(p Cpu->abInstr[offInstr], pCpu->abInstr[offInstr + 1]);359 return RT_MAKE_U16(pDis->abInstr[offInstr], pDis->abInstr[offInstr + 1]); 360 360 #endif 361 361 } … … 366 366 * 367 367 * @returns The requested word. 368 * @param p CpuThe disassembler state.368 * @param pDis The disassembler state. 369 369 * @param offInstr The offset of the qword relative to the 370 370 * instruction. 371 371 */ 372 DECLINLINE(uint16_t) disReadWord(PDISCPUSTATE p Cpu, size_t offInstr)373 { 374 if (RT_UNLIKELY(offInstr + 2 > p Cpu->cbCachedInstr))375 return disReadWordSlow(p Cpu, offInstr);372 DECLINLINE(uint16_t) disReadWord(PDISCPUSTATE pDis, size_t offInstr) 373 { 374 if (RT_UNLIKELY(offInstr + 2 > pDis->cbCachedInstr)) 375 return disReadWordSlow(pDis, offInstr); 376 376 377 377 #ifdef DIS_HOST_UNALIGNED_ACCESS_OK 378 return *(uint16_t const *)&p Cpu->abInstr[offInstr];378 return *(uint16_t const *)&pDis->abInstr[offInstr]; 379 379 #else 380 return RT_MAKE_U16(p Cpu->abInstr[offInstr], pCpu->abInstr[offInstr + 1]);380 return RT_MAKE_U16(pDis->abInstr[offInstr], pDis->abInstr[offInstr + 1]); 381 381 #endif 382 382 } … … 387 387 * 388 388 * @returns The requested dword. 389 * @param p CpuThe disassembler state.389 * @param pDis The disassembler state. 390 390 * @param offInstr The offset of the dword relative to the 391 391 * instruction. 392 392 */ 393 DECL_NO_INLINE(static, uint32_t) disReadDWordSlow(PDISCPUSTATE p Cpu, size_t offInstr)393 DECL_NO_INLINE(static, uint32_t) disReadDWordSlow(PDISCPUSTATE pDis, size_t offInstr) 394 394 { 395 395 if (RT_UNLIKELY(offInstr + 4 > DIS_MAX_INSTR_LENGTH)) 396 396 { 397 397 Log(("disReadDWord: too long instruction...\n")); 398 p Cpu->rc = VERR_DIS_TOO_LONG_INSTR;398 pDis->rc = VERR_DIS_TOO_LONG_INSTR; 399 399 switch ((RTUINTPTR)DIS_MAX_INSTR_LENGTH - offInstr) 400 400 { 401 401 case 1: 402 return RT_MAKE_U32_FROM_U8(p Cpu->abInstr[offInstr], 0, 0, 0);402 return RT_MAKE_U32_FROM_U8(pDis->abInstr[offInstr], 0, 0, 0); 403 403 case 2: 404 return RT_MAKE_U32_FROM_U8(p Cpu->abInstr[offInstr], pCpu->abInstr[offInstr + 1], 0, 0);404 return RT_MAKE_U32_FROM_U8(pDis->abInstr[offInstr], pDis->abInstr[offInstr + 1], 0, 0); 405 405 case 3: 406 return RT_MAKE_U32_FROM_U8(p Cpu->abInstr[offInstr], pCpu->abInstr[offInstr + 1], pCpu->abInstr[offInstr + 2], 0);406 return RT_MAKE_U32_FROM_U8(pDis->abInstr[offInstr], pDis->abInstr[offInstr + 1], pDis->abInstr[offInstr + 2], 0); 407 407 } 408 408 return 0; 409 409 } 410 410 411 disReadMore(p Cpu, (uint8_t)offInstr, 4);411 disReadMore(pDis, (uint8_t)offInstr, 4); 412 412 #ifdef DIS_HOST_UNALIGNED_ACCESS_OK 413 return *(uint32_t const *)&p Cpu->abInstr[offInstr];413 return *(uint32_t const *)&pDis->abInstr[offInstr]; 414 414 #else 415 return RT_MAKE_U32_FROM_U8(p Cpu->abInstr[offInstr ], pCpu->abInstr[offInstr + 1],416 p Cpu->abInstr[offInstr + 2], pCpu->abInstr[offInstr + 3]);415 return RT_MAKE_U32_FROM_U8(pDis->abInstr[offInstr ], pDis->abInstr[offInstr + 1], 416 pDis->abInstr[offInstr + 2], pDis->abInstr[offInstr + 3]); 417 417 #endif 418 418 } … … 423 423 * 424 424 * @returns The requested dword. 425 * @param p CpuThe disassembler state.425 * @param pDis The disassembler state. 426 426 * @param offInstr The offset of the qword relative to the 427 427 * instruction. 428 428 */ 429 DECLINLINE(uint32_t) disReadDWord(PDISCPUSTATE p Cpu, size_t offInstr)430 { 431 if (RT_UNLIKELY(offInstr + 4 > p Cpu->cbCachedInstr))432 return disReadDWordSlow(p Cpu, offInstr);429 DECLINLINE(uint32_t) disReadDWord(PDISCPUSTATE pDis, size_t offInstr) 430 { 431 if (RT_UNLIKELY(offInstr + 4 > pDis->cbCachedInstr)) 432 return disReadDWordSlow(pDis, offInstr); 433 433 434 434 #ifdef DIS_HOST_UNALIGNED_ACCESS_OK 435 return *(uint32_t const *)&p Cpu->abInstr[offInstr];435 return *(uint32_t const *)&pDis->abInstr[offInstr]; 436 436 #else 437 return RT_MAKE_U32_FROM_U8(p Cpu->abInstr[offInstr ], pCpu->abInstr[offInstr + 1],438 p Cpu->abInstr[offInstr + 2], pCpu->abInstr[offInstr + 3]);437 return RT_MAKE_U32_FROM_U8(pDis->abInstr[offInstr ], pDis->abInstr[offInstr + 1], 438 pDis->abInstr[offInstr + 2], pDis->abInstr[offInstr + 3]); 439 439 #endif 440 440 } … … 445 445 * 446 446 * @returns The requested qword. 447 * @param p CpuThe disassembler state.447 * @param pDis The disassembler state. 448 448 * @param offInstr The offset of the qword relative to the 449 449 * instruction. 450 450 */ 451 DECL_NO_INLINE(static, uint64_t) disReadQWordSlow(PDISCPUSTATE p Cpu, size_t offInstr)451 DECL_NO_INLINE(static, uint64_t) disReadQWordSlow(PDISCPUSTATE pDis, size_t offInstr) 452 452 { 453 453 if (RT_UNLIKELY(offInstr + 8 > DIS_MAX_INSTR_LENGTH)) 454 454 { 455 455 Log(("disReadQWord: too long instruction...\n")); 456 p Cpu->rc = VERR_DIS_TOO_LONG_INSTR;456 pDis->rc = VERR_DIS_TOO_LONG_INSTR; 457 457 switch ((RTUINTPTR)DIS_MAX_INSTR_LENGTH - offInstr) 458 458 { 459 459 case 1: 460 return RT_MAKE_U64_FROM_U8(p Cpu->abInstr[offInstr], 0, 0, 0, 0, 0, 0, 0);460 return RT_MAKE_U64_FROM_U8(pDis->abInstr[offInstr], 0, 0, 0, 0, 0, 0, 0); 461 461 case 2: 462 return RT_MAKE_U64_FROM_U8(p Cpu->abInstr[offInstr], pCpu->abInstr[offInstr + 1], 0, 0, 0, 0, 0, 0);462 return RT_MAKE_U64_FROM_U8(pDis->abInstr[offInstr], pDis->abInstr[offInstr + 1], 0, 0, 0, 0, 0, 0); 463 463 case 3: 464 return RT_MAKE_U64_FROM_U8(p Cpu->abInstr[offInstr ], pCpu->abInstr[offInstr + 1],465 p Cpu->abInstr[offInstr + 2], 0, 0, 0, 0, 0);464 return RT_MAKE_U64_FROM_U8(pDis->abInstr[offInstr ], pDis->abInstr[offInstr + 1], 465 pDis->abInstr[offInstr + 2], 0, 0, 0, 0, 0); 466 466 case 4: 467 return RT_MAKE_U64_FROM_U8(p Cpu->abInstr[offInstr ], pCpu->abInstr[offInstr + 1],468 p Cpu->abInstr[offInstr + 2], pCpu->abInstr[offInstr + 3],469 p Cpu->abInstr[offInstr + 4], 0, 0, 0);467 return RT_MAKE_U64_FROM_U8(pDis->abInstr[offInstr ], pDis->abInstr[offInstr + 1], 468 pDis->abInstr[offInstr + 2], pDis->abInstr[offInstr + 3], 469 pDis->abInstr[offInstr + 4], 0, 0, 0); 470 470 case 5: 471 return RT_MAKE_U64_FROM_U8(p Cpu->abInstr[offInstr ], pCpu->abInstr[offInstr + 1],472 p Cpu->abInstr[offInstr + 2], pCpu->abInstr[offInstr + 3],473 p Cpu->abInstr[offInstr + 4], pCpu->abInstr[offInstr + 5], 0, 0);471 return RT_MAKE_U64_FROM_U8(pDis->abInstr[offInstr ], pDis->abInstr[offInstr + 1], 472 pDis->abInstr[offInstr + 2], pDis->abInstr[offInstr + 3], 473 pDis->abInstr[offInstr + 4], pDis->abInstr[offInstr + 5], 0, 0); 474 474 case 6: 475 return RT_MAKE_U64_FROM_U8(p Cpu->abInstr[offInstr ], pCpu->abInstr[offInstr + 1],476 p Cpu->abInstr[offInstr + 2], pCpu->abInstr[offInstr + 3],477 p Cpu->abInstr[offInstr + 4], pCpu->abInstr[offInstr + 5],478 p Cpu->abInstr[offInstr + 6], 0);475 return RT_MAKE_U64_FROM_U8(pDis->abInstr[offInstr ], pDis->abInstr[offInstr + 1], 476 pDis->abInstr[offInstr + 2], pDis->abInstr[offInstr + 3], 477 pDis->abInstr[offInstr + 4], pDis->abInstr[offInstr + 5], 478 pDis->abInstr[offInstr + 6], 0); 479 479 } 480 480 return 0; 481 481 } 482 482 483 disReadMore(p Cpu, (uint8_t)offInstr, 8);483 disReadMore(pDis, (uint8_t)offInstr, 8); 484 484 #ifdef DIS_HOST_UNALIGNED_ACCESS_OK 485 return *(uint64_t const *)&p Cpu->abInstr[offInstr];485 return *(uint64_t const *)&pDis->abInstr[offInstr]; 486 486 #else 487 return RT_MAKE_U64_FROM_U8(p Cpu->abInstr[offInstr ], pCpu->abInstr[offInstr + 1],488 p Cpu->abInstr[offInstr + 2], pCpu->abInstr[offInstr + 3],489 p Cpu->abInstr[offInstr + 4], pCpu->abInstr[offInstr + 5],490 p Cpu->abInstr[offInstr + 6], pCpu->abInstr[offInstr + 7]);487 return RT_MAKE_U64_FROM_U8(pDis->abInstr[offInstr ], pDis->abInstr[offInstr + 1], 488 pDis->abInstr[offInstr + 2], pDis->abInstr[offInstr + 3], 489 pDis->abInstr[offInstr + 4], pDis->abInstr[offInstr + 5], 490 pDis->abInstr[offInstr + 6], pDis->abInstr[offInstr + 7]); 491 491 #endif 492 492 } … … 497 497 * 498 498 * @returns The requested qword. 499 * @param p CpuThe disassembler state.499 * @param pDis The disassembler state. 500 500 * @param uAddress The address. 501 501 */ 502 DECLINLINE(uint64_t) disReadQWord(PDISCPUSTATE p Cpu, size_t offInstr)503 { 504 if (RT_UNLIKELY(offInstr + 8 > p Cpu->cbCachedInstr))505 return disReadQWordSlow(p Cpu, offInstr);502 DECLINLINE(uint64_t) disReadQWord(PDISCPUSTATE pDis, size_t offInstr) 503 { 504 if (RT_UNLIKELY(offInstr + 8 > pDis->cbCachedInstr)) 505 return disReadQWordSlow(pDis, offInstr); 506 506 507 507 #ifdef DIS_HOST_UNALIGNED_ACCESS_OK 508 return *(uint64_t const *)&p Cpu->abInstr[offInstr];508 return *(uint64_t const *)&pDis->abInstr[offInstr]; 509 509 #else 510 return RT_MAKE_U64_FROM_U8(p Cpu->abInstr[offInstr ], pCpu->abInstr[offInstr + 1],511 p Cpu->abInstr[offInstr + 2], pCpu->abInstr[offInstr + 3],512 p Cpu->abInstr[offInstr + 4], pCpu->abInstr[offInstr + 5],513 p Cpu->abInstr[offInstr + 6], pCpu->abInstr[offInstr + 7]);510 return RT_MAKE_U64_FROM_U8(pDis->abInstr[offInstr ], pDis->abInstr[offInstr + 1], 511 pDis->abInstr[offInstr + 2], pDis->abInstr[offInstr + 3], 512 pDis->abInstr[offInstr + 4], pDis->abInstr[offInstr + 5], 513 pDis->abInstr[offInstr + 6], pDis->abInstr[offInstr + 7]); 514 514 #endif 515 515 } … … 519 519 //***************************************************************************** 520 520 //***************************************************************************** 521 static size_t disParseInstruction(size_t offInstr, PCDISOPCODE pOp, PDISCPUSTATE p Cpu)521 static size_t disParseInstruction(size_t offInstr, PCDISOPCODE pOp, PDISCPUSTATE pDis) 522 522 { 523 523 size_t size = 0; 524 524 bool fFiltered = false; 525 525 526 Assert(pOp); Assert(p Cpu);526 Assert(pOp); Assert(pDis); 527 527 528 528 // Store the opcode format string for disasmPrintf 529 p Cpu->pCurInstr = pOp;529 pDis->pCurInstr = pOp; 530 530 531 531 /* … … 533 533 * Note! Multibyte opcodes are always marked harmless until the final byte. 534 534 */ 535 if ((pOp->fOpType & p Cpu->fFilter) == 0)535 if ((pOp->fOpType & pDis->fFilter) == 0) 536 536 { 537 537 fFiltered = true; 538 p Cpu->pfnDisasmFnTable = g_apfnCalcSize;538 pDis->pfnDisasmFnTable = g_apfnCalcSize; 539 539 } 540 540 else 541 541 { 542 542 /* Not filtered out -> full disassembly */ 543 p Cpu->pfnDisasmFnTable = g_apfnFullDisasm;543 pDis->pfnDisasmFnTable = g_apfnFullDisasm; 544 544 } 545 545 546 546 // Should contain the parameter type on input 547 p Cpu->Param1.fParam = pOp->fParam1;548 p Cpu->Param2.fParam = pOp->fParam2;549 p Cpu->Param3.fParam = pOp->fParam3;547 pDis->Param1.fParam = pOp->fParam1; 548 pDis->Param2.fParam = pOp->fParam2; 549 pDis->Param3.fParam = pOp->fParam3; 550 550 551 551 /* Correct the operand size if the instruction is marked as forced or default 64 bits */ 552 if (p Cpu->uCpuMode == DISCPUMODE_64BIT)552 if (pDis->uCpuMode == DISCPUMODE_64BIT) 553 553 { 554 554 if (pOp->fOpType & DISOPTYPE_FORCED_64_OP_SIZE) 555 p Cpu->uOpMode = DISCPUMODE_64BIT;555 pDis->uOpMode = DISCPUMODE_64BIT; 556 556 else 557 557 if ( (pOp->fOpType & DISOPTYPE_DEFAULT_64_OP_SIZE) 558 && !(p Cpu->fPrefix & DISPREFIX_OPSIZE))559 p Cpu->uOpMode = DISCPUMODE_64BIT;558 && !(pDis->fPrefix & DISPREFIX_OPSIZE)) 559 pDis->uOpMode = DISCPUMODE_64BIT; 560 560 } 561 561 else … … 563 563 { 564 564 /* Forced 32 bits operand size for certain instructions (mov crx, mov drx). */ 565 Assert(p Cpu->uCpuMode != DISCPUMODE_64BIT);566 p Cpu->uOpMode = DISCPUMODE_32BIT;565 Assert(pDis->uCpuMode != DISCPUMODE_64BIT); 566 pDis->uOpMode = DISCPUMODE_32BIT; 567 567 } 568 568 569 569 if (pOp->idxParse1 != IDX_ParseNop) 570 570 { 571 size += p Cpu->pfnDisasmFnTable[pOp->idxParse1](offInstr, pOp, &pCpu->Param1, pCpu);572 if (fFiltered == false) p Cpu->Param1.cb = DISGetParamSize(pCpu, &pCpu->Param1);571 size += pDis->pfnDisasmFnTable[pOp->idxParse1](offInstr, pOp, &pDis->Param1, pDis); 572 if (fFiltered == false) pDis->Param1.cb = DISGetParamSize(pDis, &pDis->Param1); 573 573 } 574 574 575 575 if (pOp->idxParse2 != IDX_ParseNop) 576 576 { 577 size += p Cpu->pfnDisasmFnTable[pOp->idxParse2](offInstr+size, pOp, &pCpu->Param2, pCpu);578 if (fFiltered == false) p Cpu->Param2.cb = DISGetParamSize(pCpu, &pCpu->Param2);577 size += pDis->pfnDisasmFnTable[pOp->idxParse2](offInstr+size, pOp, &pDis->Param2, pDis); 578 if (fFiltered == false) pDis->Param2.cb = DISGetParamSize(pDis, &pDis->Param2); 579 579 } 580 580 581 581 if (pOp->idxParse3 != IDX_ParseNop) 582 582 { 583 size += p Cpu->pfnDisasmFnTable[pOp->idxParse3](offInstr+size, pOp, &pCpu->Param3, pCpu);584 if (fFiltered == false) p Cpu->Param3.cb = DISGetParamSize(pCpu, &pCpu->Param3);583 size += pDis->pfnDisasmFnTable[pOp->idxParse3](offInstr+size, pOp, &pDis->Param3, pDis); 584 if (fFiltered == false) pDis->Param3.cb = DISGetParamSize(pDis, &pDis->Param3); 585 585 } 586 586 // else simple one byte instruction … … 591 591 /* Floating point opcode parsing */ 592 592 //***************************************************************************** 593 static size_t ParseEscFP(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)593 static size_t ParseEscFP(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 594 594 { 595 595 int index; … … 599 599 NOREF(pOp); 600 600 601 ModRM = disReadByte(p Cpu, offInstr);602 603 index = p Cpu->bOpCode - 0xD8;601 ModRM = disReadByte(pDis, offInstr); 602 603 index = pDis->bOpCode - 0xD8; 604 604 if (ModRM <= 0xBF) 605 605 { 606 606 fpop = &(g_apMapX86_FP_Low[index])[MODRM_REG(ModRM)]; 607 p Cpu->pCurInstr = (PCDISOPCODE)fpop;607 pDis->pCurInstr = (PCDISOPCODE)fpop; 608 608 609 609 // Should contain the parameter type on input 610 p Cpu->Param1.fParam = fpop->fParam1;611 p Cpu->Param2.fParam = fpop->fParam2;610 pDis->Param1.fParam = fpop->fParam1; 611 pDis->Param2.fParam = fpop->fParam2; 612 612 } 613 613 else 614 614 { 615 615 fpop = &(g_apMapX86_FP_High[index])[ModRM - 0xC0]; 616 p Cpu->pCurInstr = (PCDISOPCODE)fpop;616 pDis->pCurInstr = (PCDISOPCODE)fpop; 617 617 } 618 618 … … 621 621 * @note Multibyte opcodes are always marked harmless until the final byte. 622 622 */ 623 if ((fpop->fOpType & p Cpu->fFilter) == 0)624 p Cpu->pfnDisasmFnTable = g_apfnCalcSize;623 if ((fpop->fOpType & pDis->fFilter) == 0) 624 pDis->pfnDisasmFnTable = g_apfnCalcSize; 625 625 else 626 626 /* Not filtered out -> full disassembly */ 627 p Cpu->pfnDisasmFnTable = g_apfnFullDisasm;627 pDis->pfnDisasmFnTable = g_apfnFullDisasm; 628 628 629 629 /* Correct the operand size if the instruction is marked as forced or default 64 bits */ 630 if (p Cpu->uCpuMode == DISCPUMODE_64BIT)630 if (pDis->uCpuMode == DISCPUMODE_64BIT) 631 631 { 632 632 /* Note: redundant, but just in case this ever changes */ 633 633 if (fpop->fOpType & DISOPTYPE_FORCED_64_OP_SIZE) 634 p Cpu->uOpMode = DISCPUMODE_64BIT;634 pDis->uOpMode = DISCPUMODE_64BIT; 635 635 else 636 636 if ( (fpop->fOpType & DISOPTYPE_DEFAULT_64_OP_SIZE) 637 && !(p Cpu->fPrefix & DISPREFIX_OPSIZE))638 p Cpu->uOpMode = DISCPUMODE_64BIT;637 && !(pDis->fPrefix & DISPREFIX_OPSIZE)) 638 pDis->uOpMode = DISCPUMODE_64BIT; 639 639 } 640 640 … … 644 644 645 645 if (fpop->idxParse1 != IDX_ParseNop) 646 size += p Cpu->pfnDisasmFnTable[fpop->idxParse1](offInstr+size, (PCDISOPCODE)fpop, pParam, pCpu);646 size += pDis->pfnDisasmFnTable[fpop->idxParse1](offInstr+size, (PCDISOPCODE)fpop, pParam, pDis); 647 647 648 648 if (fpop->idxParse2 != IDX_ParseNop) 649 size += p Cpu->pfnDisasmFnTable[fpop->idxParse2](offInstr+size, (PCDISOPCODE)fpop, pParam, pCpu);649 size += pDis->pfnDisasmFnTable[fpop->idxParse2](offInstr+size, (PCDISOPCODE)fpop, pParam, pDis); 650 650 651 651 return size; … … 656 656 // Scale Index Base 657 657 //***************************************************************************** 658 static void UseSIB(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)658 static void UseSIB(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 659 659 { 660 660 NOREF(offInstr); NOREF(pOp); 661 661 662 unsigned scale = p Cpu->SIB.Bits.Scale;663 unsigned base = p Cpu->SIB.Bits.Base;664 unsigned index = p Cpu->SIB.Bits.Index;662 unsigned scale = pDis->SIB.Bits.Scale; 663 unsigned base = pDis->SIB.Bits.Base; 664 unsigned index = pDis->SIB.Bits.Index; 665 665 666 666 unsigned regtype; 667 if (p Cpu->uAddrMode == DISCPUMODE_32BIT)667 if (pDis->uAddrMode == DISCPUMODE_32BIT) 668 668 regtype = DISUSE_REG_GEN32; 669 669 else … … 682 682 } 683 683 684 if (base == 5 && p Cpu->ModRM.Bits.Mod == 0)684 if (base == 5 && pDis->ModRM.Bits.Mod == 0) 685 685 { 686 686 // [scaled index] + disp32 687 if (p Cpu->uAddrMode == DISCPUMODE_32BIT)687 if (pDis->uAddrMode == DISCPUMODE_32BIT) 688 688 { 689 689 pParam->fUse |= DISUSE_DISPLACEMENT32; 690 pParam->uDisp.i32 = p Cpu->i32SibDisp;690 pParam->uDisp.i32 = pDis->i32SibDisp; 691 691 } 692 692 else 693 693 { /* sign-extend to 64 bits */ 694 694 pParam->fUse |= DISUSE_DISPLACEMENT64; 695 pParam->uDisp.i64 = p Cpu->i32SibDisp;695 pParam->uDisp.i64 = pDis->i32SibDisp; 696 696 } 697 697 } … … 705 705 //***************************************************************************** 706 706 //***************************************************************************** 707 static size_t ParseSIB(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)707 static size_t ParseSIB(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 708 708 { 709 709 unsigned size = sizeof(uint8_t); … … 711 711 NOREF(pOp); NOREF(pParam); 712 712 713 SIB = disReadByte(p Cpu, offInstr);713 SIB = disReadByte(pDis, offInstr); 714 714 offInstr += size; 715 715 716 p Cpu->SIB.Bits.Base = SIB_BASE(SIB);717 p Cpu->SIB.Bits.Index = SIB_INDEX(SIB);718 p Cpu->SIB.Bits.Scale = SIB_SCALE(SIB);719 720 if (p Cpu->fPrefix & DISPREFIX_REX)716 pDis->SIB.Bits.Base = SIB_BASE(SIB); 717 pDis->SIB.Bits.Index = SIB_INDEX(SIB); 718 pDis->SIB.Bits.Scale = SIB_SCALE(SIB); 719 720 if (pDis->fPrefix & DISPREFIX_REX) 721 721 { 722 722 /* REX.B extends the Base field if not scaled index + disp32 */ 723 if (!(p Cpu->SIB.Bits.Base == 5 && pCpu->ModRM.Bits.Mod == 0))724 p Cpu->SIB.Bits.Base |= ((!!(pCpu->fRexPrefix & DISPREFIX_REX_FLAGS_B)) << 3);725 726 p Cpu->SIB.Bits.Index |= ((!!(pCpu->fRexPrefix & DISPREFIX_REX_FLAGS_X)) << 3);727 } 728 729 if ( p Cpu->SIB.Bits.Base == 5730 && p Cpu->ModRM.Bits.Mod == 0)723 if (!(pDis->SIB.Bits.Base == 5 && pDis->ModRM.Bits.Mod == 0)) 724 pDis->SIB.Bits.Base |= ((!!(pDis->fRexPrefix & DISPREFIX_REX_FLAGS_B)) << 3); 725 726 pDis->SIB.Bits.Index |= ((!!(pDis->fRexPrefix & DISPREFIX_REX_FLAGS_X)) << 3); 727 } 728 729 if ( pDis->SIB.Bits.Base == 5 730 && pDis->ModRM.Bits.Mod == 0) 731 731 { 732 732 /* Additional 32 bits displacement. No change in long mode. */ 733 p Cpu->i32SibDisp = disReadDWord(pCpu, offInstr);733 pDis->i32SibDisp = disReadDWord(pDis, offInstr); 734 734 size += sizeof(int32_t); 735 735 } … … 738 738 //***************************************************************************** 739 739 //***************************************************************************** 740 static size_t ParseSIB_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)740 static size_t ParseSIB_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 741 741 { 742 742 unsigned size = sizeof(uint8_t); … … 744 744 NOREF(pOp); NOREF(pParam); 745 745 746 SIB = disReadByte(p Cpu, offInstr);747 748 p Cpu->SIB.Bits.Base = SIB_BASE(SIB);749 p Cpu->SIB.Bits.Index = SIB_INDEX(SIB);750 p Cpu->SIB.Bits.Scale = SIB_SCALE(SIB);751 752 if (p Cpu->fPrefix & DISPREFIX_REX)746 SIB = disReadByte(pDis, offInstr); 747 748 pDis->SIB.Bits.Base = SIB_BASE(SIB); 749 pDis->SIB.Bits.Index = SIB_INDEX(SIB); 750 pDis->SIB.Bits.Scale = SIB_SCALE(SIB); 751 752 if (pDis->fPrefix & DISPREFIX_REX) 753 753 { 754 754 /* REX.B extends the Base field. */ 755 p Cpu->SIB.Bits.Base |= ((!!(pCpu->fRexPrefix & DISPREFIX_REX_FLAGS_B)) << 3);755 pDis->SIB.Bits.Base |= ((!!(pDis->fRexPrefix & DISPREFIX_REX_FLAGS_B)) << 3); 756 756 /* REX.X extends the Index field. */ 757 p Cpu->SIB.Bits.Index |= ((!!(pCpu->fRexPrefix & DISPREFIX_REX_FLAGS_X)) << 3);758 } 759 760 if ( p Cpu->SIB.Bits.Base == 5761 && p Cpu->ModRM.Bits.Mod == 0)757 pDis->SIB.Bits.Index |= ((!!(pDis->fRexPrefix & DISPREFIX_REX_FLAGS_X)) << 3); 758 } 759 760 if ( pDis->SIB.Bits.Base == 5 761 && pDis->ModRM.Bits.Mod == 0) 762 762 { 763 763 /* Additional 32 bits displacement. No change in long mode. */ … … 771 771 // Mod Reg/Opcode R/M 772 772 //***************************************************************************** 773 static size_t UseModRM(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)773 static size_t UseModRM(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 774 774 { 775 775 unsigned vtype = OP_PARM_VTYPE(pParam->fParam); 776 unsigned reg = p Cpu->ModRM.Bits.Reg;777 unsigned mod = p Cpu->ModRM.Bits.Mod;778 unsigned rm = p Cpu->ModRM.Bits.Rm;776 unsigned reg = pDis->ModRM.Bits.Reg; 777 unsigned mod = pDis->ModRM.Bits.Mod; 778 unsigned rm = pDis->ModRM.Bits.Rm; 779 779 780 780 switch (vtype) 781 781 { 782 782 case OP_PARM_G: //general purpose register 783 disasmModRMReg(p Cpu, pOp, reg, pParam, 0);783 disasmModRMReg(pDis, pOp, reg, pParam, 0); 784 784 return 0; 785 785 … … 792 792 pParam->fUse |= DISUSE_REG_CR; 793 793 794 if ( p Cpu->pCurInstr->uOpcode == OP_MOV_CR795 && p Cpu->uOpMode == DISCPUMODE_32BIT796 && (p Cpu->fPrefix & DISPREFIX_LOCK))794 if ( pDis->pCurInstr->uOpcode == OP_MOV_CR 795 && pDis->uOpMode == DISCPUMODE_32BIT 796 && (pDis->fPrefix & DISPREFIX_LOCK)) 797 797 { 798 p Cpu->fPrefix &= ~DISPREFIX_LOCK;798 pDis->fPrefix &= ~DISPREFIX_LOCK; 799 799 pParam->Base.idxCtrlReg = DISCREG_CR8; 800 800 } … … 816 816 case OP_PARM_S: //segment register 817 817 reg &= 7; /* REX.R has no effect here */ 818 disasmModRMSReg(p Cpu, pOp, reg, pParam);818 disasmModRMSReg(pDis, pOp, reg, pParam); 819 819 pParam->fUse |= DISUSE_REG_SEG; 820 820 return 0; … … 842 842 /* @todo bound */ 843 843 844 if (p Cpu->uAddrMode != DISCPUMODE_16BIT)845 { 846 Assert(p Cpu->uAddrMode == DISCPUMODE_32BIT || pCpu->uAddrMode == DISCPUMODE_64BIT);844 if (pDis->uAddrMode != DISCPUMODE_16BIT) 845 { 846 Assert(pDis->uAddrMode == DISCPUMODE_32BIT || pDis->uAddrMode == DISCPUMODE_64BIT); 847 847 848 848 /* … … 854 854 if (rm == 4) 855 855 { /* SIB byte follows ModRM */ 856 UseSIB(offInstr, pOp, pParam, p Cpu);856 UseSIB(offInstr, pOp, pParam, pDis); 857 857 } 858 858 else … … 860 860 { 861 861 /* 32 bits displacement */ 862 if (p Cpu->uCpuMode != DISCPUMODE_64BIT)862 if (pDis->uCpuMode != DISCPUMODE_64BIT) 863 863 { 864 864 pParam->fUse |= DISUSE_DISPLACEMENT32; 865 pParam->uDisp.i32 = p Cpu->i32SibDisp;865 pParam->uDisp.i32 = pDis->i32SibDisp; 866 866 } 867 867 else 868 868 { 869 869 pParam->fUse |= DISUSE_RIPDISPLACEMENT32; 870 pParam->uDisp.i32 = p Cpu->i32SibDisp;870 pParam->uDisp.i32 = pDis->i32SibDisp; 871 871 } 872 872 } … … 874 874 { //register address 875 875 pParam->fUse |= DISUSE_BASE; 876 disasmModRMReg(p Cpu, pOp, rm, pParam, 1);876 disasmModRMReg(pDis, pOp, rm, pParam, 1); 877 877 } 878 878 break; … … 880 880 case 1: //effective address + 8 bits displacement 881 881 if (rm == 4) {//SIB byte follows ModRM 882 UseSIB(offInstr, pOp, pParam, p Cpu);882 UseSIB(offInstr, pOp, pParam, pDis); 883 883 } 884 884 else 885 885 { 886 886 pParam->fUse |= DISUSE_BASE; 887 disasmModRMReg(p Cpu, pOp, rm, pParam, 1);887 disasmModRMReg(pDis, pOp, rm, pParam, 1); 888 888 } 889 pParam->uDisp.i8 = p Cpu->i32SibDisp;889 pParam->uDisp.i8 = pDis->i32SibDisp; 890 890 pParam->fUse |= DISUSE_DISPLACEMENT8; 891 891 break; … … 893 893 case 2: //effective address + 32 bits displacement 894 894 if (rm == 4) {//SIB byte follows ModRM 895 UseSIB(offInstr, pOp, pParam, p Cpu);895 UseSIB(offInstr, pOp, pParam, pDis); 896 896 } 897 897 else 898 898 { 899 899 pParam->fUse |= DISUSE_BASE; 900 disasmModRMReg(p Cpu, pOp, rm, pParam, 1);900 disasmModRMReg(pDis, pOp, rm, pParam, 1); 901 901 } 902 pParam->uDisp.i32 = p Cpu->i32SibDisp;902 pParam->uDisp.i32 = pDis->i32SibDisp; 903 903 pParam->fUse |= DISUSE_DISPLACEMENT32; 904 904 break; 905 905 906 906 case 3: //registers 907 disasmModRMReg(p Cpu, pOp, rm, pParam, 0);907 disasmModRMReg(pDis, pOp, rm, pParam, 0); 908 908 break; 909 909 } … … 916 916 if (rm == 6) 917 917 {//16 bits displacement 918 pParam->uDisp.i16 = p Cpu->i32SibDisp;918 pParam->uDisp.i16 = pDis->i32SibDisp; 919 919 pParam->fUse |= DISUSE_DISPLACEMENT16; 920 920 } … … 922 922 { 923 923 pParam->fUse |= DISUSE_BASE; 924 disasmModRMReg16(p Cpu, pOp, rm, pParam);924 disasmModRMReg16(pDis, pOp, rm, pParam); 925 925 } 926 926 break; 927 927 928 928 case 1: //effective address + 8 bits displacement 929 disasmModRMReg16(p Cpu, pOp, rm, pParam);930 pParam->uDisp.i8 = p Cpu->i32SibDisp;929 disasmModRMReg16(pDis, pOp, rm, pParam); 930 pParam->uDisp.i8 = pDis->i32SibDisp; 931 931 pParam->fUse |= DISUSE_BASE | DISUSE_DISPLACEMENT8; 932 932 break; 933 933 934 934 case 2: //effective address + 16 bits displacement 935 disasmModRMReg16(p Cpu, pOp, rm, pParam);936 pParam->uDisp.i16 = p Cpu->i32SibDisp;935 disasmModRMReg16(pDis, pOp, rm, pParam); 936 pParam->uDisp.i16 = pDis->i32SibDisp; 937 937 pParam->fUse |= DISUSE_BASE | DISUSE_DISPLACEMENT16; 938 938 break; 939 939 940 940 case 3: //registers 941 disasmModRMReg(p Cpu, pOp, rm, pParam, 0);941 disasmModRMReg(pDis, pOp, rm, pParam, 0); 942 942 break; 943 943 } … … 948 948 // Query the size of the ModRM parameters and fetch the immediate data (if any) 949 949 //***************************************************************************** 950 static size_t QueryModRM(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu, size_t *pSibInc)950 static size_t QueryModRM(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis, size_t *pSibInc) 951 951 { 952 952 size_t sibinc; 953 953 size_t size = 0; 954 // unsigned reg = p Cpu->ModRM.Bits.Reg;955 unsigned mod = p Cpu->ModRM.Bits.Mod;956 unsigned rm = p Cpu->ModRM.Bits.Rm;954 // unsigned reg = pDis->ModRM.Bits.Reg; 955 unsigned mod = pDis->ModRM.Bits.Mod; 956 unsigned rm = pDis->ModRM.Bits.Rm; 957 957 958 958 if (!pSibInc) … … 961 961 *pSibInc = 0; 962 962 963 if (p Cpu->uAddrMode != DISCPUMODE_16BIT)964 { 965 Assert(p Cpu->uAddrMode == DISCPUMODE_32BIT || pCpu->uAddrMode == DISCPUMODE_64BIT);963 if (pDis->uAddrMode != DISCPUMODE_16BIT) 964 { 965 Assert(pDis->uAddrMode == DISCPUMODE_32BIT || pDis->uAddrMode == DISCPUMODE_64BIT); 966 966 967 967 /* … … 970 970 if (mod != 3 && rm == 4) 971 971 { /* SIB byte follows ModRM */ 972 *pSibInc = ParseSIB(offInstr, pOp, pParam, p Cpu);972 *pSibInc = ParseSIB(offInstr, pOp, pParam, pDis); 973 973 offInstr += *pSibInc; 974 974 size += *pSibInc; … … 979 979 case 0: /* Effective address */ 980 980 if (rm == 5) { /* 32 bits displacement */ 981 p Cpu->i32SibDisp = disReadDWord(pCpu, offInstr);981 pDis->i32SibDisp = disReadDWord(pDis, offInstr); 982 982 size += sizeof(int32_t); 983 983 } … … 986 986 987 987 case 1: /* Effective address + 8 bits displacement */ 988 p Cpu->i32SibDisp = (int8_t)disReadByte(pCpu, offInstr);988 pDis->i32SibDisp = (int8_t)disReadByte(pDis, offInstr); 989 989 size += sizeof(char); 990 990 break; 991 991 992 992 case 2: /* Effective address + 32 bits displacement */ 993 p Cpu->i32SibDisp = disReadDWord(pCpu, offInstr);993 pDis->i32SibDisp = disReadDWord(pDis, offInstr); 994 994 size += sizeof(int32_t); 995 995 break; … … 1006 1006 case 0: /* Effective address */ 1007 1007 if (rm == 6) { 1008 p Cpu->i32SibDisp = disReadWord(pCpu, offInstr);1008 pDis->i32SibDisp = disReadWord(pDis, offInstr); 1009 1009 size += sizeof(uint16_t); 1010 1010 } … … 1013 1013 1014 1014 case 1: /* Effective address + 8 bits displacement */ 1015 p Cpu->i32SibDisp = (int8_t)disReadByte(pCpu, offInstr);1015 pDis->i32SibDisp = (int8_t)disReadByte(pDis, offInstr); 1016 1016 size += sizeof(char); 1017 1017 break; 1018 1018 1019 1019 case 2: /* Effective address + 32 bits displacement */ 1020 p Cpu->i32SibDisp = (int16_t)disReadWord(pCpu, offInstr);1020 pDis->i32SibDisp = (int16_t)disReadWord(pDis, offInstr); 1021 1021 size += sizeof(uint16_t); 1022 1022 break; … … 1031 1031 // Query the size of the ModRM parameters and fetch the immediate data (if any) 1032 1032 //***************************************************************************** 1033 static size_t QueryModRM_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu, size_t *pSibInc)1033 static size_t QueryModRM_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis, size_t *pSibInc) 1034 1034 { 1035 1035 size_t sibinc; 1036 1036 size_t size = 0; 1037 // unsigned reg = p Cpu->ModRM.Bits.Reg;1038 unsigned mod = p Cpu->ModRM.Bits.Mod;1039 unsigned rm = p Cpu->ModRM.Bits.Rm;1037 // unsigned reg = pDis->ModRM.Bits.Reg; 1038 unsigned mod = pDis->ModRM.Bits.Mod; 1039 unsigned rm = pDis->ModRM.Bits.Rm; 1040 1040 1041 1041 if (!pSibInc) … … 1044 1044 *pSibInc = 0; 1045 1045 1046 if (p Cpu->uAddrMode != DISCPUMODE_16BIT)1047 { 1048 Assert(p Cpu->uAddrMode == DISCPUMODE_32BIT || pCpu->uAddrMode == DISCPUMODE_64BIT);1046 if (pDis->uAddrMode != DISCPUMODE_16BIT) 1047 { 1048 Assert(pDis->uAddrMode == DISCPUMODE_32BIT || pDis->uAddrMode == DISCPUMODE_64BIT); 1049 1049 /* 1050 1050 * Note: displacements in long mode are 8 or 32 bits and sign-extended to 64 bits … … 1052 1052 if (mod != 3 && rm == 4) 1053 1053 { /* SIB byte follows ModRM */ 1054 *pSibInc = ParseSIB_SizeOnly(offInstr, pOp, pParam, p Cpu);1054 *pSibInc = ParseSIB_SizeOnly(offInstr, pOp, pParam, pDis); 1055 1055 offInstr += *pSibInc; 1056 1056 size += *pSibInc; … … 1106 1106 //***************************************************************************** 1107 1107 //***************************************************************************** 1108 static size_t ParseIllegal(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1109 { 1110 NOREF(offInstr); NOREF(pOp); NOREF(pParam); NOREF(p Cpu);1108 static size_t ParseIllegal(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1109 { 1110 NOREF(offInstr); NOREF(pOp); NOREF(pParam); NOREF(pDis); 1111 1111 AssertFailed(); 1112 1112 return 0; … … 1114 1114 //***************************************************************************** 1115 1115 //***************************************************************************** 1116 static size_t ParseModRM(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1116 static size_t ParseModRM(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1117 1117 { 1118 1118 size_t size = sizeof(uint8_t); //ModRM byte 1119 1119 size_t sibinc; 1120 1120 1121 unsigned ModRM = disReadByte(p Cpu, offInstr);1121 unsigned ModRM = disReadByte(pDis, offInstr); 1122 1122 offInstr += sizeof(uint8_t); 1123 1123 1124 p Cpu->ModRM.Bits.Rm = MODRM_RM(ModRM);1125 p Cpu->ModRM.Bits.Mod = MODRM_MOD(ModRM);1126 p Cpu->ModRM.Bits.Reg = MODRM_REG(ModRM);1124 pDis->ModRM.Bits.Rm = MODRM_RM(ModRM); 1125 pDis->ModRM.Bits.Mod = MODRM_MOD(ModRM); 1126 pDis->ModRM.Bits.Reg = MODRM_REG(ModRM); 1127 1127 1128 1128 /* Disregard the mod bits for certain instructions (mov crx, mov drx). … … 1133 1133 */ 1134 1134 if (pOp->fOpType & DISOPTYPE_MOD_FIXED_11) 1135 p Cpu->ModRM.Bits.Mod = 3;1136 1137 if (p Cpu->fPrefix & DISPREFIX_REX)1138 { 1139 Assert(p Cpu->uCpuMode == DISCPUMODE_64BIT);1135 pDis->ModRM.Bits.Mod = 3; 1136 1137 if (pDis->fPrefix & DISPREFIX_REX) 1138 { 1139 Assert(pDis->uCpuMode == DISCPUMODE_64BIT); 1140 1140 1141 1141 /* REX.R extends the Reg field. */ 1142 p Cpu->ModRM.Bits.Reg |= ((!!(pCpu->fRexPrefix & DISPREFIX_REX_FLAGS_R)) << 3);1142 pDis->ModRM.Bits.Reg |= ((!!(pDis->fRexPrefix & DISPREFIX_REX_FLAGS_R)) << 3); 1143 1143 1144 1144 /* REX.B extends the Rm field if there is no SIB byte nor a 32 bits displacement */ 1145 if (!( p Cpu->ModRM.Bits.Mod != 31146 && p Cpu->ModRM.Bits.Rm == 4)1145 if (!( pDis->ModRM.Bits.Mod != 3 1146 && pDis->ModRM.Bits.Rm == 4) 1147 1147 && 1148 !( p Cpu->ModRM.Bits.Mod == 01149 && p Cpu->ModRM.Bits.Rm == 5))1148 !( pDis->ModRM.Bits.Mod == 0 1149 && pDis->ModRM.Bits.Rm == 5)) 1150 1150 { 1151 p Cpu->ModRM.Bits.Rm |= ((!!(pCpu->fRexPrefix & DISPREFIX_REX_FLAGS_B)) << 3);1152 } 1153 } 1154 size += QueryModRM(offInstr, pOp, pParam, p Cpu, &sibinc);1151 pDis->ModRM.Bits.Rm |= ((!!(pDis->fRexPrefix & DISPREFIX_REX_FLAGS_B)) << 3); 1152 } 1153 } 1154 size += QueryModRM(offInstr, pOp, pParam, pDis, &sibinc); 1155 1155 offInstr += sibinc; 1156 1156 1157 UseModRM(offInstr, pOp, pParam, p Cpu);1157 UseModRM(offInstr, pOp, pParam, pDis); 1158 1158 return size; 1159 1159 } 1160 1160 //***************************************************************************** 1161 1161 //***************************************************************************** 1162 static size_t ParseModRM_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1162 static size_t ParseModRM_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1163 1163 { 1164 1164 size_t size = sizeof(uint8_t); //ModRM byte 1165 1165 size_t sibinc; 1166 1166 1167 unsigned ModRM = disReadByte(p Cpu, offInstr);1167 unsigned ModRM = disReadByte(pDis, offInstr); 1168 1168 offInstr += sizeof(uint8_t); 1169 1169 1170 p Cpu->ModRM.Bits.Rm = MODRM_RM(ModRM);1171 p Cpu->ModRM.Bits.Mod = MODRM_MOD(ModRM);1172 p Cpu->ModRM.Bits.Reg = MODRM_REG(ModRM);1170 pDis->ModRM.Bits.Rm = MODRM_RM(ModRM); 1171 pDis->ModRM.Bits.Mod = MODRM_MOD(ModRM); 1172 pDis->ModRM.Bits.Reg = MODRM_REG(ModRM); 1173 1173 1174 1174 /* Disregard the mod bits for certain instructions (mov crx, mov drx). … … 1179 1179 */ 1180 1180 if (pOp->fOpType & DISOPTYPE_MOD_FIXED_11) 1181 p Cpu->ModRM.Bits.Mod = 3;1182 1183 if (p Cpu->fPrefix & DISPREFIX_REX)1184 { 1185 Assert(p Cpu->uCpuMode == DISCPUMODE_64BIT);1181 pDis->ModRM.Bits.Mod = 3; 1182 1183 if (pDis->fPrefix & DISPREFIX_REX) 1184 { 1185 Assert(pDis->uCpuMode == DISCPUMODE_64BIT); 1186 1186 1187 1187 /* REX.R extends the Reg field. */ 1188 p Cpu->ModRM.Bits.Reg |= ((!!(pCpu->fRexPrefix & DISPREFIX_REX_FLAGS_R)) << 3);1188 pDis->ModRM.Bits.Reg |= ((!!(pDis->fRexPrefix & DISPREFIX_REX_FLAGS_R)) << 3); 1189 1189 1190 1190 /* REX.B extends the Rm field if there is no SIB byte nor a 32 bits displacement */ 1191 if (!( p Cpu->ModRM.Bits.Mod != 31192 && p Cpu->ModRM.Bits.Rm == 4)1191 if (!( pDis->ModRM.Bits.Mod != 3 1192 && pDis->ModRM.Bits.Rm == 4) 1193 1193 && 1194 !( p Cpu->ModRM.Bits.Mod == 01195 && p Cpu->ModRM.Bits.Rm == 5))1194 !( pDis->ModRM.Bits.Mod == 0 1195 && pDis->ModRM.Bits.Rm == 5)) 1196 1196 { 1197 p Cpu->ModRM.Bits.Rm |= ((!!(pCpu->fRexPrefix & DISPREFIX_REX_FLAGS_B)) << 3);1198 } 1199 } 1200 1201 size += QueryModRM_SizeOnly(offInstr, pOp, pParam, p Cpu, &sibinc);1197 pDis->ModRM.Bits.Rm |= ((!!(pDis->fRexPrefix & DISPREFIX_REX_FLAGS_B)) << 3); 1198 } 1199 } 1200 1201 size += QueryModRM_SizeOnly(offInstr, pOp, pParam, pDis, &sibinc); 1202 1202 offInstr += sibinc; 1203 1203 … … 1207 1207 //***************************************************************************** 1208 1208 //***************************************************************************** 1209 static size_t ParseModFence(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1209 static size_t ParseModFence(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1210 1210 { 1211 1211 ////AssertMsgFailed(("??\n")); 1212 1212 //nothing to do apparently 1213 NOREF(offInstr); NOREF(pOp); NOREF(pParam); NOREF(p Cpu);1213 NOREF(offInstr); NOREF(pOp); NOREF(pParam); NOREF(pDis); 1214 1214 return 0; 1215 1215 } 1216 1216 //***************************************************************************** 1217 1217 //***************************************************************************** 1218 static size_t ParseImmByte(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1218 static size_t ParseImmByte(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1219 1219 { 1220 1220 NOREF(pOp); 1221 pParam->uValue = disReadByte(p Cpu, offInstr);1221 pParam->uValue = disReadByte(pDis, offInstr); 1222 1222 pParam->fUse |= DISUSE_IMMEDIATE8; 1223 1223 pParam->cb = sizeof(uint8_t); … … 1226 1226 //***************************************************************************** 1227 1227 //***************************************************************************** 1228 static size_t ParseImmByte_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1229 { 1230 NOREF(offInstr); NOREF(pOp); NOREF(pParam); NOREF(p Cpu);1228 static size_t ParseImmByte_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1229 { 1230 NOREF(offInstr); NOREF(pOp); NOREF(pParam); NOREF(pDis); 1231 1231 return sizeof(uint8_t); 1232 1232 } 1233 1233 //***************************************************************************** 1234 1234 //***************************************************************************** 1235 static size_t ParseImmByteSX(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1235 static size_t ParseImmByteSX(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1236 1236 { 1237 1237 NOREF(pOp); 1238 if (p Cpu->uOpMode == DISCPUMODE_32BIT)1239 { 1240 pParam->uValue = (uint32_t)(int8_t)disReadByte(p Cpu, offInstr);1238 if (pDis->uOpMode == DISCPUMODE_32BIT) 1239 { 1240 pParam->uValue = (uint32_t)(int8_t)disReadByte(pDis, offInstr); 1241 1241 pParam->fUse |= DISUSE_IMMEDIATE32_SX8; 1242 1242 pParam->cb = sizeof(uint32_t); 1243 1243 } 1244 1244 else 1245 if (p Cpu->uOpMode == DISCPUMODE_64BIT)1246 { 1247 pParam->uValue = (uint64_t)(int8_t)disReadByte(p Cpu, offInstr);1245 if (pDis->uOpMode == DISCPUMODE_64BIT) 1246 { 1247 pParam->uValue = (uint64_t)(int8_t)disReadByte(pDis, offInstr); 1248 1248 pParam->fUse |= DISUSE_IMMEDIATE64_SX8; 1249 1249 pParam->cb = sizeof(uint64_t); … … 1251 1251 else 1252 1252 { 1253 pParam->uValue = (uint16_t)(int8_t)disReadByte(p Cpu, offInstr);1253 pParam->uValue = (uint16_t)(int8_t)disReadByte(pDis, offInstr); 1254 1254 pParam->fUse |= DISUSE_IMMEDIATE16_SX8; 1255 1255 pParam->cb = sizeof(uint16_t); … … 1259 1259 //***************************************************************************** 1260 1260 //***************************************************************************** 1261 static size_t ParseImmByteSX_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1262 { 1263 NOREF(offInstr); NOREF(pOp); NOREF(pParam); NOREF(p Cpu);1261 static size_t ParseImmByteSX_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1262 { 1263 NOREF(offInstr); NOREF(pOp); NOREF(pParam); NOREF(pDis); 1264 1264 return sizeof(uint8_t); 1265 1265 } 1266 1266 //***************************************************************************** 1267 1267 //***************************************************************************** 1268 static size_t ParseImmUshort(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1268 static size_t ParseImmUshort(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1269 1269 { 1270 1270 NOREF(pOp); 1271 pParam->uValue = disReadWord(p Cpu, offInstr);1271 pParam->uValue = disReadWord(pDis, offInstr); 1272 1272 pParam->fUse |= DISUSE_IMMEDIATE16; 1273 1273 pParam->cb = sizeof(uint16_t); … … 1276 1276 //***************************************************************************** 1277 1277 //***************************************************************************** 1278 static size_t ParseImmUshort_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1279 { 1280 NOREF(offInstr); NOREF(pOp); NOREF(pParam); NOREF(p Cpu);1278 static size_t ParseImmUshort_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1279 { 1280 NOREF(offInstr); NOREF(pOp); NOREF(pParam); NOREF(pDis); 1281 1281 return sizeof(uint16_t); 1282 1282 } 1283 1283 //***************************************************************************** 1284 1284 //***************************************************************************** 1285 static size_t ParseImmUlong(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1285 static size_t ParseImmUlong(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1286 1286 { 1287 1287 NOREF(pOp); 1288 pParam->uValue = disReadDWord(p Cpu, offInstr);1288 pParam->uValue = disReadDWord(pDis, offInstr); 1289 1289 pParam->fUse |= DISUSE_IMMEDIATE32; 1290 1290 pParam->cb = sizeof(uint32_t); … … 1293 1293 //***************************************************************************** 1294 1294 //***************************************************************************** 1295 static size_t ParseImmUlong_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1296 { 1297 NOREF(offInstr); NOREF(pOp); NOREF(pParam); NOREF(p Cpu);1295 static size_t ParseImmUlong_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1296 { 1297 NOREF(offInstr); NOREF(pOp); NOREF(pParam); NOREF(pDis); 1298 1298 return sizeof(uint32_t); 1299 1299 } 1300 1300 //***************************************************************************** 1301 1301 //***************************************************************************** 1302 static size_t ParseImmQword(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1302 static size_t ParseImmQword(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1303 1303 { 1304 1304 NOREF(pOp); 1305 pParam->uValue = disReadQWord(p Cpu, offInstr);1305 pParam->uValue = disReadQWord(pDis, offInstr); 1306 1306 pParam->fUse |= DISUSE_IMMEDIATE64; 1307 1307 pParam->cb = sizeof(uint64_t); … … 1310 1310 //***************************************************************************** 1311 1311 //***************************************************************************** 1312 static size_t ParseImmQword_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1313 { 1314 NOREF(offInstr); NOREF(pOp); NOREF(pParam); NOREF(p Cpu);1312 static size_t ParseImmQword_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1313 { 1314 NOREF(offInstr); NOREF(pOp); NOREF(pParam); NOREF(pDis); 1315 1315 return sizeof(uint64_t); 1316 1316 } 1317 1317 //***************************************************************************** 1318 1318 //***************************************************************************** 1319 static size_t ParseImmV(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1319 static size_t ParseImmV(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1320 1320 { 1321 1321 NOREF(pOp); 1322 if (p Cpu->uOpMode == DISCPUMODE_32BIT)1323 { 1324 pParam->uValue = disReadDWord(p Cpu, offInstr);1322 if (pDis->uOpMode == DISCPUMODE_32BIT) 1323 { 1324 pParam->uValue = disReadDWord(pDis, offInstr); 1325 1325 pParam->fUse |= DISUSE_IMMEDIATE32; 1326 1326 pParam->cb = sizeof(uint32_t); … … 1328 1328 } 1329 1329 1330 if (p Cpu->uOpMode == DISCPUMODE_64BIT)1331 { 1332 pParam->uValue = disReadQWord(p Cpu, offInstr);1330 if (pDis->uOpMode == DISCPUMODE_64BIT) 1331 { 1332 pParam->uValue = disReadQWord(pDis, offInstr); 1333 1333 pParam->fUse |= DISUSE_IMMEDIATE64; 1334 1334 pParam->cb = sizeof(uint64_t); … … 1336 1336 } 1337 1337 1338 pParam->uValue = disReadWord(p Cpu, offInstr);1338 pParam->uValue = disReadWord(pDis, offInstr); 1339 1339 pParam->fUse |= DISUSE_IMMEDIATE16; 1340 1340 pParam->cb = sizeof(uint16_t); … … 1343 1343 //***************************************************************************** 1344 1344 //***************************************************************************** 1345 static size_t ParseImmV_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1345 static size_t ParseImmV_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1346 1346 { 1347 1347 NOREF(offInstr); NOREF(pOp); NOREF(pParam); 1348 if (p Cpu->uOpMode == DISCPUMODE_32BIT)1348 if (pDis->uOpMode == DISCPUMODE_32BIT) 1349 1349 return sizeof(uint32_t); 1350 if (p Cpu->uOpMode == DISCPUMODE_64BIT)1350 if (pDis->uOpMode == DISCPUMODE_64BIT) 1351 1351 return sizeof(uint64_t); 1352 1352 return sizeof(uint16_t); … … 1354 1354 //***************************************************************************** 1355 1355 //***************************************************************************** 1356 static size_t ParseImmZ(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1356 static size_t ParseImmZ(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1357 1357 { 1358 1358 NOREF(pOp); 1359 1359 /* Word for 16-bit operand-size or doubleword for 32 or 64-bit operand-size. */ 1360 if (p Cpu->uOpMode == DISCPUMODE_16BIT)1361 { 1362 pParam->uValue = disReadWord(p Cpu, offInstr);1360 if (pDis->uOpMode == DISCPUMODE_16BIT) 1361 { 1362 pParam->uValue = disReadWord(pDis, offInstr); 1363 1363 pParam->fUse |= DISUSE_IMMEDIATE16; 1364 1364 pParam->cb = sizeof(uint16_t); … … 1367 1367 1368 1368 /* 64 bits op mode means *sign* extend to 64 bits. */ 1369 if (p Cpu->uOpMode == DISCPUMODE_64BIT)1370 { 1371 pParam->uValue = (uint64_t)(int32_t)disReadDWord(p Cpu, offInstr);1369 if (pDis->uOpMode == DISCPUMODE_64BIT) 1370 { 1371 pParam->uValue = (uint64_t)(int32_t)disReadDWord(pDis, offInstr); 1372 1372 pParam->fUse |= DISUSE_IMMEDIATE64; 1373 1373 pParam->cb = sizeof(uint64_t); … … 1375 1375 else 1376 1376 { 1377 pParam->uValue = disReadDWord(p Cpu, offInstr);1377 pParam->uValue = disReadDWord(pDis, offInstr); 1378 1378 pParam->fUse |= DISUSE_IMMEDIATE32; 1379 1379 pParam->cb = sizeof(uint32_t); … … 1383 1383 //***************************************************************************** 1384 1384 //***************************************************************************** 1385 static size_t ParseImmZ_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1385 static size_t ParseImmZ_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1386 1386 { 1387 1387 NOREF(offInstr); NOREF(pOp); NOREF(pParam); 1388 1388 /* Word for 16-bit operand-size or doubleword for 32 or 64-bit operand-size. */ 1389 if (p Cpu->uOpMode == DISCPUMODE_16BIT)1389 if (pDis->uOpMode == DISCPUMODE_16BIT) 1390 1390 return sizeof(uint16_t); 1391 1391 return sizeof(uint32_t); … … 1395 1395 // Relative displacement for branches (rel. to next instruction) 1396 1396 //***************************************************************************** 1397 static size_t ParseImmBRel(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1397 static size_t ParseImmBRel(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1398 1398 { 1399 1399 NOREF(pOp); 1400 pParam->uValue = disReadByte(p Cpu, offInstr);1400 pParam->uValue = disReadByte(pDis, offInstr); 1401 1401 pParam->fUse |= DISUSE_IMMEDIATE8_REL; 1402 1402 pParam->cb = sizeof(uint8_t); … … 1406 1406 // Relative displacement for branches (rel. to next instruction) 1407 1407 //***************************************************************************** 1408 static size_t ParseImmBRel_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1409 { 1410 NOREF(offInstr); NOREF(pOp); NOREF(pParam); NOREF(p Cpu);1408 static size_t ParseImmBRel_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1409 { 1410 NOREF(offInstr); NOREF(pOp); NOREF(pParam); NOREF(pDis); 1411 1411 return sizeof(char); 1412 1412 } … … 1414 1414 // Relative displacement for branches (rel. to next instruction) 1415 1415 //***************************************************************************** 1416 static size_t ParseImmVRel(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1416 static size_t ParseImmVRel(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1417 1417 { 1418 1418 NOREF(pOp); 1419 if (p Cpu->uOpMode == DISCPUMODE_32BIT)1420 { 1421 pParam->uValue = disReadDWord(p Cpu, offInstr);1419 if (pDis->uOpMode == DISCPUMODE_32BIT) 1420 { 1421 pParam->uValue = disReadDWord(pDis, offInstr); 1422 1422 pParam->fUse |= DISUSE_IMMEDIATE32_REL; 1423 1423 pParam->cb = sizeof(int32_t); … … 1425 1425 } 1426 1426 1427 if (p Cpu->uOpMode == DISCPUMODE_64BIT)1427 if (pDis->uOpMode == DISCPUMODE_64BIT) 1428 1428 { 1429 1429 /* 32 bits relative immediate sign extended to 64 bits. */ 1430 pParam->uValue = (uint64_t)(int32_t)disReadDWord(p Cpu, offInstr);1430 pParam->uValue = (uint64_t)(int32_t)disReadDWord(pDis, offInstr); 1431 1431 pParam->fUse |= DISUSE_IMMEDIATE64_REL; 1432 1432 pParam->cb = sizeof(int64_t); … … 1434 1434 } 1435 1435 1436 pParam->uValue = disReadWord(p Cpu, offInstr);1436 pParam->uValue = disReadWord(pDis, offInstr); 1437 1437 pParam->fUse |= DISUSE_IMMEDIATE16_REL; 1438 1438 pParam->cb = sizeof(int16_t); … … 1442 1442 // Relative displacement for branches (rel. to next instruction) 1443 1443 //***************************************************************************** 1444 static size_t ParseImmVRel_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1444 static size_t ParseImmVRel_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1445 1445 { 1446 1446 NOREF(offInstr); NOREF(pOp); NOREF(pParam); 1447 if (p Cpu->uOpMode == DISCPUMODE_16BIT)1447 if (pDis->uOpMode == DISCPUMODE_16BIT) 1448 1448 return sizeof(int16_t); 1449 1449 /* Both 32 & 64 bits mode use 32 bits relative immediates. */ … … 1452 1452 //***************************************************************************** 1453 1453 //***************************************************************************** 1454 static size_t ParseImmAddr(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1455 { 1456 if (p Cpu->uAddrMode == DISCPUMODE_32BIT)1454 static size_t ParseImmAddr(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1455 { 1456 if (pDis->uAddrMode == DISCPUMODE_32BIT) 1457 1457 { 1458 1458 if (OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_p) 1459 1459 { 1460 1460 /* far 16:32 pointer */ 1461 pParam->uValue = disReadDWord(p Cpu, offInstr);1462 *((uint32_t*)&pParam->uValue+1) = disReadWord(p Cpu, offInstr+sizeof(uint32_t));1461 pParam->uValue = disReadDWord(pDis, offInstr); 1462 *((uint32_t*)&pParam->uValue+1) = disReadWord(pDis, offInstr+sizeof(uint32_t)); 1463 1463 pParam->fUse |= DISUSE_IMMEDIATE_ADDR_16_32; 1464 1464 pParam->cb = sizeof(uint16_t) + sizeof(uint32_t); … … 1472 1472 * so we treat it like displacement. 1473 1473 */ 1474 pParam->uDisp.i32 = disReadDWord(p Cpu, offInstr);1474 pParam->uDisp.i32 = disReadDWord(pDis, offInstr); 1475 1475 pParam->fUse |= DISUSE_DISPLACEMENT32; 1476 1476 pParam->cb = sizeof(uint32_t); … … 1478 1478 } 1479 1479 1480 if (p Cpu->uAddrMode == DISCPUMODE_64BIT)1480 if (pDis->uAddrMode == DISCPUMODE_64BIT) 1481 1481 { 1482 1482 Assert(OP_PARM_VSUBTYPE(pParam->fParam) != OP_PARM_p); … … 1487 1487 * so we treat it like displacement. 1488 1488 */ 1489 pParam->uDisp.i64 = disReadQWord(p Cpu, offInstr);1489 pParam->uDisp.i64 = disReadQWord(pDis, offInstr); 1490 1490 pParam->fUse |= DISUSE_DISPLACEMENT64; 1491 1491 pParam->cb = sizeof(uint64_t); … … 1495 1495 { 1496 1496 /* far 16:16 pointer */ 1497 pParam->uValue = disReadDWord(p Cpu, offInstr);1497 pParam->uValue = disReadDWord(pDis, offInstr); 1498 1498 pParam->fUse |= DISUSE_IMMEDIATE_ADDR_16_16; 1499 1499 pParam->cb = 2*sizeof(uint16_t); … … 1507 1507 * so we treat it like displacement. 1508 1508 */ 1509 pParam->uDisp.i16 = disReadWord(p Cpu, offInstr);1509 pParam->uDisp.i16 = disReadWord(pDis, offInstr); 1510 1510 pParam->fUse |= DISUSE_DISPLACEMENT16; 1511 1511 pParam->cb = sizeof(uint16_t); … … 1514 1514 //***************************************************************************** 1515 1515 //***************************************************************************** 1516 static size_t ParseImmAddr_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1516 static size_t ParseImmAddr_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1517 1517 { 1518 1518 NOREF(offInstr); NOREF(pOp); 1519 if (p Cpu->uAddrMode == DISCPUMODE_32BIT)1519 if (pDis->uAddrMode == DISCPUMODE_32BIT) 1520 1520 { 1521 1521 if (OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_p) … … 1528 1528 } 1529 1529 } 1530 if (p Cpu->uAddrMode == DISCPUMODE_64BIT)1530 if (pDis->uAddrMode == DISCPUMODE_64BIT) 1531 1531 { 1532 1532 Assert(OP_PARM_VSUBTYPE(pParam->fParam) != OP_PARM_p); … … 1547 1547 //***************************************************************************** 1548 1548 //***************************************************************************** 1549 static size_t ParseImmAddrF(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1549 static size_t ParseImmAddrF(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1550 1550 { 1551 1551 // immediate far pointers - only 16:16 or 16:32; determined by operand, *not* address size! 1552 Assert(p Cpu->uOpMode == DISCPUMODE_16BIT || pCpu->uOpMode == DISCPUMODE_32BIT);1552 Assert(pDis->uOpMode == DISCPUMODE_16BIT || pDis->uOpMode == DISCPUMODE_32BIT); 1553 1553 Assert(OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_p); 1554 if (p Cpu->uOpMode == DISCPUMODE_32BIT)1554 if (pDis->uOpMode == DISCPUMODE_32BIT) 1555 1555 { 1556 1556 // far 16:32 pointer 1557 pParam->uValue = disReadDWord(p Cpu, offInstr);1558 *((uint32_t*)&pParam->uValue+1) = disReadWord(p Cpu, offInstr+sizeof(uint32_t));1557 pParam->uValue = disReadDWord(pDis, offInstr); 1558 *((uint32_t*)&pParam->uValue+1) = disReadWord(pDis, offInstr+sizeof(uint32_t)); 1559 1559 pParam->fUse |= DISUSE_IMMEDIATE_ADDR_16_32; 1560 1560 pParam->cb = sizeof(uint16_t) + sizeof(uint32_t); … … 1563 1563 1564 1564 // far 16:16 pointer 1565 pParam->uValue = disReadDWord(p Cpu, offInstr);1565 pParam->uValue = disReadDWord(pDis, offInstr); 1566 1566 pParam->fUse |= DISUSE_IMMEDIATE_ADDR_16_16; 1567 1567 pParam->cb = 2*sizeof(uint16_t); … … 1570 1570 //***************************************************************************** 1571 1571 //***************************************************************************** 1572 static size_t ParseImmAddrF_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1572 static size_t ParseImmAddrF_SizeOnly(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1573 1573 { 1574 1574 NOREF(offInstr); NOREF(pOp); 1575 1575 // immediate far pointers - only 16:16 or 16:32 1576 Assert(p Cpu->uOpMode == DISCPUMODE_16BIT || pCpu->uOpMode == DISCPUMODE_32BIT);1576 Assert(pDis->uOpMode == DISCPUMODE_16BIT || pDis->uOpMode == DISCPUMODE_32BIT); 1577 1577 Assert(OP_PARM_VSUBTYPE(pParam->fParam) == OP_PARM_p); 1578 if (p Cpu->uOpMode == DISCPUMODE_32BIT)1578 if (pDis->uOpMode == DISCPUMODE_32BIT) 1579 1579 { 1580 1580 // far 16:32 pointer … … 1589 1589 //***************************************************************************** 1590 1590 //***************************************************************************** 1591 static size_t ParseFixedReg(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1591 static size_t ParseFixedReg(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1592 1592 { 1593 1593 NOREF(offInstr); … … 1611 1611 { 1612 1612 /* 32-bit EAX..EDI registers. */ 1613 if (p Cpu->uOpMode == DISCPUMODE_32BIT)1613 if (pDis->uOpMode == DISCPUMODE_32BIT) 1614 1614 { 1615 1615 /* Use 32-bit registers. */ … … 1619 1619 } 1620 1620 else 1621 if (p Cpu->uOpMode == DISCPUMODE_64BIT)1621 if (pDis->uOpMode == DISCPUMODE_64BIT) 1622 1622 { 1623 1623 /* Use 64-bit registers. */ 1624 1624 pParam->Base.idxGenReg = pParam->fParam - OP_PARM_REG_GEN32_START; 1625 1625 if ( (pOp->fOpType & DISOPTYPE_REXB_EXTENDS_OPREG) 1626 && pParam == &p Cpu->Param1 /* ugly assumption that it only applies to the first parameter */1627 && (p Cpu->fPrefix & DISPREFIX_REX)1628 && (p Cpu->fRexPrefix & DISPREFIX_REX_FLAGS))1626 && pParam == &pDis->Param1 /* ugly assumption that it only applies to the first parameter */ 1627 && (pDis->fPrefix & DISPREFIX_REX) 1628 && (pDis->fRexPrefix & DISPREFIX_REX_FLAGS)) 1629 1629 pParam->Base.idxGenReg += 8; 1630 1630 … … 1665 1665 pParam->cb = 1; 1666 1666 1667 if (p Cpu->uOpMode == DISCPUMODE_64BIT)1667 if (pDis->uOpMode == DISCPUMODE_64BIT) 1668 1668 { 1669 1669 if ( (pOp->fOpType & DISOPTYPE_REXB_EXTENDS_OPREG) 1670 && pParam == &p Cpu->Param1 /* ugly assumption that it only applies to the first parameter */1671 && (p Cpu->fPrefix & DISPREFIX_REX)1672 && (p Cpu->fRexPrefix & DISPREFIX_REX_FLAGS))1670 && pParam == &pDis->Param1 /* ugly assumption that it only applies to the first parameter */ 1671 && (pDis->fPrefix & DISPREFIX_REX) 1672 && (pDis->fRexPrefix & DISPREFIX_REX_FLAGS)) 1673 1673 pParam->Base.idxGenReg += 8; /* least significant byte of R8-R15 */ 1674 1674 } … … 1690 1690 //***************************************************************************** 1691 1691 //***************************************************************************** 1692 static size_t ParseXv(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1692 static size_t ParseXv(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1693 1693 { 1694 1694 NOREF(offInstr); 1695 1695 1696 1696 pParam->fUse |= DISUSE_POINTER_DS_BASED; 1697 if (p Cpu->uAddrMode == DISCPUMODE_32BIT)1697 if (pDis->uAddrMode == DISCPUMODE_32BIT) 1698 1698 { 1699 1699 pParam->Base.idxGenReg = DISGREG_ESI; … … 1701 1701 } 1702 1702 else 1703 if (p Cpu->uAddrMode == DISCPUMODE_64BIT)1703 if (pDis->uAddrMode == DISCPUMODE_64BIT) 1704 1704 { 1705 1705 pParam->Base.idxGenReg = DISGREG_RSI; … … 1715 1715 //***************************************************************************** 1716 1716 //***************************************************************************** 1717 static size_t ParseXb(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1717 static size_t ParseXb(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1718 1718 { 1719 1719 NOREF(offInstr); NOREF(pOp); 1720 1720 1721 1721 pParam->fUse |= DISUSE_POINTER_DS_BASED; 1722 if (p Cpu->uAddrMode == DISCPUMODE_32BIT)1722 if (pDis->uAddrMode == DISCPUMODE_32BIT) 1723 1723 { 1724 1724 pParam->Base.idxGenReg = DISGREG_ESI; … … 1726 1726 } 1727 1727 else 1728 if (p Cpu->uAddrMode == DISCPUMODE_64BIT)1728 if (pDis->uAddrMode == DISCPUMODE_64BIT) 1729 1729 { 1730 1730 pParam->Base.idxGenReg = DISGREG_RSI; … … 1740 1740 //***************************************************************************** 1741 1741 //***************************************************************************** 1742 static size_t ParseYv(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1742 static size_t ParseYv(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1743 1743 { 1744 1744 NOREF(offInstr); 1745 1745 1746 1746 pParam->fUse |= DISUSE_POINTER_ES_BASED; 1747 if (p Cpu->uAddrMode == DISCPUMODE_32BIT)1747 if (pDis->uAddrMode == DISCPUMODE_32BIT) 1748 1748 { 1749 1749 pParam->Base.idxGenReg = DISGREG_EDI; … … 1751 1751 } 1752 1752 else 1753 if (p Cpu->uAddrMode == DISCPUMODE_64BIT)1753 if (pDis->uAddrMode == DISCPUMODE_64BIT) 1754 1754 { 1755 1755 pParam->Base.idxGenReg = DISGREG_RDI; … … 1765 1765 //***************************************************************************** 1766 1766 //***************************************************************************** 1767 static size_t ParseYb(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1767 static size_t ParseYb(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1768 1768 { 1769 1769 NOREF(offInstr); NOREF(pOp); 1770 1770 1771 1771 pParam->fUse |= DISUSE_POINTER_ES_BASED; 1772 if (p Cpu->uAddrMode == DISCPUMODE_32BIT)1772 if (pDis->uAddrMode == DISCPUMODE_32BIT) 1773 1773 { 1774 1774 pParam->Base.idxGenReg = DISGREG_EDI; … … 1776 1776 } 1777 1777 else 1778 if (p Cpu->uAddrMode == DISCPUMODE_64BIT)1778 if (pDis->uAddrMode == DISCPUMODE_64BIT) 1779 1779 { 1780 1780 pParam->Base.idxGenReg = DISGREG_RDI; … … 1790 1790 //***************************************************************************** 1791 1791 //***************************************************************************** 1792 static size_t ParseTwoByteEsc(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1792 static size_t ParseTwoByteEsc(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1793 1793 { 1794 1794 PCDISOPCODE pOpcode; … … 1797 1797 1798 1798 /* 2nd byte */ 1799 p Cpu->bOpCode = disReadByte(pCpu, offInstr);1799 pDis->bOpCode = disReadByte(pDis, offInstr); 1800 1800 1801 1801 /* default to the non-prefixed table. */ 1802 pOpcode = &g_aTwoByteMapX86[p Cpu->bOpCode];1802 pOpcode = &g_aTwoByteMapX86[pDis->bOpCode]; 1803 1803 1804 1804 /* Handle opcode table extensions that rely on the address, repe or repne prefix byte. */ 1805 1805 /** @todo Should we take the first or last prefix byte in case of multiple prefix bytes??? */ 1806 if (p Cpu->bLastPrefix)1807 { 1808 switch (p Cpu->bLastPrefix)1806 if (pDis->bLastPrefix) 1807 { 1808 switch (pDis->bLastPrefix) 1809 1809 { 1810 1810 case OP_OPSIZE: /* 0x66 */ 1811 if (g_aTwoByteMapX86_PF66[p Cpu->bOpCode].uOpcode != OP_INVALID)1811 if (g_aTwoByteMapX86_PF66[pDis->bOpCode].uOpcode != OP_INVALID) 1812 1812 { 1813 1813 /* Table entry is valid, so use the extension table. */ 1814 pOpcode = &g_aTwoByteMapX86_PF66[p Cpu->bOpCode];1814 pOpcode = &g_aTwoByteMapX86_PF66[pDis->bOpCode]; 1815 1815 1816 1816 /* Cancel prefix changes. */ 1817 p Cpu->fPrefix &= ~DISPREFIX_OPSIZE;1818 p Cpu->uOpMode = pCpu->uCpuMode;1817 pDis->fPrefix &= ~DISPREFIX_OPSIZE; 1818 pDis->uOpMode = pDis->uCpuMode; 1819 1819 } 1820 1820 break; 1821 1821 1822 1822 case OP_REPNE: /* 0xF2 */ 1823 if (g_aTwoByteMapX86_PFF2[p Cpu->bOpCode].uOpcode != OP_INVALID)1823 if (g_aTwoByteMapX86_PFF2[pDis->bOpCode].uOpcode != OP_INVALID) 1824 1824 { 1825 1825 /* Table entry is valid, so use the extension table. */ 1826 pOpcode = &g_aTwoByteMapX86_PFF2[p Cpu->bOpCode];1826 pOpcode = &g_aTwoByteMapX86_PFF2[pDis->bOpCode]; 1827 1827 1828 1828 /* Cancel prefix changes. */ 1829 p Cpu->fPrefix &= ~DISPREFIX_REPNE;1829 pDis->fPrefix &= ~DISPREFIX_REPNE; 1830 1830 } 1831 1831 break; 1832 1832 1833 1833 case OP_REPE: /* 0xF3 */ 1834 if (g_aTwoByteMapX86_PFF3[p Cpu->bOpCode].uOpcode != OP_INVALID)1834 if (g_aTwoByteMapX86_PFF3[pDis->bOpCode].uOpcode != OP_INVALID) 1835 1835 { 1836 1836 /* Table entry is valid, so use the extension table. */ 1837 pOpcode = &g_aTwoByteMapX86_PFF3[p Cpu->bOpCode];1837 pOpcode = &g_aTwoByteMapX86_PFF3[pDis->bOpCode]; 1838 1838 1839 1839 /* Cancel prefix changes. */ 1840 p Cpu->fPrefix &= ~DISPREFIX_REP;1840 pDis->fPrefix &= ~DISPREFIX_REP; 1841 1841 } 1842 1842 break; … … 1844 1844 } 1845 1845 1846 size += disParseInstruction(offInstr+size, pOpcode, p Cpu);1846 size += disParseInstruction(offInstr+size, pOpcode, pDis); 1847 1847 return size; 1848 1848 } 1849 1849 //***************************************************************************** 1850 1850 //***************************************************************************** 1851 static size_t ParseThreeByteEsc4(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1851 static size_t ParseThreeByteEsc4(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1852 1852 { 1853 1853 PCDISOPCODE pOpcode; … … 1856 1856 1857 1857 /* 3rd byte */ 1858 p Cpu->bOpCode = disReadByte(pCpu, offInstr);1858 pDis->bOpCode = disReadByte(pDis, offInstr); 1859 1859 1860 1860 /* default to the non-prefixed table. */ 1861 if (g_apThreeByteMapX86_0F38[p Cpu->bOpCode >> 4])1862 { 1863 pOpcode = g_apThreeByteMapX86_0F38[p Cpu->bOpCode >> 4];1864 pOpcode = &pOpcode[p Cpu->bOpCode & 0xf];1861 if (g_apThreeByteMapX86_0F38[pDis->bOpCode >> 4]) 1862 { 1863 pOpcode = g_apThreeByteMapX86_0F38[pDis->bOpCode >> 4]; 1864 pOpcode = &pOpcode[pDis->bOpCode & 0xf]; 1865 1865 } 1866 1866 else … … 1869 1869 /* Handle opcode table extensions that rely on the address, repne prefix byte. */ 1870 1870 /** @todo Should we take the first or last prefix byte in case of multiple prefix bytes??? */ 1871 switch (p Cpu->bLastPrefix)1871 switch (pDis->bLastPrefix) 1872 1872 { 1873 1873 case OP_OPSIZE: /* 0x66 */ 1874 if (g_apThreeByteMapX86_660F38[p Cpu->bOpCode >> 4])1874 if (g_apThreeByteMapX86_660F38[pDis->bOpCode >> 4]) 1875 1875 { 1876 pOpcode = g_apThreeByteMapX86_660F38[p Cpu->bOpCode >> 4];1877 pOpcode = &pOpcode[p Cpu->bOpCode & 0xf];1876 pOpcode = g_apThreeByteMapX86_660F38[pDis->bOpCode >> 4]; 1877 pOpcode = &pOpcode[pDis->bOpCode & 0xf]; 1878 1878 1879 1879 if (pOpcode->uOpcode != OP_INVALID) … … 1882 1882 1883 1883 /* Cancel prefix changes. */ 1884 p Cpu->fPrefix &= ~DISPREFIX_OPSIZE;1885 p Cpu->uOpMode = pCpu->uCpuMode;1884 pDis->fPrefix &= ~DISPREFIX_OPSIZE; 1885 pDis->uOpMode = pDis->uCpuMode; 1886 1886 } 1887 1887 } … … 1889 1889 1890 1890 case OP_REPNE: /* 0xF2 */ 1891 if (g_apThreeByteMapX86_F20F38[p Cpu->bOpCode >> 4])1891 if (g_apThreeByteMapX86_F20F38[pDis->bOpCode >> 4]) 1892 1892 { 1893 pOpcode = g_apThreeByteMapX86_F20F38[p Cpu->bOpCode >> 4];1894 pOpcode = &pOpcode[p Cpu->bOpCode & 0xf];1893 pOpcode = g_apThreeByteMapX86_F20F38[pDis->bOpCode >> 4]; 1894 pOpcode = &pOpcode[pDis->bOpCode & 0xf]; 1895 1895 1896 1896 if (pOpcode->uOpcode != OP_INVALID) … … 1899 1899 1900 1900 /* Cancel prefix changes. */ 1901 p Cpu->fPrefix &= ~DISPREFIX_REPNE;1901 pDis->fPrefix &= ~DISPREFIX_REPNE; 1902 1902 } 1903 1903 } … … 1905 1905 } 1906 1906 1907 size += disParseInstruction(offInstr+size, pOpcode, p Cpu);1907 size += disParseInstruction(offInstr+size, pOpcode, pDis); 1908 1908 return size; 1909 1909 } 1910 1910 //***************************************************************************** 1911 1911 //***************************************************************************** 1912 static size_t ParseThreeByteEsc5(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1912 static size_t ParseThreeByteEsc5(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1913 1913 { 1914 1914 PCDISOPCODE pOpcode; … … 1917 1917 1918 1918 /* 3rd byte */ 1919 p Cpu->bOpCode = disReadByte(pCpu, offInstr);1919 pDis->bOpCode = disReadByte(pDis, offInstr); 1920 1920 1921 1921 /** @todo Should we take the first or last prefix byte in case of multiple prefix bytes??? */ 1922 Assert(p Cpu->bLastPrefix == OP_OPSIZE);1922 Assert(pDis->bLastPrefix == OP_OPSIZE); 1923 1923 1924 1924 /* default to the non-prefixed table. */ 1925 if (g_apThreeByteMapX86_660F3A[p Cpu->bOpCode >> 4])1926 { 1927 pOpcode = g_apThreeByteMapX86_660F3A[p Cpu->bOpCode >> 4];1928 pOpcode = &pOpcode[p Cpu->bOpCode & 0xf];1925 if (g_apThreeByteMapX86_660F3A[pDis->bOpCode >> 4]) 1926 { 1927 pOpcode = g_apThreeByteMapX86_660F3A[pDis->bOpCode >> 4]; 1928 pOpcode = &pOpcode[pDis->bOpCode & 0xf]; 1929 1929 1930 1930 if (pOpcode->uOpcode != OP_INVALID) … … 1933 1933 1934 1934 /* Cancel prefix changes. */ 1935 p Cpu->fPrefix &= ~DISPREFIX_OPSIZE;1936 p Cpu->uOpMode = pCpu->uCpuMode;1935 pDis->fPrefix &= ~DISPREFIX_OPSIZE; 1936 pDis->uOpMode = pDis->uCpuMode; 1937 1937 } 1938 1938 } … … 1940 1940 pOpcode = &g_InvalidOpcode[0]; 1941 1941 1942 size += disParseInstruction(offInstr+size, pOpcode, p Cpu);1942 size += disParseInstruction(offInstr+size, pOpcode, pDis); 1943 1943 return size; 1944 1944 } 1945 1945 //***************************************************************************** 1946 1946 //***************************************************************************** 1947 static size_t ParseNopPause(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1947 static size_t ParseNopPause(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1948 1948 { 1949 1949 size_t size = 0; 1950 1950 NOREF(pParam); 1951 1951 1952 if (p Cpu->fPrefix & DISPREFIX_REP)1952 if (pDis->fPrefix & DISPREFIX_REP) 1953 1953 { 1954 1954 pOp = &g_aMapX86_NopPause[1]; /* PAUSE */ 1955 p Cpu->fPrefix &= ~DISPREFIX_REP;1955 pDis->fPrefix &= ~DISPREFIX_REP; 1956 1956 } 1957 1957 else 1958 1958 pOp = &g_aMapX86_NopPause[0]; /* NOP */ 1959 1959 1960 size += disParseInstruction(offInstr, pOp, p Cpu);1960 size += disParseInstruction(offInstr, pOp, pDis); 1961 1961 return size; 1962 1962 } 1963 1963 //***************************************************************************** 1964 1964 //***************************************************************************** 1965 static size_t ParseImmGrpl(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1966 { 1967 int idx = (p Cpu->bOpCode - 0x80) * 8;1965 static size_t ParseImmGrpl(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1966 { 1967 int idx = (pDis->bOpCode - 0x80) * 8; 1968 1968 size_t size = 0; 1969 1969 NOREF(pParam); 1970 1970 1971 unsigned modrm = disReadByte(p Cpu, offInstr);1971 unsigned modrm = disReadByte(pDis, offInstr); 1972 1972 unsigned reg = MODRM_REG(modrm); 1973 1973 … … 1977 1977 size = sizeof(uint8_t); //ModRM byte 1978 1978 1979 size += disParseInstruction(offInstr, pOp, p Cpu);1979 size += disParseInstruction(offInstr, pOp, pDis); 1980 1980 1981 1981 return size; … … 1983 1983 //***************************************************************************** 1984 1984 //***************************************************************************** 1985 static size_t ParseShiftGrp2(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)1985 static size_t ParseShiftGrp2(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 1986 1986 { 1987 1987 int idx; … … 1989 1989 NOREF(pParam); 1990 1990 1991 switch (p Cpu->bOpCode)1991 switch (pDis->bOpCode) 1992 1992 { 1993 1993 case 0xC0: 1994 1994 case 0xC1: 1995 idx = (p Cpu->bOpCode - 0xC0)*8;1995 idx = (pDis->bOpCode - 0xC0)*8; 1996 1996 break; 1997 1997 … … 2000 2000 case 0xD2: 2001 2001 case 0xD3: 2002 idx = (p Cpu->bOpCode - 0xD0 + 2)*8;2002 idx = (pDis->bOpCode - 0xD0 + 2)*8; 2003 2003 break; 2004 2004 … … 2008 2008 } 2009 2009 2010 unsigned modrm = disReadByte(p Cpu, offInstr);2010 unsigned modrm = disReadByte(pDis, offInstr); 2011 2011 unsigned reg = MODRM_REG(modrm); 2012 2012 … … 2017 2017 size = sizeof(uint8_t); //ModRM byte 2018 2018 2019 size += disParseInstruction(offInstr, pOp, p Cpu);2019 size += disParseInstruction(offInstr, pOp, pDis); 2020 2020 2021 2021 return size; … … 2023 2023 //***************************************************************************** 2024 2024 //***************************************************************************** 2025 static size_t ParseGrp3(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)2026 { 2027 int idx = (p Cpu->bOpCode - 0xF6) * 8;2025 static size_t ParseGrp3(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 2026 { 2027 int idx = (pDis->bOpCode - 0xF6) * 8; 2028 2028 size_t size = 0; 2029 2029 NOREF(pParam); 2030 2030 2031 unsigned modrm = disReadByte(p Cpu, offInstr);2031 unsigned modrm = disReadByte(pDis, offInstr); 2032 2032 unsigned reg = MODRM_REG(modrm); 2033 2033 … … 2038 2038 size = sizeof(uint8_t); //ModRM byte 2039 2039 2040 size += disParseInstruction(offInstr, pOp, p Cpu);2040 size += disParseInstruction(offInstr, pOp, pDis); 2041 2041 2042 2042 return size; … … 2044 2044 //***************************************************************************** 2045 2045 //***************************************************************************** 2046 static size_t ParseGrp4(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)2046 static size_t ParseGrp4(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 2047 2047 { 2048 2048 size_t size = 0; 2049 2049 NOREF(pParam); 2050 2050 2051 unsigned modrm = disReadByte(p Cpu, offInstr);2051 unsigned modrm = disReadByte(pDis, offInstr); 2052 2052 unsigned reg = MODRM_REG(modrm); 2053 2053 … … 2058 2058 size = sizeof(uint8_t); //ModRM byte 2059 2059 2060 size += disParseInstruction(offInstr, pOp, p Cpu);2060 size += disParseInstruction(offInstr, pOp, pDis); 2061 2061 2062 2062 return size; … … 2064 2064 //***************************************************************************** 2065 2065 //***************************************************************************** 2066 static size_t ParseGrp5(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)2066 static size_t ParseGrp5(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 2067 2067 { 2068 2068 size_t size = 0; 2069 2069 NOREF(pParam); 2070 2070 2071 unsigned modrm = disReadByte(p Cpu, offInstr);2071 unsigned modrm = disReadByte(pDis, offInstr); 2072 2072 unsigned reg = MODRM_REG(modrm); 2073 2073 … … 2078 2078 size = sizeof(uint8_t); //ModRM byte 2079 2079 2080 size += disParseInstruction(offInstr, pOp, p Cpu);2080 size += disParseInstruction(offInstr, pOp, pDis); 2081 2081 2082 2082 return size; … … 2088 2088 // 2089 2089 //***************************************************************************** 2090 static size_t Parse3DNow(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)2090 static size_t Parse3DNow(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 2091 2091 { 2092 2092 size_t size = 0; … … 2097 2097 #endif 2098 2098 2099 unsigned ModRM = disReadByte(p Cpu, offInstr);2100 p Cpu->ModRM.Bits.Rm = MODRM_RM(ModRM);2101 p Cpu->ModRM.Bits.Mod = MODRM_MOD(ModRM);2102 p Cpu->ModRM.Bits.Reg = MODRM_REG(ModRM);2103 2104 size_t modrmsize = QueryModRM(offInstr+sizeof(uint8_t), pOp, pParam, p Cpu, NULL);2105 2106 uint8_t opcode = disReadByte(p Cpu, offInstr+sizeof(uint8_t)+modrmsize);2099 unsigned ModRM = disReadByte(pDis, offInstr); 2100 pDis->ModRM.Bits.Rm = MODRM_RM(ModRM); 2101 pDis->ModRM.Bits.Mod = MODRM_MOD(ModRM); 2102 pDis->ModRM.Bits.Reg = MODRM_REG(ModRM); 2103 2104 size_t modrmsize = QueryModRM(offInstr+sizeof(uint8_t), pOp, pParam, pDis, NULL); 2105 2106 uint8_t opcode = disReadByte(pDis, offInstr+sizeof(uint8_t)+modrmsize); 2107 2107 2108 2108 pOp = (PCDISOPCODE)&g_aTwoByteMapX86_3DNow[opcode]; … … 2117 2117 } 2118 2118 2119 size += disParseInstruction(offInstr, pOp, p Cpu);2119 size += disParseInstruction(offInstr, pOp, pDis); 2120 2120 size += sizeof(uint8_t); //imm8_opcode uint8_t 2121 2121 … … 2124 2124 //***************************************************************************** 2125 2125 //***************************************************************************** 2126 static size_t ParseGrp6(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)2126 static size_t ParseGrp6(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 2127 2127 { 2128 2128 size_t size = 0; 2129 2129 NOREF(pParam); 2130 2130 2131 unsigned modrm = disReadByte(p Cpu, offInstr);2131 unsigned modrm = disReadByte(pDis, offInstr); 2132 2132 unsigned reg = MODRM_REG(modrm); 2133 2133 … … 2138 2138 size = sizeof(uint8_t); //ModRM byte 2139 2139 2140 size += disParseInstruction(offInstr, pOp, p Cpu);2140 size += disParseInstruction(offInstr, pOp, pDis); 2141 2141 2142 2142 return size; … … 2144 2144 //***************************************************************************** 2145 2145 //***************************************************************************** 2146 static size_t ParseGrp7(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)2146 static size_t ParseGrp7(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 2147 2147 { 2148 2148 size_t size = 0; 2149 2149 NOREF(pParam); 2150 2150 2151 unsigned modrm = disReadByte(p Cpu, offInstr);2151 unsigned modrm = disReadByte(pDis, offInstr); 2152 2152 unsigned mod = MODRM_MOD(modrm); 2153 2153 unsigned reg = MODRM_REG(modrm); … … 2166 2166 size = sizeof(uint8_t); //ModRM byte 2167 2167 2168 size += disParseInstruction(offInstr, pOp, p Cpu);2168 size += disParseInstruction(offInstr, pOp, pDis); 2169 2169 2170 2170 return size; … … 2172 2172 //***************************************************************************** 2173 2173 //***************************************************************************** 2174 static size_t ParseGrp8(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)2174 static size_t ParseGrp8(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 2175 2175 { 2176 2176 size_t size = 0; 2177 2177 NOREF(pParam); 2178 2178 2179 unsigned modrm = disReadByte(p Cpu, offInstr);2179 unsigned modrm = disReadByte(pDis, offInstr); 2180 2180 unsigned reg = MODRM_REG(modrm); 2181 2181 … … 2186 2186 size = sizeof(uint8_t); //ModRM byte 2187 2187 2188 size += disParseInstruction(offInstr, pOp, p Cpu);2188 size += disParseInstruction(offInstr, pOp, pDis); 2189 2189 2190 2190 return size; … … 2192 2192 //***************************************************************************** 2193 2193 //***************************************************************************** 2194 static size_t ParseGrp9(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)2194 static size_t ParseGrp9(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 2195 2195 { 2196 2196 size_t size = 0; 2197 2197 NOREF(pParam); 2198 2198 2199 unsigned modrm = disReadByte(p Cpu, offInstr);2199 unsigned modrm = disReadByte(pDis, offInstr); 2200 2200 unsigned reg = MODRM_REG(modrm); 2201 2201 … … 2206 2206 size = sizeof(uint8_t); //ModRM byte 2207 2207 2208 size += disParseInstruction(offInstr, pOp, p Cpu);2208 size += disParseInstruction(offInstr, pOp, pDis); 2209 2209 2210 2210 return size; … … 2212 2212 //***************************************************************************** 2213 2213 //***************************************************************************** 2214 static size_t ParseGrp10(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)2214 static size_t ParseGrp10(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 2215 2215 { 2216 2216 size_t size = 0; 2217 2217 NOREF(pParam); 2218 2218 2219 unsigned modrm = disReadByte(p Cpu, offInstr);2219 unsigned modrm = disReadByte(pDis, offInstr); 2220 2220 unsigned reg = MODRM_REG(modrm); 2221 2221 … … 2226 2226 size = sizeof(uint8_t); //ModRM byte 2227 2227 2228 size += disParseInstruction(offInstr, pOp, p Cpu);2228 size += disParseInstruction(offInstr, pOp, pDis); 2229 2229 2230 2230 return size; … … 2232 2232 //***************************************************************************** 2233 2233 //***************************************************************************** 2234 static size_t ParseGrp12(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)2234 static size_t ParseGrp12(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 2235 2235 { 2236 2236 size_t size = 0; 2237 2237 NOREF(pParam); 2238 2238 2239 unsigned modrm = disReadByte(p Cpu, offInstr);2239 unsigned modrm = disReadByte(pDis, offInstr); 2240 2240 unsigned reg = MODRM_REG(modrm); 2241 2241 2242 if (p Cpu->fPrefix & DISPREFIX_OPSIZE)2242 if (pDis->fPrefix & DISPREFIX_OPSIZE) 2243 2243 reg += 8; //2nd table 2244 2244 … … 2249 2249 size = sizeof(uint8_t); //ModRM byte 2250 2250 2251 size += disParseInstruction(offInstr, pOp, p Cpu);2251 size += disParseInstruction(offInstr, pOp, pDis); 2252 2252 return size; 2253 2253 } 2254 2254 //***************************************************************************** 2255 2255 //***************************************************************************** 2256 static size_t ParseGrp13(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)2256 static size_t ParseGrp13(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 2257 2257 { 2258 2258 size_t size = 0; 2259 2259 NOREF(pParam); 2260 2260 2261 unsigned modrm = disReadByte(p Cpu, offInstr);2261 unsigned modrm = disReadByte(pDis, offInstr); 2262 2262 unsigned reg = MODRM_REG(modrm); 2263 if (p Cpu->fPrefix & DISPREFIX_OPSIZE)2263 if (pDis->fPrefix & DISPREFIX_OPSIZE) 2264 2264 reg += 8; //2nd table 2265 2265 … … 2270 2270 size = sizeof(uint8_t); //ModRM byte 2271 2271 2272 size += disParseInstruction(offInstr, pOp, p Cpu);2272 size += disParseInstruction(offInstr, pOp, pDis); 2273 2273 2274 2274 return size; … … 2276 2276 //***************************************************************************** 2277 2277 //***************************************************************************** 2278 static size_t ParseGrp14(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)2278 static size_t ParseGrp14(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 2279 2279 { 2280 2280 size_t size = 0; 2281 2281 NOREF(pParam); 2282 2282 2283 unsigned modrm = disReadByte(p Cpu, offInstr);2283 unsigned modrm = disReadByte(pDis, offInstr); 2284 2284 unsigned reg = MODRM_REG(modrm); 2285 if (p Cpu->fPrefix & DISPREFIX_OPSIZE)2285 if (pDis->fPrefix & DISPREFIX_OPSIZE) 2286 2286 reg += 8; //2nd table 2287 2287 … … 2292 2292 size = sizeof(uint8_t); //ModRM byte 2293 2293 2294 size += disParseInstruction(offInstr, pOp, p Cpu);2294 size += disParseInstruction(offInstr, pOp, pDis); 2295 2295 2296 2296 return size; … … 2298 2298 //***************************************************************************** 2299 2299 //***************************************************************************** 2300 static size_t ParseGrp15(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)2300 static size_t ParseGrp15(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 2301 2301 { 2302 2302 size_t size = 0; 2303 2303 NOREF(pParam); 2304 2304 2305 unsigned modrm = disReadByte(p Cpu, offInstr);2305 unsigned modrm = disReadByte(pDis, offInstr); 2306 2306 unsigned mod = MODRM_MOD(modrm); 2307 2307 unsigned reg = MODRM_REG(modrm); … … 2317 2317 size = sizeof(uint8_t); //ModRM byte 2318 2318 2319 size += disParseInstruction(offInstr, pOp, p Cpu);2319 size += disParseInstruction(offInstr, pOp, pDis); 2320 2320 return size; 2321 2321 } 2322 2322 //***************************************************************************** 2323 2323 //***************************************************************************** 2324 static size_t ParseGrp16(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE p Cpu)2324 static size_t ParseGrp16(size_t offInstr, PCDISOPCODE pOp, PDISOPPARAM pParam, PDISCPUSTATE pDis) 2325 2325 { 2326 2326 size_t size = 0; 2327 2327 NOREF(pParam); 2328 2328 2329 unsigned modrm = disReadByte(p Cpu, offInstr);2329 unsigned modrm = disReadByte(pDis, offInstr); 2330 2330 unsigned reg = MODRM_REG(modrm); 2331 2331 … … 2336 2336 size = sizeof(uint8_t); //ModRM byte 2337 2337 2338 size += disParseInstruction(offInstr, pOp, p Cpu);2338 size += disParseInstruction(offInstr, pOp, pDis); 2339 2339 return size; 2340 2340 } 2341 2341 //***************************************************************************** 2342 2342 //***************************************************************************** 2343 static void disasmModRMReg(PDISCPUSTATE p Cpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam, int fRegAddr)2344 { 2345 NOREF(pOp); NOREF(p Cpu);2346 2347 unsigned mod = p Cpu->ModRM.Bits.Mod;2343 static void disasmModRMReg(PDISCPUSTATE pDis, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam, int fRegAddr) 2344 { 2345 NOREF(pOp); NOREF(pDis); 2346 2347 unsigned mod = pDis->ModRM.Bits.Mod; 2348 2348 2349 2349 unsigned type = OP_PARM_VTYPE(pParam->fParam); 2350 2350 unsigned subtype = OP_PARM_VSUBTYPE(pParam->fParam); 2351 2351 if (fRegAddr) 2352 subtype = (p Cpu->uAddrMode == DISCPUMODE_64BIT) ? OP_PARM_q : OP_PARM_d;2352 subtype = (pDis->uAddrMode == DISCPUMODE_64BIT) ? OP_PARM_q : OP_PARM_d; 2353 2353 else 2354 2354 if (subtype == OP_PARM_v || subtype == OP_PARM_NONE) 2355 2355 { 2356 switch (p Cpu->uOpMode)2356 switch (pDis->uOpMode) 2357 2357 { 2358 2358 case DISCPUMODE_32BIT: … … 2374 2374 { 2375 2375 case OP_PARM_b: 2376 Assert(idx < (p Cpu->fPrefix & DISPREFIX_REX ? 16U : 8U));2376 Assert(idx < (pDis->fPrefix & DISPREFIX_REX ? 16U : 8U)); 2377 2377 2378 2378 /* AH, BH, CH & DH map to DIL, SIL, EBL & SPL when a rex prefix is present. */ 2379 2379 /* Intel® 64 and IA-32 Architectures Software Developers Manual: 3.4.1.1 */ 2380 if ( (p Cpu->fPrefix & DISPREFIX_REX)2380 if ( (pDis->fPrefix & DISPREFIX_REX) 2381 2381 && idx >= DISGREG_AH 2382 2382 && idx <= DISGREG_BH) … … 2390 2390 2391 2391 case OP_PARM_w: 2392 Assert(idx < (p Cpu->fPrefix & DISPREFIX_REX ? 16U : 8U));2392 Assert(idx < (pDis->fPrefix & DISPREFIX_REX ? 16U : 8U)); 2393 2393 2394 2394 pParam->fUse |= DISUSE_REG_GEN16; … … 2397 2397 2398 2398 case OP_PARM_d: 2399 Assert(idx < (p Cpu->fPrefix & DISPREFIX_REX ? 16U : 8U));2399 Assert(idx < (pDis->fPrefix & DISPREFIX_REX ? 16U : 8U)); 2400 2400 2401 2401 pParam->fUse |= DISUSE_REG_GEN32; … … 2410 2410 default: 2411 2411 Log(("disasmModRMReg %x:%x failed!!\n", type, subtype)); 2412 p Cpu->rc = VERR_DIS_INVALID_MODRM;2412 pDis->rc = VERR_DIS_INVALID_MODRM; 2413 2413 break; 2414 2414 } … … 2419 2419 static const uint8_t g_auIndexModRMReg16[4] = { DISGREG_SI, DISGREG_DI, DISGREG_SI, DISGREG_DI }; 2420 2420 //***************************************************************************** 2421 static void disasmModRMReg16(PDISCPUSTATE p Cpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam)2422 { 2423 NOREF(p Cpu); NOREF(pOp);2421 static void disasmModRMReg16(PDISCPUSTATE pDis, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam) 2422 { 2423 NOREF(pDis); NOREF(pOp); 2424 2424 pParam->fUse |= DISUSE_REG_GEN16; 2425 2425 pParam->Base.idxGenReg = g_auBaseModRMReg16[idx]; … … 2432 2432 //***************************************************************************** 2433 2433 //***************************************************************************** 2434 static void disasmModRMSReg(PDISCPUSTATE p Cpu, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam)2434 static void disasmModRMSReg(PDISCPUSTATE pDis, PCDISOPCODE pOp, unsigned idx, PDISOPPARAM pParam) 2435 2435 { 2436 2436 NOREF(pOp); … … 2438 2438 { 2439 2439 Log(("disasmModRMSReg %d failed!!\n", idx)); 2440 p Cpu->rc = VERR_DIS_INVALID_PARAMETER;2440 pDis->rc = VERR_DIS_INVALID_PARAMETER; 2441 2441 return; 2442 2442 } … … 2472 2472 * XOR 2473 2473 * 2474 * @param p CpuFully disassembled instruction.2474 * @param pDis Fully disassembled instruction. 2475 2475 */ 2476 static void disValidateLockSequence(PDISCPUSTATE p Cpu)2477 { 2478 Assert(p Cpu->fPrefix & DISPREFIX_LOCK);2476 static void disValidateLockSequence(PDISCPUSTATE pDis) 2477 { 2478 Assert(pDis->fPrefix & DISPREFIX_LOCK); 2479 2479 2480 2480 /* 2481 2481 * Filter out the valid lock sequences. 2482 2482 */ 2483 switch (p Cpu->pCurInstr->uOpcode)2483 switch (pDis->pCurInstr->uOpcode) 2484 2484 { 2485 2485 /* simple: no variations */ … … 2493 2493 case OP_CMPXCHG: 2494 2494 case OP_XADD: 2495 if (p Cpu->ModRM.Bits.Mod == 3)2495 if (pDis->ModRM.Bits.Mod == 3) 2496 2496 break; 2497 2497 return; … … 2513 2513 case OP_XCHG: 2514 2514 case OP_XOR: 2515 if (p Cpu->Param1.fUse & (DISUSE_BASE | DISUSE_INDEX | DISUSE_DISPLACEMENT64 | DISUSE_DISPLACEMENT322515 if (pDis->Param1.fUse & (DISUSE_BASE | DISUSE_INDEX | DISUSE_DISPLACEMENT64 | DISUSE_DISPLACEMENT32 2516 2516 | DISUSE_DISPLACEMENT16 | DISUSE_DISPLACEMENT8 | DISUSE_RIPDISPLACEMENT32)) 2517 2517 return; … … 2525 2525 * Invalid lock sequence, make it a OP_ILLUD2. 2526 2526 */ 2527 p Cpu->pCurInstr = &g_aTwoByteMapX86[11];2528 Assert(p Cpu->pCurInstr->uOpcode == OP_ILLUD2);2527 pDis->pCurInstr = &g_aTwoByteMapX86[11]; 2528 Assert(pDis->pCurInstr->uOpcode == OP_ILLUD2); 2529 2529 } 2530 2530 … … 2534 2534 * 2535 2535 * @returns VBox status code. 2536 * @param p Cpu Initialized cpustate.2536 * @param pDis Initialized disassembler state. 2537 2537 * @param paOneByteMap The one byte opcode map to use. 2538 2538 * @param pcbInstr Where to store the instruction size. Can be NULL. 2539 2539 */ 2540 static int disInstrWorker(PDISCPUSTATE p Cpu, PCDISOPCODE paOneByteMap, uint32_t *pcbInstr)2540 static int disInstrWorker(PDISCPUSTATE pDis, PCDISOPCODE paOneByteMap, uint32_t *pcbInstr) 2541 2541 { 2542 2542 /* … … 2546 2546 for (;;) 2547 2547 { 2548 uint8_t codebyte = disReadByte(p Cpu, offInstr++);2548 uint8_t codebyte = disReadByte(pDis, offInstr++); 2549 2549 uint8_t opcode = paOneByteMap[codebyte].uOpcode; 2550 2550 … … 2556 2556 { 2557 2557 /** Last prefix byte (for SSE2 extension tables); don't include the REX prefix */ 2558 p Cpu->bLastPrefix = opcode;2559 p Cpu->fPrefix &= ~DISPREFIX_REX;2558 pDis->bLastPrefix = opcode; 2559 pDis->fPrefix &= ~DISPREFIX_REX; 2560 2560 } 2561 2561 … … 2565 2565 if (pcbInstr) 2566 2566 *pcbInstr = (uint32_t)offInstr; 2567 return p Cpu->rc = VERR_DIS_INVALID_OPCODE;2567 return pDis->rc = VERR_DIS_INVALID_OPCODE; 2568 2568 2569 2569 // segment override prefix byte 2570 2570 case OP_SEG: 2571 p Cpu->idxSegPrefix = (DISSELREG)(paOneByteMap[codebyte].fParam1 - OP_PARM_REG_SEG_START);2571 pDis->idxSegPrefix = (DISSELREG)(paOneByteMap[codebyte].fParam1 - OP_PARM_REG_SEG_START); 2572 2572 /* Segment prefixes for CS, DS, ES and SS are ignored in long mode. */ 2573 if ( p Cpu->uCpuMode != DISCPUMODE_64BIT2574 || p Cpu->idxSegPrefix >= DISSELREG_FS)2573 if ( pDis->uCpuMode != DISCPUMODE_64BIT 2574 || pDis->idxSegPrefix >= DISSELREG_FS) 2575 2575 { 2576 p Cpu->fPrefix |= DISPREFIX_SEG;2576 pDis->fPrefix |= DISPREFIX_SEG; 2577 2577 } 2578 2578 continue; //fetch the next byte … … 2580 2580 // lock prefix byte 2581 2581 case OP_LOCK: 2582 p Cpu->fPrefix |= DISPREFIX_LOCK;2582 pDis->fPrefix |= DISPREFIX_LOCK; 2583 2583 continue; //fetch the next byte 2584 2584 2585 2585 // address size override prefix byte 2586 2586 case OP_ADDRSIZE: 2587 p Cpu->fPrefix |= DISPREFIX_ADDRSIZE;2588 if (p Cpu->uCpuMode == DISCPUMODE_16BIT)2589 p Cpu->uAddrMode = DISCPUMODE_32BIT;2587 pDis->fPrefix |= DISPREFIX_ADDRSIZE; 2588 if (pDis->uCpuMode == DISCPUMODE_16BIT) 2589 pDis->uAddrMode = DISCPUMODE_32BIT; 2590 2590 else 2591 if (p Cpu->uCpuMode == DISCPUMODE_32BIT)2592 p Cpu->uAddrMode = DISCPUMODE_16BIT;2591 if (pDis->uCpuMode == DISCPUMODE_32BIT) 2592 pDis->uAddrMode = DISCPUMODE_16BIT; 2593 2593 else 2594 p Cpu->uAddrMode = DISCPUMODE_32BIT; /* 64 bits */2594 pDis->uAddrMode = DISCPUMODE_32BIT; /* 64 bits */ 2595 2595 continue; //fetch the next byte 2596 2596 2597 2597 // operand size override prefix byte 2598 2598 case OP_OPSIZE: 2599 p Cpu->fPrefix |= DISPREFIX_OPSIZE;2600 if (p Cpu->uCpuMode == DISCPUMODE_16BIT)2601 p Cpu->uOpMode = DISCPUMODE_32BIT;2599 pDis->fPrefix |= DISPREFIX_OPSIZE; 2600 if (pDis->uCpuMode == DISCPUMODE_16BIT) 2601 pDis->uOpMode = DISCPUMODE_32BIT; 2602 2602 else 2603 p Cpu->uOpMode = DISCPUMODE_16BIT; /* for 32 and 64 bits mode (there is no 32 bits operand size override prefix) */2603 pDis->uOpMode = DISCPUMODE_16BIT; /* for 32 and 64 bits mode (there is no 32 bits operand size override prefix) */ 2604 2604 continue; //fetch the next byte 2605 2605 2606 2606 // rep and repne are not really prefixes, but we'll treat them as such 2607 2607 case OP_REPE: 2608 p Cpu->fPrefix |= DISPREFIX_REP;2608 pDis->fPrefix |= DISPREFIX_REP; 2609 2609 continue; //fetch the next byte 2610 2610 2611 2611 case OP_REPNE: 2612 p Cpu->fPrefix |= DISPREFIX_REPNE;2612 pDis->fPrefix |= DISPREFIX_REPNE; 2613 2613 continue; //fetch the next byte 2614 2614 2615 2615 case OP_REX: 2616 Assert(p Cpu->uCpuMode == DISCPUMODE_64BIT);2616 Assert(pDis->uCpuMode == DISCPUMODE_64BIT); 2617 2617 /* REX prefix byte */ 2618 p Cpu->fPrefix |= DISPREFIX_REX;2619 p Cpu->fRexPrefix = DISPREFIX_REX_OP_2_FLAGS(paOneByteMap[codebyte].fParam1);2620 if (p Cpu->fRexPrefix & DISPREFIX_REX_FLAGS_W)2621 p Cpu->uOpMode = DISCPUMODE_64BIT; /* overrides size prefix byte */2618 pDis->fPrefix |= DISPREFIX_REX; 2619 pDis->fRexPrefix = DISPREFIX_REX_OP_2_FLAGS(paOneByteMap[codebyte].fParam1); 2620 if (pDis->fRexPrefix & DISPREFIX_REX_FLAGS_W) 2621 pDis->uOpMode = DISCPUMODE_64BIT; /* overrides size prefix byte */ 2622 2622 continue; //fetch the next byte 2623 2623 } … … 2625 2625 2626 2626 /* first opcode byte. */ 2627 p Cpu->bOpCode = codebyte;2628 p Cpu->cbPrefix = (uint8_t)offInstr - 1;2629 offInstr += disParseInstruction(offInstr, &paOneByteMap[p Cpu->bOpCode], pCpu);2627 pDis->bOpCode = codebyte; 2628 pDis->cbPrefix = (uint8_t)offInstr - 1; 2629 offInstr += disParseInstruction(offInstr, &paOneByteMap[pDis->bOpCode], pDis); 2630 2630 break; 2631 2631 } 2632 2632 2633 p Cpu->cbInstr = (uint8_t)offInstr;2633 pDis->cbInstr = (uint8_t)offInstr; 2634 2634 if (pcbInstr) 2635 2635 *pcbInstr = (uint32_t)offInstr; 2636 2636 2637 if (p Cpu->fPrefix & DISPREFIX_LOCK)2638 disValidateLockSequence(p Cpu);2639 2640 return p Cpu->rc;2637 if (pDis->fPrefix & DISPREFIX_LOCK) 2638 disValidateLockSequence(pDis); 2639 2640 return pDis->rc; 2641 2641 } 2642 2642 … … 2646 2646 * 2647 2647 * @returns The primary opcode map to use. 2648 * @param p CpuThe disassembler state.2648 * @param pDis The disassembler state. 2649 2649 * @param uInstrAddr The instruction address. 2650 2650 * @param enmCpuMode The CPU mode. … … 2654 2654 */ 2655 2655 DECL_FORCE_INLINE(PCDISOPCODE) 2656 disInitializeState(PDISCPUSTATE p Cpu, RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, uint32_t fFilter,2656 disInitializeState(PDISCPUSTATE pDis, RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, uint32_t fFilter, 2657 2657 PFNDISREADBYTES pfnReadBytes, void *pvUser) 2658 2658 { 2659 2660 2659 /* 2661 * Initialize the CPU state.2662 2660 * Note! The RT_BZERO make ASSUMPTIONS about the placement of pvUser2. 2663 2661 */ 2664 RT_BZERO(p Cpu, RT_OFFSETOF(DISCPUSTATE, pvUser2));2662 RT_BZERO(pDis, RT_OFFSETOF(DISCPUSTATE, pvUser2)); 2665 2663 2666 2664 #ifdef VBOX_STRICT /* poison */ 2667 p Cpu->Param1.Base.idxGenReg = 0xc1;2668 p Cpu->Param2.Base.idxGenReg = 0xc2;2669 p Cpu->Param3.Base.idxGenReg = 0xc3;2670 p Cpu->Param1.Index.idxGenReg = 0xc4;2671 p Cpu->Param2.Index.idxGenReg = 0xc5;2672 p Cpu->Param3.Index.idxGenReg = 0xc6;2673 p Cpu->Param1.uDisp.u64 = UINT64_C(0xd1d1d1d1d1d1d1d1);2674 p Cpu->Param2.uDisp.u64 = UINT64_C(0xd2d2d2d2d2d2d2d2);2675 p Cpu->Param3.uDisp.u64 = UINT64_C(0xd3d3d3d3d3d3d3d3);2676 p Cpu->Param1.uValue = UINT64_C(0xb1b1b1b1b1b1b1b1);2677 p Cpu->Param2.uValue = UINT64_C(0xb2b2b2b2b2b2b2b2);2678 p Cpu->Param3.uValue = UINT64_C(0xb3b3b3b3b3b3b3b3);2679 p Cpu->Param1.uScale = 28;2680 p Cpu->Param2.uScale = 29;2681 p Cpu->Param3.uScale = 30;2665 pDis->Param1.Base.idxGenReg = 0xc1; 2666 pDis->Param2.Base.idxGenReg = 0xc2; 2667 pDis->Param3.Base.idxGenReg = 0xc3; 2668 pDis->Param1.Index.idxGenReg = 0xc4; 2669 pDis->Param2.Index.idxGenReg = 0xc5; 2670 pDis->Param3.Index.idxGenReg = 0xc6; 2671 pDis->Param1.uDisp.u64 = UINT64_C(0xd1d1d1d1d1d1d1d1); 2672 pDis->Param2.uDisp.u64 = UINT64_C(0xd2d2d2d2d2d2d2d2); 2673 pDis->Param3.uDisp.u64 = UINT64_C(0xd3d3d3d3d3d3d3d3); 2674 pDis->Param1.uValue = UINT64_C(0xb1b1b1b1b1b1b1b1); 2675 pDis->Param2.uValue = UINT64_C(0xb2b2b2b2b2b2b2b2); 2676 pDis->Param3.uValue = UINT64_C(0xb3b3b3b3b3b3b3b3); 2677 pDis->Param1.uScale = 28; 2678 pDis->Param2.uScale = 29; 2679 pDis->Param3.uScale = 30; 2682 2680 #endif 2683 2681 2684 p Cpu->fPrefix = DISPREFIX_NONE;2685 p Cpu->idxSegPrefix = DISSELREG_DS;2686 p Cpu->rc = VINF_SUCCESS;2687 p Cpu->pfnDisasmFnTable = g_apfnFullDisasm;2688 2689 p Cpu->uInstrAddr = uInstrAddr;2690 p Cpu->fFilter = fFilter;2691 p Cpu->pfnReadBytes = pfnReadBytes ? pfnReadBytes : disReadBytesDefault;2692 p Cpu->pvUser = pvUser;2693 p Cpu->uCpuMode = enmCpuMode;2682 pDis->fPrefix = DISPREFIX_NONE; 2683 pDis->idxSegPrefix = DISSELREG_DS; 2684 pDis->rc = VINF_SUCCESS; 2685 pDis->pfnDisasmFnTable = g_apfnFullDisasm; 2686 2687 pDis->uInstrAddr = uInstrAddr; 2688 pDis->fFilter = fFilter; 2689 pDis->pfnReadBytes = pfnReadBytes ? pfnReadBytes : disReadBytesDefault; 2690 pDis->pvUser = pvUser; 2691 pDis->uCpuMode = enmCpuMode; 2694 2692 PCDISOPCODE paOneByteMap; 2695 2693 if (enmCpuMode == DISCPUMODE_64BIT) 2696 2694 { 2697 p Cpu->uAddrMode = DISCPUMODE_64BIT;2698 p Cpu->uOpMode = DISCPUMODE_32BIT;2695 pDis->uAddrMode = DISCPUMODE_64BIT; 2696 pDis->uOpMode = DISCPUMODE_32BIT; 2699 2697 paOneByteMap = g_aOneByteMapX64; 2700 2698 } 2701 2699 else 2702 2700 { 2703 p Cpu->uAddrMode = enmCpuMode;2704 p Cpu->uOpMode = enmCpuMode;2701 pDis->uAddrMode = enmCpuMode; 2702 pDis->uOpMode = enmCpuMode; 2705 2703 paOneByteMap = g_aOneByteMapX86; 2706 2704 } … … 2716 2714 * instruction parsing. 2717 2715 * 2718 * @param p CpuThe disassembler state.2716 * @param pDis The disassembler state. 2719 2717 */ 2720 DECL_FORCE_INLINE(void) disPrefetchBytes(PDISCPUSTATE p Cpu)2718 DECL_FORCE_INLINE(void) disPrefetchBytes(PDISCPUSTATE pDis) 2721 2719 { 2722 2720 /* … … 2725 2723 * the cache here.) 2726 2724 */ 2727 int rc = p Cpu->pfnReadBytes(pCpu, 0, 1, sizeof(pCpu->abInstr));2725 int rc = pDis->pfnReadBytes(pDis, 0, 1, sizeof(pDis->abInstr)); 2728 2726 if (RT_SUCCESS(rc)) 2729 2727 { 2730 Assert(p Cpu->cbCachedInstr >= 1);2731 Assert(p Cpu->cbCachedInstr <= sizeof(pCpu->abInstr));2728 Assert(pDis->cbCachedInstr >= 1); 2729 Assert(pDis->cbCachedInstr <= sizeof(pDis->abInstr)); 2732 2730 } 2733 2731 else 2734 2732 { 2735 2733 Log(("Initial read failed with rc=%Rrc!!\n", rc)); 2736 p Cpu->rc = VERR_DIS_MEM_READ;2734 pDis->rc = VERR_DIS_MEM_READ; 2737 2735 } 2738 2736 } … … 2740 2738 2741 2739 /** 2742 * Disassembles on instruction, details in @a p Cpuand length in @a pcbInstr.2740 * Disassembles on instruction, details in @a pDis and length in @a pcbInstr. 2743 2741 * 2744 2742 * @returns VBox status code. … … 2749 2747 * @param fFilter Instruction type filter. 2750 2748 * @param pvUser User argument for the instruction reader. (Ends up in pvUser.) 2751 * @param p CpuPointer to CPU structure. With the exception of2749 * @param pDis Pointer to CPU structure. With the exception of 2752 2750 * DISCPUSTATE::pvUser2, the structure will be 2753 2751 * completely initialized by this API, i.e. no input is … … 2758 2756 DISDECL(int) DISInstEx(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, uint32_t fFilter, 2759 2757 PFNDISREADBYTES pfnReadBytes, void *pvUser, 2760 PDISCPUSTATE p Cpu, uint32_t *pcbInstr)2761 { 2762 2763 PCDISOPCODE paOneByteMap = disInitializeState(p Cpu, uInstrAddr, enmCpuMode, fFilter, pfnReadBytes, pvUser);2764 disPrefetchBytes(p Cpu);2765 return disInstrWorker(p Cpu, paOneByteMap, pcbInstr);2758 PDISCPUSTATE pDis, uint32_t *pcbInstr) 2759 { 2760 2761 PCDISOPCODE paOneByteMap = disInitializeState(pDis, uInstrAddr, enmCpuMode, fFilter, pfnReadBytes, pvUser); 2762 disPrefetchBytes(pDis); 2763 return disInstrWorker(pDis, paOneByteMap, pcbInstr); 2766 2764 } 2767 2765 … … 2769 2767 /** 2770 2768 * Disassembles on instruction partially or fully from prefetched bytes, details 2771 * in @a p Cpuand length in @a pcbInstr.2769 * in @a pDis and length in @a pcbInstr. 2772 2770 * 2773 2771 * @returns VBox status code. … … 2781 2779 * @param fFilter Instruction type filter. 2782 2780 * @param pvUser User argument for the instruction reader. (Ends up in pvUser.) 2783 * @param p CpuPointer to CPU structure. With the exception of2781 * @param pDis Pointer to CPU structure. With the exception of 2784 2782 * DISCPUSTATE::pvUser2, the structure will be 2785 2783 * completely initialized by this API, i.e. no input is … … 2791 2789 void const *pvPrefetched, size_t cbPretched, 2792 2790 PFNDISREADBYTES pfnReadBytes, void *pvUser, 2793 PDISCPUSTATE p Cpu, uint32_t *pcbInstr)2794 { 2795 PCDISOPCODE paOneByteMap = disInitializeState(p Cpu, uInstrAddr, enmCpuMode, fFilter, pfnReadBytes, pvUser);2791 PDISCPUSTATE pDis, uint32_t *pcbInstr) 2792 { 2793 PCDISOPCODE paOneByteMap = disInitializeState(pDis, uInstrAddr, enmCpuMode, fFilter, pfnReadBytes, pvUser); 2796 2794 2797 2795 if (!cbPretched) 2798 disPrefetchBytes(p Cpu);2799 else 2800 { 2801 if (cbPretched >= sizeof(p Cpu->abInstr))2796 disPrefetchBytes(pDis); 2797 else 2798 { 2799 if (cbPretched >= sizeof(pDis->abInstr)) 2802 2800 { 2803 memcpy(p Cpu->abInstr, pvPrefetched, sizeof(pCpu->abInstr));2804 p Cpu->cbCachedInstr = (uint8_t)sizeof(pCpu->abInstr);2801 memcpy(pDis->abInstr, pvPrefetched, sizeof(pDis->abInstr)); 2802 pDis->cbCachedInstr = (uint8_t)sizeof(pDis->abInstr); 2805 2803 } 2806 2804 else 2807 2805 { 2808 memcpy(p Cpu->abInstr, pvPrefetched, cbPretched);2809 p Cpu->cbCachedInstr = (uint8_t)cbPretched;2810 } 2811 } 2812 2813 return disInstrWorker(p Cpu, paOneByteMap, pcbInstr);2806 memcpy(pDis->abInstr, pvPrefetched, cbPretched); 2807 pDis->cbCachedInstr = (uint8_t)cbPretched; 2808 } 2809 } 2810 2811 return disInstrWorker(pDis, paOneByteMap, pcbInstr); 2814 2812 } 2815 2813 … … 2819 2817 * Parses one guest instruction. 2820 2818 * 2821 * The result is found in p Cpuand pcbInstr.2819 * The result is found in pDis and pcbInstr. 2822 2820 * 2823 2821 * @returns VBox status code. … … 2827 2825 * @param pfnReadBytes Callback for reading instruction bytes. 2828 2826 * @param pvUser User argument for the instruction reader. (Ends up in pvUser.) 2829 * @param p CpuPointer to cpu structure. Will be initialized.2827 * @param pDis Pointer to cpu structure. Will be initialized. 2830 2828 * @param pcbInstr Where to store the size of the instruction. 2831 2829 * NULL is allowed. This is also stored in … … 2833 2831 */ 2834 2832 DISDECL(int) DISInstrWithReader(RTUINTPTR uInstrAddr, DISCPUMODE enmCpuMode, PFNDISREADBYTES pfnReadBytes, void *pvUser, 2835 PDISCPUSTATE p Cpu, uint32_t *pcbInstr)2836 { 2837 return DISInstEx(uInstrAddr, enmCpuMode, DISOPTYPE_ALL, pfnReadBytes, pvUser, p Cpu, pcbInstr);2833 PDISCPUSTATE pDis, uint32_t *pcbInstr) 2834 { 2835 return DISInstEx(uInstrAddr, enmCpuMode, DISOPTYPE_ALL, pfnReadBytes, pvUser, pDis, pcbInstr); 2838 2836 } 2839 2837 … … 2842 2840 * Parses one guest instruction. 2843 2841 * 2844 * The result is found in p Cpuand pcbInstr.2842 * The result is found in pDis and pcbInstr. 2845 2843 * 2846 2844 * @returns VBox status code. … … 2852 2850 * @param pfnReadBytes Callback for reading instruction bytes. 2853 2851 * @param pvUser User argument for the instruction reader. (Ends up in pvUser.) 2854 * @param p CpuPointer to cpu structure. Will be initialized.2852 * @param pDis Pointer to cpu structure. Will be initialized. 2855 2853 * @param pcbInstr Where to store the size of the instruction. 2856 2854 * NULL is allowed. This is also stored in 2857 2855 * PDISCPUSTATE::cbInstr. 2858 2856 */ 2859 DISDECL(int) DISInstr(const void *pvInstr, DISCPUMODE enmCpuMode, PDISCPUSTATE p Cpu, uint32_t *pcbInstr)2860 { 2861 return DISInstEx((uintptr_t)pvInstr, enmCpuMode, DISOPTYPE_ALL, NULL /*pfnReadBytes*/, NULL /*pvUser*/, p Cpu, pcbInstr);2862 } 2863 2857 DISDECL(int) DISInstr(const void *pvInstr, DISCPUMODE enmCpuMode, PDISCPUSTATE pDis, uint32_t *pcbInstr) 2858 { 2859 return DISInstEx((uintptr_t)pvInstr, enmCpuMode, DISOPTYPE_ALL, NULL /*pfnReadBytes*/, NULL /*pvUser*/, pDis, pcbInstr); 2860 } 2861 -
trunk/src/VBox/Disassembler/DisasmFormatBytes.cpp
r41732 r41789 31 31 * @returns The number of output bytes. 32 32 * 33 * @param p Cpu Pointer to the disassembler cpustate.33 * @param pDis Pointer to the disassembler state. 34 34 * @param pszDst The output buffer. 35 35 * @param cchDst The size of the output buffer. 36 36 * @param fFlags The flags passed to the formatter. 37 37 */ 38 size_t disFormatBytes(PCDISCPUSTATE p Cpu, char *pszDst, size_t cchDst, uint32_t fFlags)38 size_t disFormatBytes(PCDISCPUSTATE pDis, char *pszDst, size_t cchDst, uint32_t fFlags) 39 39 { 40 40 size_t cchOutput = 0; 41 uint32_t cb = p Cpu->cbInstr;41 uint32_t cb = pDis->cbInstr; 42 42 AssertStmt(cb <= 16, cb = 16); 43 43 … … 69 69 { 70 70 if (i != 0 && (fFlags & DIS_FMT_FLAGS_BYTES_SPACED)) 71 PUT_NUM(3, " %02x", p Cpu->abInstr[i]);71 PUT_NUM(3, " %02x", pDis->abInstr[i]); 72 72 else 73 PUT_NUM(2, "%02x", p Cpu->abInstr[i]);73 PUT_NUM(2, "%02x", pDis->abInstr[i]); 74 74 } 75 75 -
trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp
r41765 r41789 87 87 * 88 88 * @returns Pointer to the register name. 89 * @param p Cpu The disassembler cpustate.89 * @param pDis The disassembler state. 90 90 * @param pParam The parameter. 91 91 * @param pcchReg Where to store the length of the name. 92 92 */ 93 static const char *disasmFormatYasmBaseReg(PCDISCPUSTATE p Cpu, PCDISOPPARAM pParam, size_t *pcchReg)93 static const char *disasmFormatYasmBaseReg(PCDISCPUSTATE pDis, PCDISOPPARAM pParam, size_t *pcchReg) 94 94 { 95 95 switch (pParam->fUse & ( DISUSE_REG_GEN8 | DISUSE_REG_GEN16 | DISUSE_REG_GEN32 | DISUSE_REG_GEN64 … … 198 198 * 199 199 * @returns The index register name. 200 * @param p Cpu The disassembler cpustate.200 * @param pDis The disassembler state. 201 201 * @param pParam The parameter. 202 202 * @param pcchReg Where to store the length of the name. 203 203 */ 204 static const char *disasmFormatYasmIndexReg(PCDISCPUSTATE p Cpu, PCDISOPPARAM pParam, size_t *pcchReg)205 { 206 switch (p Cpu->uAddrMode)204 static const char *disasmFormatYasmIndexReg(PCDISCPUSTATE pDis, PCDISOPPARAM pParam, size_t *pcchReg) 205 { 206 switch (pDis->uAddrMode) 207 207 { 208 208 case DISCPUMODE_16BIT: … … 231 231 232 232 default: 233 AssertMsgFailed(("%#x %#x\n", pParam->fUse, p Cpu->uAddrMode));233 AssertMsgFailed(("%#x %#x\n", pParam->fUse, pDis->uAddrMode)); 234 234 *pcchReg = 3; 235 235 return "r??"; … … 244 244 * @returns The number of output characters. If this is >= cchBuf, then the content 245 245 * of pszBuf will be truncated. 246 * @param p Cpu Pointer to the disassembler CPUstate.246 * @param pDis Pointer to the disassembler state. 247 247 * @param pszBuf The output buffer. 248 248 * @param cchBuf The size of the output buffer. … … 251 251 * @param pvUser User argument for pfnGetSymbol. 252 252 */ 253 DISDECL(size_t) DISFormatYasmEx(PCDISCPUSTATE p Cpu, char *pszBuf, size_t cchBuf, uint32_t fFlags,253 DISDECL(size_t) DISFormatYasmEx(PCDISCPUSTATE pDis, char *pszBuf, size_t cchBuf, uint32_t fFlags, 254 254 PFNDISGETSYMBOL pfnGetSymbol, void *pvUser) 255 255 { … … 257 257 * Input validation and massaging. 258 258 */ 259 AssertPtr(p Cpu);259 AssertPtr(pDis); 260 260 AssertPtrNull(pszBuf); 261 261 Assert(pszBuf || !cchBuf); … … 267 267 fFlags = (fFlags & ~DIS_FMT_FLAGS_BYTES_LEFT) | DIS_FMT_FLAGS_BYTES_RIGHT; 268 268 269 PCDISOPCODE const pOp = p Cpu->pCurInstr;269 PCDISOPCODE const pOp = pDis->pCurInstr; 270 270 271 271 /* … … 348 348 { 349 349 #if HC_ARCH_BITS == 64 || GC_ARCH_BITS == 64 350 if (p Cpu->uInstrAddr >= _4G)351 PUT_NUM(9, "%08x`", (uint32_t)(p Cpu->uInstrAddr >> 32));350 if (pDis->uInstrAddr >= _4G) 351 PUT_NUM(9, "%08x`", (uint32_t)(pDis->uInstrAddr >> 32)); 352 352 #endif 353 PUT_NUM(8, "%08x", (uint32_t)p Cpu->uInstrAddr);353 PUT_NUM(8, "%08x", (uint32_t)pDis->uInstrAddr); 354 354 PUT_C(' '); 355 355 } … … 360 360 if (fFlags & DIS_FMT_FLAGS_BYTES_LEFT) 361 361 { 362 size_t cchTmp = disFormatBytes(p Cpu, pszDst, cchDst, fFlags);362 size_t cchTmp = disFormatBytes(pDis, pszDst, cchDst, fFlags); 363 363 cchOutput += cchTmp; 364 364 if (cchDst > 1) … … 392 392 if ( pOp->uOpcode == OP_INVALID 393 393 || ( pOp->uOpcode == OP_ILLUD2 394 && (p Cpu->fPrefix & DISPREFIX_LOCK)))394 && (pDis->fPrefix & DISPREFIX_LOCK))) 395 395 PUT_SZ("Illegal opcode"); 396 396 else … … 399 399 * Prefixes 400 400 */ 401 if (p Cpu->fPrefix & DISPREFIX_LOCK)401 if (pDis->fPrefix & DISPREFIX_LOCK) 402 402 PUT_SZ("lock "); 403 if(p Cpu->fPrefix & DISPREFIX_REP)403 if(pDis->fPrefix & DISPREFIX_REP) 404 404 PUT_SZ("rep "); 405 else if(p Cpu->fPrefix & DISPREFIX_REPNE)405 else if(pDis->fPrefix & DISPREFIX_REPNE) 406 406 PUT_SZ("repne "); 407 407 … … 415 415 { 416 416 case OP_JECXZ: 417 pszFmt = p Cpu->uOpMode == DISCPUMODE_16BIT ? "jcxz %Jb" : pCpu->uOpMode == DISCPUMODE_32BIT ? "jecxz %Jb" : "jrcxz %Jb";417 pszFmt = pDis->uOpMode == DISCPUMODE_16BIT ? "jcxz %Jb" : pDis->uOpMode == DISCPUMODE_32BIT ? "jecxz %Jb" : "jrcxz %Jb"; 418 418 break; 419 419 case OP_PUSHF: 420 pszFmt = p Cpu->uOpMode == DISCPUMODE_16BIT ? "pushfw" : pCpu->uOpMode == DISCPUMODE_32BIT ? "pushfd" : "pushfq";420 pszFmt = pDis->uOpMode == DISCPUMODE_16BIT ? "pushfw" : pDis->uOpMode == DISCPUMODE_32BIT ? "pushfd" : "pushfq"; 421 421 break; 422 422 case OP_POPF: 423 pszFmt = p Cpu->uOpMode == DISCPUMODE_16BIT ? "popfw" : pCpu->uOpMode == DISCPUMODE_32BIT ? "popfd" : "popfq";423 pszFmt = pDis->uOpMode == DISCPUMODE_16BIT ? "popfw" : pDis->uOpMode == DISCPUMODE_32BIT ? "popfd" : "popfq"; 424 424 break; 425 425 case OP_PUSHA: 426 pszFmt = p Cpu->uOpMode == DISCPUMODE_16BIT ? "pushaw" : "pushad";426 pszFmt = pDis->uOpMode == DISCPUMODE_16BIT ? "pushaw" : "pushad"; 427 427 break; 428 428 case OP_POPA: 429 pszFmt = p Cpu->uOpMode == DISCPUMODE_16BIT ? "popaw" : "popad";429 pszFmt = pDis->uOpMode == DISCPUMODE_16BIT ? "popaw" : "popad"; 430 430 break; 431 431 case OP_INSB: … … 433 433 break; 434 434 case OP_INSWD: 435 pszFmt = p Cpu->uOpMode == DISCPUMODE_16BIT ? "insw" : pCpu->uOpMode == DISCPUMODE_32BIT ? "insd" : "insq";435 pszFmt = pDis->uOpMode == DISCPUMODE_16BIT ? "insw" : pDis->uOpMode == DISCPUMODE_32BIT ? "insd" : "insq"; 436 436 break; 437 437 case OP_OUTSB: … … 439 439 break; 440 440 case OP_OUTSWD: 441 pszFmt = p Cpu->uOpMode == DISCPUMODE_16BIT ? "outsw" : pCpu->uOpMode == DISCPUMODE_32BIT ? "outsd" : "outsq";441 pszFmt = pDis->uOpMode == DISCPUMODE_16BIT ? "outsw" : pDis->uOpMode == DISCPUMODE_32BIT ? "outsd" : "outsq"; 442 442 break; 443 443 case OP_MOVSB: … … 445 445 break; 446 446 case OP_MOVSWD: 447 pszFmt = p Cpu->uOpMode == DISCPUMODE_16BIT ? "movsw" : pCpu->uOpMode == DISCPUMODE_32BIT ? "movsd" : "movsq";447 pszFmt = pDis->uOpMode == DISCPUMODE_16BIT ? "movsw" : pDis->uOpMode == DISCPUMODE_32BIT ? "movsd" : "movsq"; 448 448 break; 449 449 case OP_CMPSB: … … 451 451 break; 452 452 case OP_CMPWD: 453 pszFmt = p Cpu->uOpMode == DISCPUMODE_16BIT ? "cmpsw" : pCpu->uOpMode == DISCPUMODE_32BIT ? "cmpsd" : "cmpsq";453 pszFmt = pDis->uOpMode == DISCPUMODE_16BIT ? "cmpsw" : pDis->uOpMode == DISCPUMODE_32BIT ? "cmpsd" : "cmpsq"; 454 454 break; 455 455 case OP_SCASB: … … 457 457 break; 458 458 case OP_SCASWD: 459 pszFmt = p Cpu->uOpMode == DISCPUMODE_16BIT ? "scasw" : pCpu->uOpMode == DISCPUMODE_32BIT ? "scasd" : "scasq";459 pszFmt = pDis->uOpMode == DISCPUMODE_16BIT ? "scasw" : pDis->uOpMode == DISCPUMODE_32BIT ? "scasd" : "scasq"; 460 460 break; 461 461 case OP_LODSB: … … 463 463 break; 464 464 case OP_LODSWD: 465 pszFmt = p Cpu->uOpMode == DISCPUMODE_16BIT ? "lodsw" : pCpu->uOpMode == DISCPUMODE_32BIT ? "lodsd" : "lodsq";465 pszFmt = pDis->uOpMode == DISCPUMODE_16BIT ? "lodsw" : pDis->uOpMode == DISCPUMODE_32BIT ? "lodsd" : "lodsq"; 466 466 break; 467 467 case OP_STOSB: … … 469 469 break; 470 470 case OP_STOSWD: 471 pszFmt = p Cpu->uOpMode == DISCPUMODE_16BIT ? "stosw" : pCpu->uOpMode == DISCPUMODE_32BIT ? "stosd" : "stosq";471 pszFmt = pDis->uOpMode == DISCPUMODE_16BIT ? "stosw" : pDis->uOpMode == DISCPUMODE_32BIT ? "stosd" : "stosq"; 472 472 break; 473 473 case OP_CBW: 474 pszFmt = p Cpu->uOpMode == DISCPUMODE_16BIT ? "cbw" : pCpu->uOpMode == DISCPUMODE_32BIT ? "cwde" : "cdqe";474 pszFmt = pDis->uOpMode == DISCPUMODE_16BIT ? "cbw" : pDis->uOpMode == DISCPUMODE_32BIT ? "cwde" : "cdqe"; 475 475 break; 476 476 case OP_CWD: 477 pszFmt = p Cpu->uOpMode == DISCPUMODE_16BIT ? "cwd" : pCpu->uOpMode == DISCPUMODE_32BIT ? "cdq" : "cqo";477 pszFmt = pDis->uOpMode == DISCPUMODE_16BIT ? "cwd" : pDis->uOpMode == DISCPUMODE_32BIT ? "cdq" : "cqo"; 478 478 break; 479 479 case OP_SHL: … … 492 492 */ 493 493 case OP_NOP: 494 if (p Cpu->bOpCode == 0x90)494 if (pDis->bOpCode == 0x90) 495 495 /* fine, fine */; 496 496 else if (pszFmt[sizeof("nop %Ev") - 1] == '/' && pszFmt[sizeof("nop %Ev")] == 'p') 497 497 pszFmt = "prefetch %Eb"; 498 else if (p Cpu->bOpCode == 0x1f)498 else if (pDis->bOpCode == 0x1f) 499 499 { 500 Assert(p Cpu->cbInstr >= 3);500 Assert(pDis->cbInstr >= 3); 501 501 PUT_SZ("db 00fh, 01fh,"); 502 PUT_NUM_8(p Cpu->ModRM.u);503 for (unsigned i = 3; i < p Cpu->cbInstr; i++)502 PUT_NUM_8(pDis->ModRM.u); 503 for (unsigned i = 3; i < pDis->cbInstr; i++) 504 504 { 505 505 PUT_C(','); … … 540 540 */ 541 541 case OP_FLD: 542 if (p Cpu->bOpCode == 0xdb) /* m80fp workaround. */543 *(int *)&p Cpu->Param1.fParam &= ~0x1f; /* make it pure OP_PARM_M */542 if (pDis->bOpCode == 0xdb) /* m80fp workaround. */ 543 *(int *)&pDis->Param1.fParam &= ~0x1f; /* make it pure OP_PARM_M */ 544 544 break; 545 545 case OP_LAR: /* hack w -> v, probably not correct. */ 546 *(int *)&p Cpu->Param2.fParam &= ~0x1f;547 *(int *)&p Cpu->Param2.fParam |= OP_PARM_v;546 *(int *)&pDis->Param2.fParam &= ~0x1f; 547 *(int *)&pDis->Param2.fParam |= OP_PARM_v; 548 548 break; 549 549 } … … 552 552 * Formatting context and associated macros. 553 553 */ 554 PCDISOPPARAM pParam = &p Cpu->Param1;554 PCDISOPPARAM pParam = &pDis->Param1; 555 555 int iParam = 1; 556 556 … … 572 572 { \ 573 573 case OP_PARM_v: \ 574 switch (p Cpu->uOpMode) \574 switch (pDis->uOpMode) \ 575 575 { \ 576 576 case DISCPUMODE_16BIT: PUT_SZ("word "); break; \ … … 602 602 #define PUT_SEGMENT_OVERRIDE() \ 603 603 do { \ 604 if (p Cpu->fPrefix & DISPREFIX_SEG) \605 PUT_STR(s_szSegPrefix[p Cpu->idxSegPrefix], 3); \604 if (pDis->fPrefix & DISPREFIX_SEG) \ 605 PUT_STR(s_szSegPrefix[pDis->idxSegPrefix], 3); \ 606 606 } while (0) 607 607 … … 610 610 * Segment prefixing for instructions that doesn't do memory access. 611 611 */ 612 if ( (p Cpu->fPrefix & DISPREFIX_SEG)613 && !DISUSE_IS_EFFECTIVE_ADDR(p Cpu->Param1.fUse)614 && !DISUSE_IS_EFFECTIVE_ADDR(p Cpu->Param2.fUse)615 && !DISUSE_IS_EFFECTIVE_ADDR(p Cpu->Param3.fUse))616 { 617 PUT_STR(s_szSegPrefix[p Cpu->idxSegPrefix], 2);612 if ( (pDis->fPrefix & DISPREFIX_SEG) 613 && !DISUSE_IS_EFFECTIVE_ADDR(pDis->Param1.fUse) 614 && !DISUSE_IS_EFFECTIVE_ADDR(pDis->Param2.fUse) 615 && !DISUSE_IS_EFFECTIVE_ADDR(pDis->Param3.fUse)) 616 { 617 PUT_STR(s_szSegPrefix[pDis->idxSegPrefix], 2); 618 618 PUT_C(' '); 619 619 } … … 649 649 650 650 size_t cchReg; 651 const char *pszReg = disasmFormatYasmBaseReg(p Cpu, pParam, &cchReg);651 const char *pszReg = disasmFormatYasmBaseReg(pDis, pParam, &cchReg); 652 652 PUT_STR(pszReg, cchReg); 653 653 break; … … 691 691 PUT_SZ("dword "); 692 692 else if ( (fUse & DISUSE_DISPLACEMENT64) 693 && (p Cpu->SIB.Bits.Base != 5 || pCpu->ModRM.Bits.Mod != 0)693 && (pDis->SIB.Bits.Base != 5 || pDis->ModRM.Bits.Mod != 0) 694 694 && (int32_t)pParam->uDisp.i64 == (int64_t)pParam->uDisp.i64) //?? 695 695 PUT_SZ("qword "); … … 714 714 { 715 715 size_t cchReg; 716 const char *pszReg = disasmFormatYasmBaseReg(p Cpu, pParam, &cchReg);716 const char *pszReg = disasmFormatYasmBaseReg(pDis, pParam, &cchReg); 717 717 PUT_STR(pszReg, cchReg); 718 718 } … … 724 724 725 725 size_t cchReg; 726 const char *pszReg = disasmFormatYasmIndexReg(p Cpu, pParam, &cchReg);726 const char *pszReg = disasmFormatYasmIndexReg(pDis, pParam, &cchReg); 727 727 PUT_STR(pszReg, cchReg); 728 728 … … 798 798 799 799 case DISUSE_IMMEDIATE16: 800 if ( p Cpu->uCpuMode != pCpu->uOpMode800 if ( pDis->uCpuMode != pDis->uOpMode 801 801 || ( (fFlags & DIS_FMT_FLAGS_STRICT) 802 802 && ( (int8_t)pParam->uValue == (int16_t)pParam->uValue … … 821 821 822 822 case DISUSE_IMMEDIATE32: 823 if ( p Cpu->uOpMode != (pCpu->uCpuMode == DISCPUMODE_16BIT ? DISCPUMODE_16BIT : DISCPUMODE_32BIT) /* not perfect */823 if ( pDis->uOpMode != (pDis->uCpuMode == DISCPUMODE_16BIT ? DISCPUMODE_16BIT : DISCPUMODE_32BIT) /* not perfect */ 824 824 || ( (fFlags & DIS_FMT_FLAGS_STRICT) 825 825 && ( (int8_t)pParam->uValue == (int32_t)pParam->uValue … … 905 905 PUT_SZ(" ("); 906 906 907 RTUINTPTR uTrgAddr = p Cpu->uInstrAddr + pCpu->cbInstr + offDisplacement;908 if (p Cpu->uCpuMode == DISCPUMODE_16BIT)907 RTUINTPTR uTrgAddr = pDis->uInstrAddr + pDis->cbInstr + offDisplacement; 908 if (pDis->uCpuMode == DISCPUMODE_16BIT) 909 909 PUT_NUM_16(uTrgAddr); 910 else if (p Cpu->uCpuMode == DISCPUMODE_32BIT)910 else if (pDis->uCpuMode == DISCPUMODE_32BIT) 911 911 PUT_NUM_32(uTrgAddr); 912 912 else … … 915 915 if (pfnGetSymbol) 916 916 { 917 int rc = pfnGetSymbol(p Cpu, DIS_FMT_SEL_FROM_REG(DISSELREG_CS), uTrgAddr, szSymbol, sizeof(szSymbol), &off, pvUser);917 int rc = pfnGetSymbol(pDis, DIS_FMT_SEL_FROM_REG(DISSELREG_CS), uTrgAddr, szSymbol, sizeof(szSymbol), &off, pvUser); 918 918 if (RT_SUCCESS(rc)) 919 919 { … … 954 954 PUT_NUM_16(pParam->uValue); 955 955 if (pfnGetSymbol) 956 rc = pfnGetSymbol(p Cpu, DIS_FMT_SEL_FROM_VALUE(pParam->uValue >> 16), (uint16_t)pParam->uValue, szSymbol, sizeof(szSymbol), &off, pvUser);956 rc = pfnGetSymbol(pDis, DIS_FMT_SEL_FROM_VALUE(pParam->uValue >> 16), (uint16_t)pParam->uValue, szSymbol, sizeof(szSymbol), &off, pvUser); 957 957 break; 958 958 case DISUSE_IMMEDIATE_ADDR_16_32: … … 961 961 PUT_NUM_32(pParam->uValue); 962 962 if (pfnGetSymbol) 963 rc = pfnGetSymbol(p Cpu, DIS_FMT_SEL_FROM_VALUE(pParam->uValue >> 16), (uint32_t)pParam->uValue, szSymbol, sizeof(szSymbol), &off, pvUser);963 rc = pfnGetSymbol(pDis, DIS_FMT_SEL_FROM_VALUE(pParam->uValue >> 16), (uint32_t)pParam->uValue, szSymbol, sizeof(szSymbol), &off, pvUser); 964 964 break; 965 965 case DISUSE_DISPLACEMENT16: 966 966 PUT_NUM_16(pParam->uValue); 967 967 if (pfnGetSymbol) 968 rc = pfnGetSymbol(p Cpu, DIS_FMT_SEL_FROM_REG(DISSELREG_CS), (uint16_t)pParam->uValue, szSymbol, sizeof(szSymbol), &off, pvUser);968 rc = pfnGetSymbol(pDis, DIS_FMT_SEL_FROM_REG(DISSELREG_CS), (uint16_t)pParam->uValue, szSymbol, sizeof(szSymbol), &off, pvUser); 969 969 break; 970 970 case DISUSE_DISPLACEMENT32: 971 971 PUT_NUM_32(pParam->uValue); 972 972 if (pfnGetSymbol) 973 rc = pfnGetSymbol(p Cpu, DIS_FMT_SEL_FROM_REG(DISSELREG_CS), (uint32_t)pParam->uValue, szSymbol, sizeof(szSymbol), &off, pvUser);973 rc = pfnGetSymbol(pDis, DIS_FMT_SEL_FROM_REG(DISSELREG_CS), (uint32_t)pParam->uValue, szSymbol, sizeof(szSymbol), &off, pvUser); 974 974 break; 975 975 case DISUSE_DISPLACEMENT64: 976 976 PUT_NUM_64(pParam->uValue); 977 977 if (pfnGetSymbol) 978 rc = pfnGetSymbol(p Cpu, DIS_FMT_SEL_FROM_REG(DISSELREG_CS), (uint64_t)pParam->uValue, szSymbol, sizeof(szSymbol), &off, pvUser);978 rc = pfnGetSymbol(pDis, DIS_FMT_SEL_FROM_REG(DISSELREG_CS), (uint64_t)pParam->uValue, szSymbol, sizeof(szSymbol), &off, pvUser); 979 979 break; 980 980 default: … … 1018 1018 PUT_NUM_16(pParam->uValue); 1019 1019 if (pfnGetSymbol) 1020 rc = pfnGetSymbol(p Cpu, DIS_FMT_SEL_FROM_VALUE(pParam->uValue >> 16), (uint16_t)pParam->uValue, szSymbol, sizeof(szSymbol), &off, pvUser);1020 rc = pfnGetSymbol(pDis, DIS_FMT_SEL_FROM_VALUE(pParam->uValue >> 16), (uint16_t)pParam->uValue, szSymbol, sizeof(szSymbol), &off, pvUser); 1021 1021 break; 1022 1022 case DISUSE_IMMEDIATE_ADDR_16_32: … … 1025 1025 PUT_NUM_32(pParam->uValue); 1026 1026 if (pfnGetSymbol) 1027 rc = pfnGetSymbol(p Cpu, DIS_FMT_SEL_FROM_VALUE(pParam->uValue >> 16), (uint32_t)pParam->uValue, szSymbol, sizeof(szSymbol), &off, pvUser);1027 rc = pfnGetSymbol(pDis, DIS_FMT_SEL_FROM_VALUE(pParam->uValue >> 16), (uint32_t)pParam->uValue, szSymbol, sizeof(szSymbol), &off, pvUser); 1028 1028 break; 1029 1029 case DISUSE_DISPLACEMENT16: 1030 1030 PUT_NUM_16(pParam->uDisp.i16); 1031 1031 if (pfnGetSymbol) 1032 rc = pfnGetSymbol(p Cpu, DIS_FMT_SEL_FROM_REG(DISSELREG_CS), pParam->uDisp.u16, szSymbol, sizeof(szSymbol), &off, pvUser);1032 rc = pfnGetSymbol(pDis, DIS_FMT_SEL_FROM_REG(DISSELREG_CS), pParam->uDisp.u16, szSymbol, sizeof(szSymbol), &off, pvUser); 1033 1033 break; 1034 1034 case DISUSE_DISPLACEMENT32: 1035 1035 PUT_NUM_32(pParam->uDisp.i32); 1036 1036 if (pfnGetSymbol) 1037 rc = pfnGetSymbol(p Cpu, DIS_FMT_SEL_FROM_REG(DISSELREG_CS), pParam->uDisp.u32, szSymbol, sizeof(szSymbol), &off, pvUser);1037 rc = pfnGetSymbol(pDis, DIS_FMT_SEL_FROM_REG(DISSELREG_CS), pParam->uDisp.u32, szSymbol, sizeof(szSymbol), &off, pvUser); 1038 1038 break; 1039 1039 case DISUSE_DISPLACEMENT64: 1040 1040 PUT_NUM_64(pParam->uDisp.i64); 1041 1041 if (pfnGetSymbol) 1042 rc = pfnGetSymbol(p Cpu, DIS_FMT_SEL_FROM_REG(DISSELREG_CS), pParam->uDisp.u64, szSymbol, sizeof(szSymbol), &off, pvUser);1042 rc = pfnGetSymbol(pDis, DIS_FMT_SEL_FROM_REG(DISSELREG_CS), pParam->uDisp.u64, szSymbol, sizeof(szSymbol), &off, pvUser); 1043 1043 break; 1044 1044 default: … … 1081 1081 1082 1082 size_t cchReg; 1083 const char *pszReg = disasmFormatYasmBaseReg(p Cpu, pParam, &cchReg);1083 const char *pszReg = disasmFormatYasmBaseReg(pDis, pParam, &cchReg); 1084 1084 PUT_STR(pszReg, cchReg); 1085 1085 PUT_C(']'); … … 1091 1091 Assert(RT_C_IS_ALPHA(pszFmt[0]) && RT_C_IS_ALPHA(pszFmt[1]) && !RT_C_IS_ALPHA(pszFmt[2])); pszFmt += 2; 1092 1092 size_t cchReg; 1093 const char *pszReg = disasmFormatYasmBaseReg(p Cpu, pParam, &cchReg);1093 const char *pszReg = disasmFormatYasmBaseReg(pDis, pParam, &cchReg); 1094 1094 PUT_STR(pszReg, cchReg); 1095 1095 break; … … 1111 1111 switch (++iParam) 1112 1112 { 1113 case 2: pParam = &p Cpu->Param2; break;1114 case 3: pParam = &p Cpu->Param3; break;1113 case 2: pParam = &pDis->Param2; break; 1114 case 3: pParam = &pDis->Param3; break; 1115 1115 default: pParam = NULL; break; 1116 1116 } … … 1141 1141 PUT_C(' '); 1142 1142 #if HC_ARCH_BITS == 64 || GC_ARCH_BITS == 64 1143 if (p Cpu->uInstrAddr >= _4G)1144 PUT_NUM(9, "%08x`", (uint32_t)(p Cpu->uInstrAddr >> 32));1143 if (pDis->uInstrAddr >= _4G) 1144 PUT_NUM(9, "%08x`", (uint32_t)(pDis->uInstrAddr >> 32)); 1145 1145 #endif 1146 PUT_NUM(8, "%08x", (uint32_t)p Cpu->uInstrAddr);1146 PUT_NUM(8, "%08x", (uint32_t)pDis->uInstrAddr); 1147 1147 } 1148 1148 … … 1153 1153 { 1154 1154 PUT_C(' '); 1155 size_t cchTmp = disFormatBytes(p Cpu, pszDst, cchDst, fFlags);1155 size_t cchTmp = disFormatBytes(pDis, pszDst, cchDst, fFlags); 1156 1156 cchOutput += cchTmp; 1157 1157 if (cchTmp >= cchDst) … … 1187 1187 * @returns The number of output characters. If this is >= cchBuf, then the content 1188 1188 * of pszBuf will be truncated. 1189 * @param p Cpu Pointer to the disassembler CPUstate.1189 * @param pDis Pointer to the disassembler state. 1190 1190 * @param pszBuf The output buffer. 1191 1191 * @param cchBuf The size of the output buffer. 1192 1192 */ 1193 DISDECL(size_t) DISFormatYasm(PCDISCPUSTATE p Cpu, char *pszBuf, size_t cchBuf)1194 { 1195 return DISFormatYasmEx(p Cpu, pszBuf, cchBuf, 0 /* fFlags */, NULL /* pfnGetSymbol */, NULL /* pvUser */);1193 DISDECL(size_t) DISFormatYasm(PCDISCPUSTATE pDis, char *pszBuf, size_t cchBuf) 1194 { 1195 return DISFormatYasmEx(pDis, pszBuf, cchBuf, 0 /* fFlags */, NULL /* pfnGetSymbol */, NULL /* pvUser */); 1196 1196 } 1197 1197 … … 1202 1202 * 1203 1203 * @returns true if it's odd, false if it isn't. 1204 * @param p CpuThe disassembler output. The byte fetcher callback will1204 * @param pDis The disassembler output. The byte fetcher callback will 1205 1205 * be used if present as we might need to fetch opcode 1206 1206 * bytes. 1207 1207 */ 1208 DISDECL(bool) DISFormatYasmIsOddEncoding(PDISCPUSTATE p Cpu)1208 DISDECL(bool) DISFormatYasmIsOddEncoding(PDISCPUSTATE pDis) 1209 1209 { 1210 1210 /* 1211 1211 * Mod rm + SIB: Check for duplicate EBP encodings that yasm won't use for very good reasons. 1212 1212 */ 1213 if ( p Cpu->uAddrMode != DISCPUMODE_16BIT ///@todo correct?1214 && p Cpu->ModRM.Bits.Rm == 41215 && p Cpu->ModRM.Bits.Mod != 3)1213 if ( pDis->uAddrMode != DISCPUMODE_16BIT ///@todo correct? 1214 && pDis->ModRM.Bits.Rm == 4 1215 && pDis->ModRM.Bits.Mod != 3) 1216 1216 { 1217 1217 /* No scaled index SIB (index=4), except for ESP. */ 1218 if ( p Cpu->SIB.Bits.Index == 41219 && p Cpu->SIB.Bits.Base != 4)1218 if ( pDis->SIB.Bits.Index == 4 1219 && pDis->SIB.Bits.Base != 4) 1220 1220 return true; 1221 1221 1222 1222 /* EBP + displacement */ 1223 if ( p Cpu->ModRM.Bits.Mod != 01224 && p Cpu->SIB.Bits.Base == 51225 && p Cpu->SIB.Bits.Scale == 0)1223 if ( pDis->ModRM.Bits.Mod != 0 1224 && pDis->SIB.Bits.Base == 5 1225 && pDis->SIB.Bits.Scale == 0) 1226 1226 return true; 1227 1227 } … … 1230 1230 * Seems to be an instruction alias here, but I cannot find any docs on it... hrmpf! 1231 1231 */ 1232 if ( p Cpu->pCurInstr->uOpcode == OP_SHL1233 && p Cpu->ModRM.Bits.Reg == 6)1232 if ( pDis->pCurInstr->uOpcode == OP_SHL 1233 && pDis->ModRM.Bits.Reg == 6) 1234 1234 return true; 1235 1235 … … 1238 1238 */ 1239 1239 uint32_t fPrefixes = 0; 1240 for (uint32_t offOpcode = 0; offOpcode < RT_ELEMENTS(p Cpu->abInstr); offOpcode++)1240 for (uint32_t offOpcode = 0; offOpcode < RT_ELEMENTS(pDis->abInstr); offOpcode++) 1241 1241 { 1242 1242 uint32_t f; 1243 switch (p Cpu->abInstr[offOpcode])1243 switch (pDis->abInstr[offOpcode]) 1244 1244 { 1245 1245 case 0xf0: … … 1271 1271 case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47: 1272 1272 case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f: 1273 f = p Cpu->uCpuMode == DISCPUMODE_64BIT ? DISPREFIX_REX : 0;1273 f = pDis->uCpuMode == DISCPUMODE_64BIT ? DISPREFIX_REX : 0; 1274 1274 break; 1275 1275 … … 1289 1289 { 1290 1290 /* no effective address which it may apply to. */ 1291 Assert((p Cpu->fPrefix & DISPREFIX_SEG) || pCpu->uCpuMode == DISCPUMODE_64BIT);1292 if ( !DISUSE_IS_EFFECTIVE_ADDR(p Cpu->Param1.fUse)1293 && !DISUSE_IS_EFFECTIVE_ADDR(p Cpu->Param2.fUse)1294 && !DISUSE_IS_EFFECTIVE_ADDR(p Cpu->Param3.fUse))1291 Assert((pDis->fPrefix & DISPREFIX_SEG) || pDis->uCpuMode == DISCPUMODE_64BIT); 1292 if ( !DISUSE_IS_EFFECTIVE_ADDR(pDis->Param1.fUse) 1293 && !DISUSE_IS_EFFECTIVE_ADDR(pDis->Param2.fUse) 1294 && !DISUSE_IS_EFFECTIVE_ADDR(pDis->Param3.fUse)) 1295 1295 return true; 1296 1296 } … … 1299 1299 if (fPrefixes & DISPREFIX_ADDRSIZE) 1300 1300 { 1301 Assert(p Cpu->fPrefix & DISPREFIX_ADDRSIZE);1302 if ( p Cpu->pCurInstr->fParam3 == OP_PARM_NONE1303 && p Cpu->pCurInstr->fParam2 == OP_PARM_NONE1304 && ( p Cpu->pCurInstr->fParam1 >= OP_PARM_REG_GEN32_START1305 && p Cpu->pCurInstr->fParam1 <= OP_PARM_REG_GEN32_END))1301 Assert(pDis->fPrefix & DISPREFIX_ADDRSIZE); 1302 if ( pDis->pCurInstr->fParam3 == OP_PARM_NONE 1303 && pDis->pCurInstr->fParam2 == OP_PARM_NONE 1304 && ( pDis->pCurInstr->fParam1 >= OP_PARM_REG_GEN32_START 1305 && pDis->pCurInstr->fParam1 <= OP_PARM_REG_GEN32_END)) 1306 1306 return true; 1307 1307 } … … 1310 1310 if (fPrefixes) 1311 1311 { 1312 switch (p Cpu->pCurInstr->uOpcode)1312 switch (pDis->pCurInstr->uOpcode) 1313 1313 { 1314 1314 /* nop w/ prefix(es). */ … … 1317 1317 1318 1318 case OP_JMP: 1319 if ( p Cpu->pCurInstr->fParam1 != OP_PARM_Jb1320 && p Cpu->pCurInstr->fParam1 != OP_PARM_Jv)1319 if ( pDis->pCurInstr->fParam1 != OP_PARM_Jb 1320 && pDis->pCurInstr->fParam1 != OP_PARM_Jv) 1321 1321 break; 1322 1322 /* fall thru */ … … 1346 1346 if (fPrefixes & ~DISPREFIX_SEG) 1347 1347 { 1348 switch (p Cpu->pCurInstr->uOpcode)1348 switch (pDis->pCurInstr->uOpcode) 1349 1349 { 1350 1350 case OP_POP: 1351 1351 case OP_PUSH: 1352 if ( p Cpu->pCurInstr->fParam1 >= OP_PARM_REG_SEG_START1353 && p Cpu->pCurInstr->fParam1 <= OP_PARM_REG_SEG_END)1352 if ( pDis->pCurInstr->fParam1 >= OP_PARM_REG_SEG_START 1353 && pDis->pCurInstr->fParam1 <= OP_PARM_REG_SEG_END) 1354 1354 return true; 1355 1355 if ( (fPrefixes & ~DISPREFIX_OPSIZE) 1356 && p Cpu->pCurInstr->fParam1 >= OP_PARM_REG_GEN32_START1357 && p Cpu->pCurInstr->fParam1 <= OP_PARM_REG_GEN32_END)1356 && pDis->pCurInstr->fParam1 >= OP_PARM_REG_GEN32_START 1357 && pDis->pCurInstr->fParam1 <= OP_PARM_REG_GEN32_END) 1358 1358 return true; 1359 1359 break; … … 1371 1371 /* Implicit 8-bit register instructions doesn't mix with operand size. */ 1372 1372 if ( (fPrefixes & DISPREFIX_OPSIZE) 1373 && ( ( p Cpu->pCurInstr->fParam1 == OP_PARM_Gb /* r8 */1374 && p Cpu->pCurInstr->fParam2 == OP_PARM_Eb /* r8/mem8 */)1375 || ( p Cpu->pCurInstr->fParam2 == OP_PARM_Gb /* r8 */1376 && p Cpu->pCurInstr->fParam1 == OP_PARM_Eb /* r8/mem8 */))1373 && ( ( pDis->pCurInstr->fParam1 == OP_PARM_Gb /* r8 */ 1374 && pDis->pCurInstr->fParam2 == OP_PARM_Eb /* r8/mem8 */) 1375 || ( pDis->pCurInstr->fParam2 == OP_PARM_Gb /* r8 */ 1376 && pDis->pCurInstr->fParam1 == OP_PARM_Eb /* r8/mem8 */)) 1377 1377 ) 1378 1378 { 1379 switch (p Cpu->pCurInstr->uOpcode)1379 switch (pDis->pCurInstr->uOpcode) 1380 1380 { 1381 1381 case OP_ADD: … … 1401 1401 * yasm: 18F5 sbb ch, dh ; SBB r/m8, r8 1402 1402 */ 1403 if (p Cpu->ModRM.Bits.Mod == 3 /* reg,reg */)1404 { 1405 switch (p Cpu->pCurInstr->uOpcode)1403 if (pDis->ModRM.Bits.Mod == 3 /* reg,reg */) 1404 { 1405 switch (pDis->pCurInstr->uOpcode) 1406 1406 { 1407 1407 case OP_ADD: … … 1413 1413 case OP_XOR: 1414 1414 case OP_CMP: 1415 if ( ( p Cpu->pCurInstr->fParam1 == OP_PARM_Gb /* r8 */1416 && p Cpu->pCurInstr->fParam2 == OP_PARM_Eb /* r8/mem8 */)1417 || ( p Cpu->pCurInstr->fParam1 == OP_PARM_Gv /* rX */1418 && p Cpu->pCurInstr->fParam2 == OP_PARM_Ev /* rX/memX */))1415 if ( ( pDis->pCurInstr->fParam1 == OP_PARM_Gb /* r8 */ 1416 && pDis->pCurInstr->fParam2 == OP_PARM_Eb /* r8/mem8 */) 1417 || ( pDis->pCurInstr->fParam1 == OP_PARM_Gv /* rX */ 1418 && pDis->pCurInstr->fParam2 == OP_PARM_Ev /* rX/memX */)) 1419 1419 return true; 1420 1420 1421 1421 /* 82 (see table A-6). */ 1422 if (p Cpu->bOpCode == 0x82)1422 if (pDis->bOpCode == 0x82) 1423 1423 return true; 1424 1424 break; … … 1431 1431 case OP_POP: 1432 1432 case OP_PUSH: 1433 Assert(p Cpu->bOpCode == 0x8f);1433 Assert(pDis->bOpCode == 0x8f); 1434 1434 return true; 1435 1435 1436 1436 case OP_MOV: 1437 if ( p Cpu->bOpCode == 0x8a1438 || p Cpu->bOpCode == 0x8b)1437 if ( pDis->bOpCode == 0x8a 1438 || pDis->bOpCode == 0x8b) 1439 1439 return true; 1440 1440 break; … … 1446 1446 1447 1447 /* shl eax,1 will be assembled to the form without the immediate byte. */ 1448 if ( p Cpu->pCurInstr->fParam2 == OP_PARM_Ib1449 && (uint8_t)p Cpu->Param2.uValue == 1)1450 { 1451 switch (p Cpu->pCurInstr->uOpcode)1448 if ( pDis->pCurInstr->fParam2 == OP_PARM_Ib 1449 && (uint8_t)pDis->Param2.uValue == 1) 1450 { 1451 switch (pDis->pCurInstr->uOpcode) 1452 1452 { 1453 1453 case OP_SHL: … … 1463 1463 1464 1464 /* And some more - see table A-6. */ 1465 if (p Cpu->bOpCode == 0x82)1466 { 1467 switch (p Cpu->pCurInstr->uOpcode)1465 if (pDis->bOpCode == 0x82) 1466 { 1467 switch (pDis->pCurInstr->uOpcode) 1468 1468 { 1469 1469 case OP_ADD: … … 1485 1485 /* Yasm encodes setnbe al with /2 instead of /0 like the AMD manual 1486 1486 says (intel doesn't appear to care). */ 1487 switch (p Cpu->pCurInstr->uOpcode)1487 switch (pDis->pCurInstr->uOpcode) 1488 1488 { 1489 1489 case OP_SETO: … … 1503 1503 case OP_SETLE: 1504 1504 case OP_SETNLE: 1505 AssertMsg(p Cpu->bOpCode >= 0x90 && pCpu->bOpCode <= 0x9f, ("%#x\n", pCpu->bOpCode));1506 if (p Cpu->ModRM.Bits.Reg != 2)1505 AssertMsg(pDis->bOpCode >= 0x90 && pDis->bOpCode <= 0x9f, ("%#x\n", pDis->bOpCode)); 1506 if (pDis->ModRM.Bits.Reg != 2) 1507 1507 return true; 1508 1508 break; … … 1513 1513 * doesn't quite make sense... 1514 1514 */ 1515 if ( p Cpu->pCurInstr->uOpcode == OP_MOVZX1516 && p Cpu->bOpCode == 0xB71517 && (p Cpu->uCpuMode == DISCPUMODE_16BIT) != !!(fPrefixes & DISPREFIX_OPSIZE))1515 if ( pDis->pCurInstr->uOpcode == OP_MOVZX 1516 && pDis->bOpCode == 0xB7 1517 && (pDis->uCpuMode == DISCPUMODE_16BIT) != !!(fPrefixes & DISPREFIX_OPSIZE)) 1518 1518 return true; 1519 1519 -
trunk/src/VBox/Disassembler/DisasmInternal.h
r41707 r41789 171 171 172 172 173 size_t disFormatBytes(PCDISCPUSTATE p Cpu, char *pszDst, size_t cchDst, uint32_t fFlags);173 size_t disFormatBytes(PCDISCPUSTATE pDis, char *pszDst, size_t cchDst, uint32_t fFlags); 174 174 175 175 /** @} */ -
trunk/src/VBox/Disassembler/DisasmReg.cpp
r41744 r41789 201 201 //***************************************************************************** 202 202 //***************************************************************************** 203 DISDECL(int) DISGetParamSize(P DISCPUSTATE pCpu, PDISOPPARAM pParam)203 DISDECL(int) DISGetParamSize(PCDISCPUSTATE pDis, PCDISOPPARAM pParam) 204 204 { 205 205 unsigned subtype = OP_PARM_VSUBTYPE(pParam->fParam); … … 207 207 if (subtype == OP_PARM_v) 208 208 { 209 switch (p Cpu->uOpMode)209 switch (pDis->uOpMode) 210 210 { 211 211 case DISCPUMODE_32BIT: … … 240 240 241 241 case OP_PARM_p: /* far pointer */ 242 if (p Cpu->uAddrMode == DISCPUMODE_32BIT)242 if (pDis->uAddrMode == DISCPUMODE_32BIT) 243 243 return 6; /* 16:32 */ 244 244 else 245 if (p Cpu->uAddrMode == DISCPUMODE_64BIT)245 if (pDis->uAddrMode == DISCPUMODE_64BIT) 246 246 return 12; /* 16:64 */ 247 247 else … … 257 257 //***************************************************************************** 258 258 //***************************************************************************** 259 DISDECL(DISSELREG) DISDetectSegReg(P DISCPUSTATE pCpu, PDISOPPARAM pParam)260 { 261 if (p Cpu->fPrefix & DISPREFIX_SEG)259 DISDECL(DISSELREG) DISDetectSegReg(PCDISCPUSTATE pDis, PCDISOPPARAM pParam) 260 { 261 if (pDis->fPrefix & DISPREFIX_SEG) 262 262 /* Use specified SEG: prefix. */ 263 return (DISSELREG)p Cpu->idxSegPrefix;263 return (DISSELREG)pDis->idxSegPrefix; 264 264 265 265 /* Guess segment register by parameter type. */ … … 278 278 //***************************************************************************** 279 279 //***************************************************************************** 280 DISDECL(uint8_t) DISQuerySegPrefixByte(P DISCPUSTATE pCpu)281 { 282 Assert(p Cpu->fPrefix & DISPREFIX_SEG);283 switch (p Cpu->idxSegPrefix)280 DISDECL(uint8_t) DISQuerySegPrefixByte(PCDISCPUSTATE pDis) 281 { 282 Assert(pDis->fPrefix & DISPREFIX_SEG); 283 switch (pDis->idxSegPrefix) 284 284 { 285 285 case DISSELREG_ES: … … 491 491 * @returns VBox error code 492 492 * @param pCtx CPU context structure pointer 493 * @param pCpu Pointer to cpu structure which have DISCPUSTATE::mode 494 * set correctly. 493 * @param pDis Pointer to the disassembler state. 495 494 * @param pParam Pointer to the parameter to parse 496 495 * @param pParamVal Pointer to parameter value (OUT) … … 500 499 * 501 500 */ 502 DISDECL(int) DISQueryParamVal(PCPUMCTXCORE pCtx, P DISCPUSTATE pCpu, PDISOPPARAM pParam, PDISQPVPARAMVAL pParamVal, DISQPVWHICH parmtype)501 DISDECL(int) DISQueryParamVal(PCPUMCTXCORE pCtx, PCDISCPUSTATE pDis, PCDISOPPARAM pParam, PDISQPVPARAMVAL pParamVal, DISQPVWHICH parmtype) 503 502 { 504 503 memset(pParamVal, 0, sizeof(*pParamVal)); … … 587 586 if (pParam->fUse & DISUSE_DISPLACEMENT8) 588 587 { 589 if (p Cpu->uCpuMode == DISCPUMODE_32BIT)588 if (pDis->uCpuMode == DISCPUMODE_32BIT) 590 589 pParamVal->val.val32 += (int32_t)pParam->uDisp.i8; 591 590 else 592 if (p Cpu->uCpuMode == DISCPUMODE_64BIT)591 if (pDis->uCpuMode == DISCPUMODE_64BIT) 593 592 pParamVal->val.val64 += (int64_t)pParam->uDisp.i8; 594 593 else … … 598 597 if (pParam->fUse & DISUSE_DISPLACEMENT16) 599 598 { 600 if (p Cpu->uCpuMode == DISCPUMODE_32BIT)599 if (pDis->uCpuMode == DISCPUMODE_32BIT) 601 600 pParamVal->val.val32 += (int32_t)pParam->uDisp.i16; 602 601 else 603 if (p Cpu->uCpuMode == DISCPUMODE_64BIT)602 if (pDis->uCpuMode == DISCPUMODE_64BIT) 604 603 pParamVal->val.val64 += (int64_t)pParam->uDisp.i16; 605 604 else … … 609 608 if (pParam->fUse & DISUSE_DISPLACEMENT32) 610 609 { 611 if (p Cpu->uCpuMode == DISCPUMODE_32BIT)610 if (pDis->uCpuMode == DISCPUMODE_32BIT) 612 611 pParamVal->val.val32 += pParam->uDisp.i32; 613 612 else … … 617 616 if (pParam->fUse & DISUSE_DISPLACEMENT64) 618 617 { 619 Assert(p Cpu->uCpuMode == DISCPUMODE_64BIT);618 Assert(pDis->uCpuMode == DISCPUMODE_64BIT); 620 619 pParamVal->val.val64 += pParam->uDisp.i64; 621 620 } … … 623 622 if (pParam->fUse & DISUSE_RIPDISPLACEMENT32) 624 623 { 625 Assert(p Cpu->uCpuMode == DISCPUMODE_64BIT);624 Assert(pDis->uCpuMode == DISCPUMODE_64BIT); 626 625 /* Relative to the RIP of the next instruction. */ 627 pParamVal->val.val64 += pParam->uDisp.i32 + pCtx->rip + p Cpu->cbInstr;626 pParamVal->val.val64 += pParam->uDisp.i32 + pCtx->rip + pDis->cbInstr; 628 627 } 629 628 return VINF_SUCCESS; … … 750 749 * @returns VBox error code 751 750 * @param pCtx CPU context structure pointer 752 * @param pCpu Pointer to cpu structure which have DISCPUSTATE::mode 753 * set correctly. 751 * @param pDis Pointer to the disassembler state. 754 752 * @param pParam Pointer to the parameter to parse 755 753 * @param pReg Pointer to parameter value (OUT) … … 759 757 * 760 758 */ 761 DISDECL(int) DISQueryParamRegPtr(PCPUMCTXCORE pCtx, P DISCPUSTATE pCpu, PDISOPPARAM pParam, void **ppReg, size_t *pcbSize)762 { 763 NOREF(p Cpu);759 DISDECL(int) DISQueryParamRegPtr(PCPUMCTXCORE pCtx, PCDISCPUSTATE pDis, PCDISOPPARAM pParam, void **ppReg, size_t *pcbSize) 760 { 761 NOREF(pDis); 764 762 if (pParam->fUse & (DISUSE_REG_GEN8|DISUSE_REG_GEN16|DISUSE_REG_GEN32|DISUSE_REG_FP|DISUSE_REG_MMX|DISUSE_REG_XMM|DISUSE_REG_CR|DISUSE_REG_DBG|DISUSE_REG_SEG|DISUSE_REG_TEST)) 765 763 { -
trunk/src/VBox/Disassembler/testcase/tstDisasm-2.cpp
r41781 r41789 128 128 * @returns true if it's valid. false if it isn't. 129 129 * 130 * @param p CpuThe disassembler output.131 */ 132 static bool MyDisasIsValidInstruction(DISCPUSTATE const *p Cpu)133 { 134 switch (p Cpu->pCurInstr->uOpcode)130 * @param pDis The disassembler output. 131 */ 132 static bool MyDisasIsValidInstruction(DISCPUSTATE const *pDis) 133 { 134 switch (pDis->pCurInstr->uOpcode) 135 135 { 136 136 /* These doesn't take memory operands. */ … … 138 138 case OP_MOV_DR: 139 139 case OP_MOV_TR: 140 if (p Cpu->ModRM.Bits.Mod != 3)140 if (pDis->ModRM.Bits.Mod != 3) 141 141 return false; 142 142 break; … … 144 144 /* The 0x8f /0 variant of this instruction doesn't get its /r value verified. */ 145 145 case OP_POP: 146 if ( p Cpu->bOpCode == 0x8f147 && p Cpu->ModRM.Bits.Reg != 0)146 if ( pDis->bOpCode == 0x8f 147 && pDis->ModRM.Bits.Reg != 0) 148 148 return false; 149 149 break; … … 151 151 /* The 0xc6 /0 and 0xc7 /0 variants of this instruction don't get their /r values verified. */ 152 152 case OP_MOV: 153 if ( ( p Cpu->bOpCode == 0xc6154 || p Cpu->bOpCode == 0xc7)155 && p Cpu->ModRM.Bits.Reg != 0)153 if ( ( pDis->bOpCode == 0xc6 154 || pDis->bOpCode == 0xc7) 155 && pDis->ModRM.Bits.Reg != 0) 156 156 return false; 157 157 break;
Note:
See TracChangeset
for help on using the changeset viewer.