Changeset 41823 in vbox
- Timestamp:
- Jun 19, 2012 1:43:39 PM (13 years ago)
- svn:sync-xref-src-repo-rev:
- 78648
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r41802 r41823 380 380 { 381 381 RTGCPTR GCPtrInstr; 382 #if 0 382 383 int rc = SELMToFlatEx(pVCpu, DISSELREG_CS, pCtxCore, pCtxCore->rip, 0, &GCPtrInstr); 384 #else 385 /** @todo Get the CPU mode as well while we're at it! */ 386 int rc = SELMValidateAndConvertCSAddr(pVCpu, pCtxCore->eflags, pCtxCore->ss, pCtxCore->cs, 387 &pCtxCore->csHid, pCtxCore->rip, &GCPtrInstr); 388 #endif 383 389 if (RT_FAILURE(rc)) 384 390 { … … 406 412 * @param pcbInstr Where to return the instruction size. (optional) 407 413 */ 408 VMMDECL(int) EMInterpretDisasOneEx(PVM pVM, PVMCPU pVCpu, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore, PDISCPUSTATE pDis, unsigned *pcbInstr) 414 VMMDECL(int) EMInterpretDisasOneEx(PVM pVM, PVMCPU pVCpu, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore, 415 PDISCPUSTATE pDis, unsigned *pcbInstr) 409 416 { 410 417 DISCPUMODE enmCpuMode = SELMGetCpuModeFromSelector(pVCpu, pCtxCore->eflags, pCtxCore->cs, (PCPUMSELREGHID)&pCtxCore->csHid); 418 /** @todo Deal with too long instruction (=> \#GP), opcode read errors (=> 419 * \#PF, \#GP, \#??), undefined opcodes (=> \#UD), and such. */ 411 420 int rc = DISInstrWithReader(GCPtrInstr, enmCpuMode, emReadBytes, pVCpu, pDis, pcbInstr); 412 421 if (RT_SUCCESS(rc)) -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r41802 r41823 906 906 * Decode the instruction. 907 907 */ 908 RTGCPTR PC; 909 rc = SELMValidateAndConvertCSAddr(pVCpu, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, 910 &pRegFrame->csHid, (RTGCPTR)pRegFrame->eip, &PC); 911 if (rc == VINF_SUCCESS) 908 PDISCPUSTATE pDis = &pVCpu->pgm.s.DisState; 909 uint32_t cbOp; 910 rc = EMInterpretDisasOne(pVM, pVCpu, pRegFrame, pDis, &cbOp); 911 912 /* For now we'll restrict this to rep movsw/d instructions */ 913 if ( rc == VINF_SUCCESS 914 && pDis->pCurInstr->opcode == OP_MOVSWD 915 && (pDis->prefix & DISPREFIX_REP)) 912 916 { 913 PDISCPUSTATE pDis = &pVCpu->pgm.s.DisState; 914 uint32_t cbOp; 915 rc = EMInterpretDisasOneEx(pVM, pVCpu, PC, pRegFrame, pDis, &cbOp); 916 917 /* For now we'll restrict this to rep movsw/d instructions */ 918 if ( rc == VINF_SUCCESS 919 && pDis->pCurInstr->opcode == OP_MOVSWD 920 && (pDis->prefix & DISPREFIX_REP)) 921 { 922 CSAMMarkPossibleCodePage(pVM, pvFault); 923 } 917 CSAMMarkPossibleCodePage(pVM, pvFault); 924 918 } 925 919 } -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r41801 r41823 2974 2974 if (enmMode != DISCPUMODE_16BIT) 2975 2975 { 2976 RTGCPTR pbCode; 2977 int rc = SELMValidateAndConvertCSAddr(pVCpu, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, 2978 &pRegFrame->csHid, (RTGCPTR)pRegFrame->rip, &pbCode); 2979 if (RT_SUCCESS(rc)) 2980 { 2981 uint32_t cbOp; 2982 PDISCPUSTATE pDis = &pVCpu->hwaccm.s.DisState; 2983 2984 pDis->uCpuMode = enmMode; 2985 rc = EMInterpretDisasOneEx(pVM, pVCpu, pbCode, pRegFrame, pDis, &cbOp); 2986 Assert(RT_FAILURE(rc) || pDis->pCurInstr->uOpcode == OP_INVLPG); 2987 if (RT_SUCCESS(rc) && pDis->pCurInstr->uOpcode == OP_INVLPG) 2988 { 2989 Assert(cbOp == pDis->cbInstr); 2990 rc = hmR0svmInterpretInvlPg(pVCpu, pDis, pRegFrame, uASID); 2991 if (RT_SUCCESS(rc)) 2992 pRegFrame->rip += cbOp; /* Move on to the next instruction. */ 2993 2994 return rc; 2995 } 2976 PDISSTATE pDis = &pVCpu->hwaccm.s.DisState; 2977 int rc = EMInterpretDisasOne(pVM, pVCpu, pRegFrame, pDis, NULL); 2978 if (RT_SUCCESS(rc) && pDis->pCurInstr->uOpcode == OP_INVLPG) 2979 { 2980 rc = hmR0svmInterpretInvlPg(pVCpu, pDis, pRegFrame, uASID); 2981 if (RT_SUCCESS(rc)) 2982 pRegFrame->rip += pDis->cbInstr; /* Move on to the next instruction. */ 2983 return rc; 2996 2984 } 2997 2985 } -
trunk/src/VBox/VMM/VMMRC/TRPMRC.cpp
r41800 r41823 172 172 NOREF(uErrorCode); NOREF(offRange); 173 173 174 /* If we ever get here, then the guest has executed an sidt instruction that we failed to patch. In theory this could be very bad, but 175 * there are nasty applications out there that install device drivers that mess with the guest's IDT. In those cases, it's quite ok 176 * to simply ignore the writes and pretend success. 174 /* 175 * If we ever get here, then the guest has executed an SIDT instruction 176 * that we failed to patch. In theory this could be very bad, but there 177 * are nasty applications out there that install device drivers that mess 178 * with the guest's IDT. In those cases, it's quite ok to simply ignore 179 * the writes and pretend success. 177 180 */ 178 RTGCPTR PC; 179 int rc = SELMValidateAndConvertCSAddr(pVCpu, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, 180 (RTGCPTR)pRegFrame->eip, &PC); 181 DISSTATE Dis; 182 int rc = EMInterpretDisasOne(pVM, pVCpu, pRegFrame, &Dis, NULL); 181 183 if (rc == VINF_SUCCESS) 182 184 { 183 DISCPUSTATE Cpu; 184 uint32_t cbOp; 185 rc = EMInterpretDisasOneEx(pVM, pVCpu, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp); 186 if (rc == VINF_SUCCESS) 187 { 188 /* Just ignore the write. */ 189 pRegFrame->eip += Cpu.cbInstr; 190 return VINF_SUCCESS; 191 } 185 /* Just ignore the write. */ 186 pRegFrame->eip += Dis.cbInstr; 187 return VINF_SUCCESS; 192 188 } 193 189 -
trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp
r41803 r41823 498 498 RTGCPTR PC; 499 499 rc = SELMValidateAndConvertCSAddr(pVCpu, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, 500 (RTGCPTR)pRegFrame->eip, &PC);500 pRegFrame->rip, &PC); 501 501 if (RT_FAILURE(rc)) 502 502 { … … 955 955 uint32_t cBits; 956 956 int rc = SELMValidateAndConvertCSAddrGCTrap(pVCpu, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, 957 (RTGCPTR)pRegFrame->eip, &PC, &cBits);957 pRegFrame->rip, &PC, &cBits); 958 958 if (RT_FAILURE(rc)) 959 959 { … … 969 969 DISCPUSTATE Cpu; 970 970 uint32_t cbOp; 971 rc = EMInterpretDisasOneEx(pVM, pVCpu, (RTGCUINTPTR)PC, pRegFrame, &Cpu, &cbOp);971 rc = EMInterpretDisasOneEx(pVM, pVCpu, PC, pRegFrame, &Cpu, &cbOp); 972 972 if (RT_FAILURE(rc)) 973 973 { -
trunk/src/VBox/VMM/VMMRZ/DBGFRZ.cpp
r41803 r41823 127 127 int rc = SELMValidateAndConvertCSAddr(pVCpu, pRegFrame->eflags, pRegFrame->ss, pRegFrame->cs, &pRegFrame->csHid, 128 128 #ifdef IN_RC 129 (RTGCPTR)((RTGCUINTPTR)pRegFrame->eip - 1),129 pRegFrame->eip - 1, 130 130 #else 131 (RTGCPTR)pRegFrame->rip /* no -1 in R0 */,131 pRegFrame->rip /* no -1 in R0 */, 132 132 #endif 133 133 &pPc);
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