Changeset 41825 in vbox
- Timestamp:
- Jun 19, 2012 2:14:28 PM (13 years ago)
- svn:sync-xref-src-repo-rev:
- 78650
- Location:
- trunk
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/err.h
r41753 r41825 569 569 /** PCI passthru is not supported by this build. */ 570 570 #define VERR_PGM_PCI_PASSTHRU_MISCONFIG (-1682) 571 /** PCI physical read with bus mastering disabled. */ 572 #define VINF_PGM_PCI_PHYS_READ_BM_DISABLED (1683) 573 /** PCI physical write with bus mastering disabled. */ 574 #define VINF_PGM_PCI_PHYS_WRITE_BM_DISABLED (1684) 571 575 /** @} */ 572 576 -
trunk/include/VBox/pci.h
r41811 r41825 538 538 } PCIDEVICE; 539 539 540 #ifdef IN_RING3541 int PCIDevPhysRead(PPCIDEVICE pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead);542 int PCIDevPhysWrite(PPCIDEVICE pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite);543 #endif544 545 540 /* @todo: handle extended space access */ 546 541 DECLINLINE(void) PCIDevSetByte(PPCIDEVICE pPciDev, uint32_t uOffset, uint8_t u8Value) -
trunk/include/VBox/vmm/pdmdev.h
r41349 r41825 1300 1300 /** 1301 1301 * Calculates an IRQ tag for a timer, IPI or similar event. 1302 * 1303 * @returns The IRQ tag. 1304 * @param pDevIns Device instance of the APIC. 1305 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP. 1302 * 1303 * @returns The IRQ tag. 1304 * @param pDevIns Device instance of the APIC. 1305 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP. 1306 1306 */ 1307 1307 DECLRCCALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level)); … … 1379 1379 /** 1380 1380 * Calculates an IRQ tag for a timer, IPI or similar event. 1381 * 1382 * @returns The IRQ tag. 1383 * @param pDevIns Device instance of the APIC. 1384 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP. 1381 * 1382 * @returns The IRQ tag. 1383 * @param pDevIns Device instance of the APIC. 1384 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP. 1385 1385 */ 1386 1386 DECLR0CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level)); … … 1457 1457 /** 1458 1458 * Calculates an IRQ tag for a timer, IPI or similar event. 1459 * 1460 * @returns The IRQ tag. 1461 * @param pDevIns Device instance of the APIC. 1462 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP. 1459 * 1460 * @returns The IRQ tag. 1461 * @param pDevIns Device instance of the APIC. 1462 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP. 1463 1463 */ 1464 1464 DECLR3CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level)); … … 4614 4614 } 4615 4615 4616 4617 4616 /** 4618 4617 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks … … 4622 4621 { 4623 4622 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld); 4623 } 4624 4625 /** 4626 * Reads data via bus mastering, if enabled. If no bus mastering is available, 4627 * this function does nothing and returns VINF_NOT_SUPPORTED. 4628 * 4629 * @return IPRT status code. 4630 */ 4631 DECLINLINE(int) PDMDevHlpPCIDevPhysRead(PPCIDEVICE pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead) 4632 { 4633 AssertPtrReturn(pPciDev, VERR_INVALID_POINTER); 4634 AssertPtrReturn(pvBuf, VERR_INVALID_POINTER); 4635 AssertReturn(cbRead, VERR_INVALID_PARAMETER); 4636 4637 if (!PCIDevIsBusmaster(pPciDev)) 4638 { 4639 #ifdef DEBUG 4640 Log2(("%s: %RU16:%RU16: No bus master (anymore), skipping read %p (%z)\n", __FUNCTION__, 4641 PCIDevGetVendorId(pPciDev), PCIDevGetDeviceId(pPciDev), pvBuf, cbRead)); 4642 #endif 4643 return VINF_PGM_PCI_PHYS_READ_BM_DISABLED; 4644 } 4645 4646 return PDMDevHlpPhysRead(pPciDev->pDevIns, GCPhys, pvBuf, cbRead); 4647 } 4648 4649 /** 4650 * Writes data via bus mastering, if enabled. If no bus mastering is available, 4651 * this function does nothing and returns VINF_NOT_SUPPORTED. 4652 * 4653 * @return IPRT status code. 4654 */ 4655 DECLINLINE(int) PDMDevHlpPCIDevPhysWrite(PPCIDEVICE pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite) 4656 { 4657 AssertPtrReturn(pPciDev, VERR_INVALID_POINTER); 4658 AssertPtrReturn(pvBuf, VERR_INVALID_POINTER); 4659 AssertReturn(cbWrite, VERR_INVALID_PARAMETER); 4660 4661 if (!PCIDevIsBusmaster(pPciDev)) 4662 { 4663 #ifdef DEBUG 4664 Log2(("%s: %RU16:%RU16: No bus master (anymore), skipping write %p (%z)\n", __FUNCTION__, 4665 PCIDevGetVendorId(pPciDev), PCIDevGetDeviceId(pPciDev), pvBuf, cbWrite)); 4666 #endif 4667 return VINF_PGM_PCI_PHYS_WRITE_BM_DISABLED; 4668 } 4669 4670 return PDMDevHlpPhysWrite(pPciDev->pDevIns, GCPhys, pvBuf, cbWrite); 4624 4671 } 4625 4672 -
trunk/src/VBox/Devices/Bus/DevPCI.cpp
r41816 r41825 242 242 243 243 #ifdef IN_RING3 244 /**245 * Reads data via bus mastering, if enabled. If no bus mastering is available,246 * this function does nothing and returns VINF_NOT_SUPPORTED.247 *248 * @return IPRT status code.249 */250 int PCIDevPhysRead(PPCIDEVICE pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)251 {252 AssertPtrReturn(pPciDev, VERR_INVALID_POINTER);253 AssertPtrReturn(pvBuf, VERR_INVALID_POINTER);254 AssertReturn(cbRead, VERR_INVALID_PARAMETER);255 256 if (!PCIDevIsBusmaster(pPciDev))257 {258 #ifdef DEBUG259 Log2(("%s: %RU16:%RU16: No bus master (anymore), skipping read %p (%z)\n", __FUNCTION__,260 PCIDevGetVendorId(pPciDev), PCIDevGetDeviceId(pPciDev), pvBuf, cbRead));261 #endif262 return VINF_NOT_SUPPORTED;263 }264 265 return PDMDevHlpPhysRead(pPciDev->pDevIns, GCPhys, pvBuf, cbRead);266 }267 268 /**269 * Writes data via bus mastering, if enabled. If no bus mastering is available,270 * this function does nothing and returns VINF_NOT_SUPPORTED.271 *272 * @return IPRT status code.273 */274 int PCIDevPhysWrite(PPCIDEVICE pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)275 {276 AssertPtrReturn(pPciDev, VERR_INVALID_POINTER);277 AssertPtrReturn(pvBuf, VERR_INVALID_POINTER);278 AssertReturn(cbWrite, VERR_INVALID_PARAMETER);279 280 if (!PCIDevIsBusmaster(pPciDev))281 {282 #ifdef DEBUG283 Log2(("%s: %RU16:%RU16: No bus master (anymore), skipping write %p (%z)\n", __FUNCTION__,284 PCIDevGetVendorId(pPciDev), PCIDevGetDeviceId(pPciDev), pvBuf, cbWrite));285 #endif286 return VINF_NOT_SUPPORTED;287 }288 289 return PDMDevHlpPhysWrite(pPciDev->pDevIns, GCPhys, pvBuf, cbWrite);290 }291 292 244 static void pci_update_mappings(PCIDevice *d) 293 245 { -
trunk/src/VBox/Devices/Storage/DevATA.cpp
r41815 r41825 5017 5017 AssertPtr(pATAState); 5018 5018 if (uTxDir == PDMBLOCKTXDIR_FROM_DEVICE) 5019 P CIDevPhysWrite(&pATAState->dev, pBuffer, s->CTX_SUFF(pbIOBuffer) + iIOBufferCur, dmalen);5019 PDMDevHlpPCIDevPhysWrite(&pATAState->dev, pBuffer, s->CTX_SUFF(pbIOBuffer) + iIOBufferCur, dmalen); 5020 5020 else 5021 P CIDevPhysRead(&pATAState->dev, pBuffer, s->CTX_SUFF(pbIOBuffer) + iIOBufferCur, dmalen);5021 PDMDevHlpPCIDevPhysRead(&pATAState->dev, pBuffer, s->CTX_SUFF(pbIOBuffer) + iIOBufferCur, dmalen); 5022 5022 5023 5023 iIOBufferCur += dmalen;
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