Changeset 41847 in vbox
- Timestamp:
- Jun 20, 2012 1:43:46 PM (12 years ago)
- Location:
- trunk
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/err.h
r41825 r41847 569 569 /** PCI passthru is not supported by this build. */ 570 570 #define VERR_PGM_PCI_PASSTHRU_MISCONFIG (-1682) 571 /** PCI physical read with bus mastering disabled. */572 #define VINF_PGM_PCI_PHYS_READ_BM_DISABLED (1683)573 /** PCI physical write with bus mastering disabled. */574 #define VINF_PGM_PCI_PHYS_WRITE_BM_DISABLED (1684)575 571 /** @} */ 576 572 … … 1215 1211 * misconfiguration or in rare cases a buggy pci device. */ 1216 1212 #define VERR_PDM_NO_PCI_BUS (-2833) 1213 /** PCI physical read with bus mastering disabled. */ 1214 #define VINF_PDM_PCI_PHYS_READ_BM_DISABLED (2833) 1217 1215 /** The device is not a registered PCI device and thus cannot 1218 1216 * perform any PCI operations. The device forgot to register it self. */ 1219 1217 #define VERR_PDM_NOT_PCI_DEVICE (-2834) 1218 /** PCI physical write with bus mastering disabled. */ 1219 #define VINF_PDM_PCI_PHYS_WRITE_BM_DISABLED (2834) 1220 1220 1221 1221 /** The version of the device registration structure is unknown -
trunk/include/VBox/vmm/pdmdev.h
r41826 r41847 2189 2189 typedef struct PDMDEVHLPR3 2190 2190 { 2191 /** Structure version. PDM_DEVHLP _VERSION defines the current version. */2191 /** Structure version. PDM_DEVHLPR3_VERSION defines the current version. */ 2192 2192 uint32_t u32Version; 2193 2193 … … 2857 2857 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, 2858 2858 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args)); 2859 2860 /** 2861 * Reads data via bus mastering, if enabled. If no bus mastering is available, 2862 * this function does nothing and returns VINF_PGM_PCI_PHYS_READ_BM_DISABLED. 2863 * 2864 * @return IPRT status code. 2865 */ 2866 DECLR3CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)); 2867 2868 /** 2869 * Writes data via bus mastering, if enabled. If no bus mastering is available, 2870 * this function does nothing and returns VINF_PGM_PCI_PHYS_WRITE_BM_DISABLED. 2871 * 2872 * @return IPRT status code. 2873 */ 2874 DECLR3CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)); 2859 2875 2860 2876 /** … … 3511 3527 /** @} */ 3512 3528 3513 /** Just a safety precaution. (PDM_DEVHLP _VERSION) */3529 /** Just a safety precaution. (PDM_DEVHLPR3_VERSION) */ 3514 3530 uint32_t u32TheEnd; 3515 3531 } PDMDEVHLPR3; … … 3521 3537 3522 3538 /** Current PDMDEVHLPR3 version number. */ 3523 #define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 8, 0)3539 #define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 9, 0) 3524 3540 3525 3541 … … 3531 3547 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */ 3532 3548 uint32_t u32Version; 3549 3550 /** 3551 * Reads data via bus mastering, if enabled. If no bus mastering is available, 3552 * this function does nothing and returns VINF_PGM_PCI_PHYS_READ_BM_DISABLED. 3553 * 3554 * @return IPRT status code. 3555 */ 3556 DECLRCCALLBACKMEMBER(int, pfnPCIDevPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)); 3557 3558 /** 3559 * Writes data via bus mastering, if enabled. If no bus mastering is available, 3560 * this function does nothing and returns VINF_PGM_PCI_PHYS_WRITE_BM_DISABLED. 3561 * 3562 * @return IPRT status code. 3563 */ 3564 DECLRCCALLBACKMEMBER(int, pfnPCIDevPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)); 3533 3565 3534 3566 /** … … 3712 3744 3713 3745 /** Current PDMDEVHLP version number. */ 3714 #define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 2, 0)3746 #define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 3, 0) 3715 3747 3716 3748 … … 3722 3754 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */ 3723 3755 uint32_t u32Version; 3756 3757 /** 3758 * Reads data via bus mastering, if enabled. If no bus mastering is available, 3759 * this function does nothing and returns VINF_PGM_PCI_PHYS_READ_BM_DISABLED. 3760 * 3761 * @return IPRT status code. 3762 */ 3763 DECLR0CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)); 3764 3765 /** 3766 * Writes data via bus mastering, if enabled. If no bus mastering is available, 3767 * this function does nothing and returns VINF_PGM_PCI_PHYS_WRITE_BM_DISABLED. 3768 * 3769 * @return IPRT status code. 3770 */ 3771 DECLR0CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)); 3724 3772 3725 3773 /** … … 3911 3959 3912 3960 /** Current PDMDEVHLP version number. */ 3913 #define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 2, 0)3961 #define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 3, 0) 3914 3962 3915 3963 … … 4641 4689 PCIDevGetVendorId(pPciDev), PCIDevGetDeviceId(pPciDev), pvBuf, cbRead)); 4642 4690 #endif 4643 return VINF_P GM_PCI_PHYS_READ_BM_DISABLED;4691 return VINF_PDM_PCI_PHYS_READ_BM_DISABLED; 4644 4692 } 4645 4693 … … 4665 4713 PCIDevGetVendorId(pPciDev), PCIDevGetDeviceId(pPciDev), pvBuf, cbWrite)); 4666 4714 #endif 4667 return VINF_P GM_PCI_PHYS_WRITE_BM_DISABLED;4715 return VINF_PDM_PCI_PHYS_WRITE_BM_DISABLED; 4668 4716 } 4669 4717 -
trunk/src/VBox/VMM/VMMR0/PDMR0Device.cpp
r41800 r41847 57 57 58 58 /******************************************************************************* 59 * Prototypes * 60 *******************************************************************************/ 61 static int pdmR0DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead); 62 static int pdmR0DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite); 63 64 65 /******************************************************************************* 59 66 * Internal Functions * 60 67 *******************************************************************************/ … … 66 73 * @{ 67 74 */ 75 76 /** @interface_method_impl{PDMDEVHLPR0,pfnPCIPhysRead} */ 77 static DECLCALLBACK(int) pdmR0DevHlp_PCIPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead) 78 { 79 PDMDEV_ASSERT_DEVINS(pDevIns); 80 LogFlow(("pdmR0DevHlp_PCIPhysRead: caller=%p/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n", 81 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbRead)); 82 83 PCIDevice *pPciDev = pDevIns->Internal.s.pPciDeviceR0; 84 AssertPtrReturn(pPciDev, VERR_INVALID_POINTER); 85 86 if (!PCIDevIsBusmaster(pPciDev)) 87 { 88 #ifdef DEBUG 89 LogFlow(("%s: %RU16:%RU16: No bus master (anymore), skipping read %p (%z)\n", __FUNCTION__, 90 PCIDevGetVendorId(pPciDev), PCIDevGetDeviceId(pPciDev), pvBuf, cbRead)); 91 #endif 92 return VINF_PDM_PCI_PHYS_READ_BM_DISABLED; 93 } 94 95 return pdmR0DevHlp_PhysRead(pDevIns, GCPhys, pvBuf, cbRead); 96 } 97 98 99 /** @interface_method_impl{PDMDEVHLPR0,pfnPCIPhysRead} */ 100 static DECLCALLBACK(int) pdmR0DevHlp_PCIPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite) 101 { 102 PDMDEV_ASSERT_DEVINS(pDevIns); 103 LogFlow(("pdmR0DevHlp_PCIPhysWrite: caller=%p/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n", 104 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbWrite)); 105 106 PCIDevice *pPciDev = pDevIns->Internal.s.pPciDeviceR0; 107 AssertPtrReturn(pPciDev, VERR_INVALID_POINTER); 108 109 if (!PCIDevIsBusmaster(pPciDev)) 110 { 111 #ifdef DEBUG 112 LogFlow(("%s: %RU16:%RU16: No bus master (anymore), skipping write %p (%z)\n", __FUNCTION__, 113 PCIDevGetVendorId(pPciDev), PCIDevGetDeviceId(pPciDev), pvBuf, cbWrite)); 114 #endif 115 return VINF_PDM_PCI_PHYS_WRITE_BM_DISABLED; 116 } 117 118 return pdmR0DevHlp_PhysWrite(pDevIns, GCPhys, pvBuf, cbWrite); 119 } 120 68 121 69 122 /** @interface_method_impl{PDMDEVHLPR0,pfnPCISetIrq} */ … … 331 384 { 332 385 PDM_DEVHLPR0_VERSION, 386 pdmR0DevHlp_PCIPhysRead, 387 pdmR0DevHlp_PCIPhysWrite, 333 388 pdmR0DevHlp_PCISetIrq, 334 389 pdmR0DevHlp_ISASetIrq, -
trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp
r41783 r41847 1063 1063 1064 1064 NOREF(pVM); 1065 } 1066 1067 1068 /** @interface_method_impl{PDMDEVHLPR3,pfnPCIDevPhysRead} */ 1069 static DECLCALLBACK(int) pdmR3DevHlp_PCIPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead) 1070 { 1071 PDMDEV_ASSERT_DEVINS(pDevIns); 1072 return PDMDevHlpPCIDevPhysRead(pDevIns->Internal.s.pPciDeviceR3, GCPhys, pvBuf, cbRead); 1073 } 1074 1075 1076 /** @interface_method_impl{PDMDEVHLPR3,pfnPCIDevPhysWrite} */ 1077 static DECLCALLBACK(int) pdmR3DevHlp_PCIPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite) 1078 { 1079 PDMDEV_ASSERT_DEVINS(pDevIns); 1080 return PDMDevHlpPCIDevPhysWrite(pDevIns->Internal.s.pPciDeviceR3, GCPhys, pvBuf, cbWrite); 1065 1081 } 1066 1082 … … 3344 3360 pdmR3DevHlp_STAMRegisterF, 3345 3361 pdmR3DevHlp_STAMRegisterV, 3362 pdmR3DevHlp_PCIPhysRead, 3363 pdmR3DevHlp_PCIPhysWrite, 3346 3364 pdmR3DevHlp_PCIRegister, 3347 3365 pdmR3DevHlp_PCIRegisterMsi, … … 3563 3581 pdmR3DevHlp_STAMRegisterF, 3564 3582 pdmR3DevHlp_STAMRegisterV, 3583 pdmR3DevHlp_PCIPhysRead, 3584 pdmR3DevHlp_PCIPhysWrite, 3565 3585 pdmR3DevHlp_PCIRegister, 3566 3586 pdmR3DevHlp_PCIRegisterMsi, -
trunk/src/VBox/VMM/VMMRC/PDMRCDevice.cpp
r41783 r41847 55 55 56 56 /******************************************************************************* 57 * Prototypes * 58 *******************************************************************************/ 59 static int pdmRCDevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead); 60 static int pdmRCDevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite); 61 62 63 /******************************************************************************* 57 64 * Internal Functions * 58 65 *******************************************************************************/ … … 63 70 * @{ 64 71 */ 72 73 /** @interface_method_impl{PDMDEVHLPRC,pfnPCIPhysRead} */ 74 static DECLCALLBACK(int) pdmRCDevHlp_PCIPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead) 75 { 76 PDMDEV_ASSERT_DEVINS(pDevIns); 77 LogFlow(("pdmRCDevHlp_PCIPhysRead: caller=%p/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n", 78 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbRead)); 79 80 PCIDevice *pPciDev = pDevIns->Internal.s.pPciDeviceRC; 81 AssertPtrReturn(pPciDev, VERR_INVALID_POINTER); 82 83 if (!PCIDevIsBusmaster(pPciDev)) 84 { 85 #ifdef DEBUG 86 LogFlow(("%s: %RU16:%RU16: No bus master (anymore), skipping read %p (%z)\n", __FUNCTION__, 87 PCIDevGetVendorId(pPciDev), PCIDevGetDeviceId(pPciDev), pvBuf, cbRead)); 88 #endif 89 return VINF_PDM_PCI_PHYS_READ_BM_DISABLED; 90 } 91 92 return pdmRCDevHlp_PhysRead(pDevIns, GCPhys, pvBuf, cbRead); 93 } 94 95 96 /** @interface_method_impl{PDMDEVHLPRC,pfnPCIPhysRead} */ 97 static DECLCALLBACK(int) pdmRCDevHlp_PCIPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite) 98 { 99 PDMDEV_ASSERT_DEVINS(pDevIns); 100 LogFlow(("pdmRCDevHlp_PCIPhysWrite: caller=%p/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n", 101 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbWrite)); 102 103 PCIDevice *pPciDev = pDevIns->Internal.s.pPciDeviceRC; 104 AssertPtrReturn(pPciDev, VERR_INVALID_POINTER); 105 106 if (!PCIDevIsBusmaster(pPciDev)) 107 { 108 #ifdef DEBUG 109 LogFlow(("%s: %RU16:%RU16: No bus master (anymore), skipping write %p (%z)\n", __FUNCTION__, 110 PCIDevGetVendorId(pPciDev), PCIDevGetDeviceId(pPciDev), pvBuf, cbWrite)); 111 #endif 112 return VINF_PDM_PCI_PHYS_WRITE_BM_DISABLED; 113 } 114 115 return pdmRCDevHlp_PhysWrite(pDevIns, GCPhys, pvBuf, cbWrite); 116 } 117 65 118 66 119 /** @interface_method_impl{PDMDEVHLPRC,pfnPCISetIrq} */ … … 316 369 { 317 370 PDM_DEVHLPRC_VERSION, 371 pdmRCDevHlp_PCIPhysRead, 372 pdmRCDevHlp_PCIPhysWrite, 318 373 pdmRCDevHlp_PCISetIrq, 319 374 pdmRCDevHlp_ISASetIrq,
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