VirtualBox

Changeset 41934 in vbox for trunk/src/VBox


Ignore:
Timestamp:
Jun 27, 2012 7:42:27 PM (13 years ago)
Author:
vboxsync
Message:

build fix

Location:
trunk/src/VBox/VMM
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/EMAll.cpp

    r41906 r41934  
    446446VMMDECL(VBOXSTRICTRC) EMInterpretInstruction(PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault)
    447447{
     448    Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu));
    448449    LogFlow(("EMInterpretInstruction %RGv fault %RGv\n", (RTGCPTR)pRegFrame->rip, pvFault));
    449450#ifdef VBOX_WITH_IEM
     
    501502{
    502503    LogFlow(("EMInterpretInstructionEx %RGv fault %RGv\n", (RTGCPTR)pRegFrame->rip, pvFault));
     504    Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu));
    503505#ifdef VBOX_WITH_IEM
    504506    NOREF(pvFault);
     
    564566{
    565567    LogFlow(("EMInterpretInstructionDisasState %RGv fault %RGv\n", (RTGCPTR)pRegFrame->rip, pvFault));
     568    Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu));
    566569#ifdef VBOX_WITH_IEM
    567570    NOREF(pDis); NOREF(pvFault); NOREF(enmCodeType);
     
    606609    int         rc;
    607610
     611    Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu));
    608612    Assert(!CPUMIsGuestIn64BitCode(pVCpu, pRegFrame));
    609613    /** @todo Rainy day: Test what happens when VERR_EM_INTERPRETER is returned by
     
    671675VMMDECL(int) EMInterpretCpuId(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame)
    672676{
     677    Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu));
    673678    uint32_t iLeaf = pRegFrame->eax;
    674679    NOREF(pVM);
     
    698703VMMDECL(int) EMInterpretRdtsc(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame)
    699704{
     705    Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu));
    700706    unsigned uCR4 = CPUMGetGuestCR4(pVCpu);
    701707
     
    724730VMMDECL(int) EMInterpretRdtscp(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
    725731{
    726     unsigned uCR4 = CPUMGetGuestCR4(pVCpu);
     732    Assert(pCtx == CPUMQueryGuestCtxPtr(pVCpu));
     733    uint32_t uCR4 = CPUMGetGuestCR4(pVCpu);
    727734
    728735    if (!CPUMGetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_RDTSCP))
     
    758765VMMDECL(int) EMInterpretRdpmc(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame)
    759766{
    760     unsigned uCR4 = CPUMGetGuestCR4(pVCpu);
     767    Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu));
     768    uint32_t uCR4 = CPUMGetGuestCR4(pVCpu);
    761769
    762770    /* If X86_CR4_PCE is not set, then CPL must be zero. */
     
    783791VMMDECL(VBOXSTRICTRC) EMInterpretMWait(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame)
    784792{
     793    Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu));
    785794    uint32_t u32Dummy, u32ExtFeatures, cpl, u32MWaitFeatures;
    786795    NOREF(pVM);
     
    822831{
    823832    uint32_t u32Dummy, u32ExtFeatures, cpl;
     833    Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu));
    824834    NOREF(pVM);
    825835
     
    862872     * (in absence of segment override prefixes)????
    863873     */
     874    Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu));
    864875    NOREF(pVM); NOREF(pRegFrame);
    865876#ifdef IN_RC
     
    897908    /** @todo Clean up this mess. */
    898909    LogFlow(("EMInterpretCRxWrite at %RGv CR%d <- %RX64\n", (RTGCPTR)pRegFrame->rip, DestRegCrx, val));
     910    Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu));
    899911    switch (DestRegCrx)
    900912    {
     
    10321044    uint64_t val;
    10331045    int      rc;
     1046    Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu));
    10341047
    10351048    if (CPUMIsGuestIn64BitCode(pVCpu, pRegFrame))
     
    10621075VMMDECL(int) EMInterpretLMSW(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint16_t u16Data)
    10631076{
     1077    Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu));
    10641078    uint64_t OldCr0 = CPUMGetGuestCR0(pVCpu);
    10651079
     
    10841098{
    10851099    NOREF(pVM);
     1100
    10861101    uint64_t cr0 = CPUMGetGuestCR0(pVCpu);
    10871102    if (!(cr0 & X86_CR0_TS))
     
    11041119VMMDECL(int) EMInterpretCRxRead(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegGen, uint32_t SrcRegCrx)
    11051120{
     1121    Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu));
    11061122    uint64_t val64;
    11071123    int rc = CPUMGetGuestCRx(pVCpu, SrcRegCrx, &val64);
     
    11361152VMMDECL(int) EMInterpretDRxWrite(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t DestRegDrx, uint32_t SrcRegGen)
    11371153{
     1154    Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu));
    11381155    uint64_t val;
    11391156    int      rc;
     
    11771194{
    11781195    uint64_t val64;
     1196    Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu));
    11791197    NOREF(pVM);
    11801198
     
    30273045VMMDECL(int) EMInterpretWrmsr(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame)
    30283046{
     3047    Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu));
     3048
    30293049    /* Check the current privilege level, this instruction is supervisor only. */
    30303050    if (CPUMGetGuestCPL(pVCpu, pRegFrame) != 0)
  • trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

    r41906 r41934  
    77777777
    77787778/**
    7779  * Updates the real CPU context structure with the context core (from the trap
    7780  * stack frame) before interpreting any instructions.
    7781  *
    7782  * @param   pCtx        The real CPU context.
    7783  * @param   pCtxCore    The trap stack CPU core context.
    7784  */
    7785 DECLINLINE(void) iemCtxCoreToCtx(PCPUMCTX pCtx, PCCPUMCTXCORE pCtxCore)
    7786 {
    7787     PCPUMCTXCORE pDst = CPUMCTX2CORE(pCtx);
    7788     if (pDst != pCtxCore)
    7789         *pDst = *pCtxCore;
    7790 }
    7791 
    7792 
    7793 /**
    7794  * Updates the context core (from the trap stack frame) with the updated values
    7795  * from the real CPU context structure after instruction emulation.
    7796  *
    7797  * @param   pCtx        The real CPU context.
    7798  * @param   pCtxCore    The trap stack CPU core context.
    7799  */
    7800 DECLINLINE(void) iemCtxToCtxCore(PCPUMCTXCORE pCtxCore, PCCPUMCTX pCtx)
    7801 {
    7802     PCCPUMCTXCORE pSrc = CPUMCTX2CORE(pCtx);
    7803     if (pSrc != pCtxCore)
    7804         *pCtxCore = *pSrc;
    7805 }
    7806 
    7807 
    7808 /**
    78097779 * The actual code execution bits of IEMExecOne, IEMExecOneEx, and
    78107780 * IEMExecOneWithPrefetchedByPC.
     
    79167886    PIEMCPU  pIemCpu = &pVCpu->iem.s;
    79177887    PCPUMCTX pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
    7918 
    7919     iemCtxCoreToCtx(pCtx, pCtxCore);
     7888    AssertReturn(CPUMCTX2CORE(pCtx) == pCtxCore, VERR_IEM_IPE_3);
     7889
    79207890    iemInitDecoder(pIemCpu);
    79217891    uint32_t const cbOldWritten = pIemCpu->cbWritten;
     
    79257895    {
    79267896        rcStrict = iemExecOneInner(pVCpu, pIemCpu);
    7927         if (rcStrict == VINF_SUCCESS)
    7928             iemCtxToCtxCore(pCtxCore, pCtx);
    79297897        if (pcbWritten)
    79307898            *pcbWritten = pIemCpu->cbWritten - cbOldWritten;
     
    79397907    PIEMCPU  pIemCpu = &pVCpu->iem.s;
    79407908    PCPUMCTX pCtx    = pVCpu->iem.s.CTX_SUFF(pCtx);
    7941 
    7942     iemCtxCoreToCtx(pCtx, pCtxCore);
     7909    AssertReturn(CPUMCTX2CORE(pCtx) == pCtxCore, VERR_IEM_IPE_3);
    79437910
    79447911    VBOXSTRICTRC rcStrict;
     
    79567923    {
    79577924        rcStrict = iemExecOneInner(pVCpu, pIemCpu);
    7958         if (rcStrict == VINF_SUCCESS)
    7959             iemCtxToCtxCore(pCtxCore, pCtx);
    79607925    }
    79617926    return rcStrict;
  • trunk/src/VBox/VMM/VMMSwitcher/LegacyandAMD64.mac

    r41933 r41934  
    661661
    662662
     663GLOBALNAME End
    663664;
    664665; The description string (in the text section).
Note: See TracChangeset for help on using the changeset viewer.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette