Changeset 42045 in vbox for trunk/src/VBox/VMM/VMMR0

Timestamp:

Jul 9, 2012 6:45:52 AM (12 years ago)

Author:

vboxsync

Message:

VMM/HWVMXR0: Back out r78951, better fix for acquiring/toggling new ASIDs on host Cpu resume.

Location:

trunk/src/VBox/VMM/VMMR0

Files:

• HWACCMR0.cpp (modified) (5 diffs)
• HWVMXR0.cpp (modified) (9 diffs)

trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp

@@ -866 +866 @@
     pCpu->idCpu         = idCpu;
     pCpu->uCurrentASID  = 0;    /* we'll aways increment this the first time (host uses ASID 0) */
-    pCpu->cTLBFlushes   = 0;
-    pCpu->fASIDState    = true;
+    /* Do NOT reset cTLBFlushes here, see @bugref{6255}. */
 
     /* Should never happen */
@@ -940 +939 @@
             {
                 g_HvmR0.aCpuInfo[iCpu].fConfigured = true;
+                g_HvmR0.aCpuInfo[iCpu].cTLBFlushes = 0;
                 Assert(g_HvmR0.aCpuInfo[iCpu].hMemObj == NIL_RTR0MEMOBJ);
             }
@@ -947 +947 @@
         }
         else
-            AssertMsgFailed(("HWACCMR0EnableAllCpus/SUPR0EnableVTx: rc=%Rrc\n", rc));
+            AssertMsgFailed(("hmR0EnableAllCpuOnce/SUPR0EnableVTx: rc=%Rrc\n", rc));
     }
     else
@@ -968 +968 @@
             }
             g_HvmR0.aCpuInfo[i].fConfigured = false;
+            g_HvmR0.aCpuInfo[i].cTLBFlushes = 0;
         }
 
@@ -978 +979 @@
             if (RT_SUCCESS(rc))
                 rc = hmR0FirstRcGetStatus(&FirstRc);
-            AssertMsgRC(rc, ("HWACCMR0EnableAllCpus failed for cpu %d with rc=%d\n", hmR0FirstRcGetCpuId(&FirstRc), rc));
+            AssertMsgRC(rc, ("hmR0EnableAllCpuOnce failed for cpu %d with rc=%d\n", hmR0FirstRcGetCpuId(&FirstRc), rc));
         }
         else

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

@@ -166 +166 @@
      * Ensure each VCPU scheduled on this CPU gets a new VPID on resume. See @bugref{6255}.
      */
-    pCpu->fASIDState = !pCpu->fASIDState;
+    ++pCpu->cTLBFlushes;
 
     return VINF_SUCCESS;
@@ -2400 +2400 @@
     bool fNewASID = false;
     if (   pVCpu->hwaccm.s.idLastCpu != pCpu->idCpu
-        || pVCpu->hwaccm.s.cTLBFlushes != pCpu->cTLBFlushes
-        || pVCpu->hwaccm.s.fASIDState != pCpu->fASIDState)
+        || pVCpu->hwaccm.s.cTLBFlushes != pCpu->cTLBFlushes)
     {
         pVCpu->hwaccm.s.fForceTLBFlush = true;
@@ -2452 +2451 @@
         }
 
-        pVCpu->hwaccm.s.fASIDState     = pCpu->fASIDState;
         pVCpu->hwaccm.s.cTLBFlushes    = pCpu->cTLBFlushes;
         pVCpu->hwaccm.s.fForceTLBFlush = false;
@@ -2459 +2457 @@
     {
         AssertMsg(pVCpu->hwaccm.s.uCurrentASID && pCpu->uCurrentASID,
-                  ("hwaccm->uCurrentASID=%lu hwaccm->cTLBFlushes=%lu cpu->uCurrentASID=%lu cpu->cTLBFlushes=%lu"
-                   "hwaccm->fASIDState=%d cpu->fASIDState=%d\n",
+                  ("hwaccm->uCurrentASID=%lu hwaccm->cTLBFlushes=%lu cpu->uCurrentASID=%lu cpu->cTLBFlushes=%lu\n",
                    pVCpu->hwaccm.s.uCurrentASID, pVCpu->hwaccm.s.cTLBFlushes,
-                   pCpu->uCurrentASID, pCpu->cTLBFlushes, pVCpu->hwaccm.s.fASIDState, pCpu->fASIDState));
+                   pCpu->uCurrentASID, pCpu->cTLBFlushes));
 
         /** @todo We never set VMCPU_FF_TLB_SHOOTDOWN anywhere so this path should
@@ -2528 +2525 @@
      */
     if (   pVCpu->hwaccm.s.idLastCpu != pCpu->idCpu
-        || pVCpu->hwaccm.s.cTLBFlushes != pCpu->cTLBFlushes
-        || pVCpu->hwaccm.s.fASIDState != pCpu->fASIDState)
+        || pVCpu->hwaccm.s.cTLBFlushes != pCpu->cTLBFlushes)
     {
         pVCpu->hwaccm.s.fForceTLBFlush = true;
@@ -2542 +2538 @@
     pVCpu->hwaccm.s.idLastCpu   = pCpu->idCpu;
     pVCpu->hwaccm.s.cTLBFlushes = pCpu->cTLBFlushes;
-    pVCpu->hwaccm.s.fASIDState  = pCpu->fASIDState;
 
     if (pVCpu->hwaccm.s.fForceTLBFlush)
@@ -2595 +2590 @@
      */
     if (   pVCpu->hwaccm.s.idLastCpu != pCpu->idCpu
-        || pVCpu->hwaccm.s.cTLBFlushes != pCpu->cTLBFlushes
-        || pVCpu->hwaccm.s.fASIDState != pCpu->fASIDState)
+        || pVCpu->hwaccm.s.cTLBFlushes != pCpu->cTLBFlushes)
     {
         /* Force a TLB flush on VM entry. */
@@ -2625 +2619 @@
         pVCpu->hwaccm.s.cTLBFlushes    = pCpu->cTLBFlushes;
         pVCpu->hwaccm.s.uCurrentASID   = pCpu->uCurrentASID;
-        pVCpu->hwaccm.s.fASIDState     = pCpu->fASIDState;
         if (pCpu->fFlushASIDBeforeUse)
             hmR0VmxFlushVPID(pVM, pVCpu, pVM->hwaccm.s.vmx.enmFlushVPID, 0 /* GCPtr */);
@@ -2632 +2625 @@
     {
         AssertMsg(pVCpu->hwaccm.s.uCurrentASID && pCpu->uCurrentASID,
-                  ("hwaccm->uCurrentASID=%lu hwaccm->cTLBFlushes=%lu cpu->uCurrentASID=%lu cpu->cTLBFlushes=%lu"
-                   "hwaccm->fASIDState=%d cpu->fASIDState=%d\n",
+                  ("hwaccm->uCurrentASID=%lu hwaccm->cTLBFlushes=%lu cpu->uCurrentASID=%lu cpu->cTLBFlushes=%lu\n",
                    pVCpu->hwaccm.s.uCurrentASID, pVCpu->hwaccm.s.cTLBFlushes,
-                   pCpu->uCurrentASID, pCpu->cTLBFlushes, pVCpu->hwaccm.s.fASIDState, pCpu->fASIDState));
+                   pCpu->uCurrentASID, pCpu->cTLBFlushes));
 
         /** @todo We never set VMCPU_FF_TLB_SHOOTDOWN anywhere so this path should