Changeset 42392 in vbox
- Timestamp:
- Jul 25, 2012 1:36:28 PM (12 years ago)
- Location:
- trunk/src/VBox/Devices/PC/BIOS
- Files:
-
- 4 edited
-
orgs.asm (modified) (1 diff)
-
pcibio32.asm (modified) (2 diffs)
-
pcibios.c (modified) (3 diffs)
-
pcibios.inc (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/PC/BIOS/orgs.asm
r42332 r42392 61 61 BIOS_COPYRIGHT equ 'Oracle VM VirtualBox BIOS' 62 62 63 ;BX_PCIBIOS equ 1 ; defined in pcicfg.inc64 63 BX_ROMBIOS32 equ 0 65 64 BX_CALL_INT15_4F equ 1 -
trunk/src/VBox/Devices/PC/BIOS/pcibio32.asm
r42332 r42392 1 1 ;; 2 ;; Copyright (C) 2006-201 1Oracle Corporation2 ;; Copyright (C) 2006-2012 Oracle Corporation 3 3 ;; 4 4 ;; This file is part of VirtualBox Open Source Edition (OSE), as … … 9 9 ;; VirtualBox OSE distribution. VirtualBox OSE is distributed in the 10 10 ;; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind. 11 ;; 11 12 ;; -------------------------------------------------------------------- 12 ;;13 ;; This code is based on:14 ;;15 ;; ROM BIOS for use with Bochs/Plex86/QEMU emulation environment16 ;;17 ;; Copyright (C) 2002 MandrakeSoft S.A.18 ;;19 ;; MandrakeSoft S.A.20 ;; 43, rue d'Aboukir21 ;; 75002 Paris - France22 ;; http://www.linux-mandrake.com/23 ;; http://www.mandrakesoft.com/24 ;;25 ;; This library is free software; you can redistribute it and/or26 ;; modify it under the terms of the GNU Lesser General Public27 ;; License as published by the Free Software Foundation; either28 ;; version 2 of the License, or (at your option) any later version.29 ;;30 ;; This library is distributed in the hope that it will be useful,31 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of32 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU33 ;; Lesser General Public License for more details.34 ;;35 ;; You should have received a copy of the GNU Lesser General Public36 ;; License along with this library; if not, write to the Free Software37 ;; Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA38 ;;39 ;;40 13 41 include pcicfg.inc42 14 43 if BX_PCIBIOS 15 ; BIOS32 service directory and 32-bit PCI BIOS entry point 16 17 ; Public symbols for debugging only 18 public pcibios32_entry 19 public bios32_service 20 21 ; The BIOS32 service directory header must be located in the E0000h-FFFF0h 22 ; range on a paragraph boundary. Note that the actual 32-bit code need not 23 ; be located below 1MB at all. 24 25 _DATA segment public 'DATA' 26 27 align 16 28 bios32_directory: 29 db '_32_' ; ASCII signature 30 dw bios32_service ; Entry point address... 31 dw 000Fh ; ...hardcoded to F000 segment 32 db 0 ; Revision 33 db 1 ; Length in paras - must be 1 34 db 0 ; Checksum calculated later 35 db 5 dup(0) ; Unused, must be zero 36 37 _DATA ends 44 38 45 39 .386 46 40 41 extrn _pci32_function:near 42 47 43 BIOS32 segment public 'CODE' use32 48 44 49 public pcibios_protected 45 ; 46 ; The BIOS32 Service Directory - must be less than 4K in size (easy!). 47 ; 48 bios32_service proc far 50 49 51 align 16 52 bios32_structure: 53 db '_32_' ; signature 54 dw bios32_entry_point, 0Fh ;; 32 bit physical address 55 db 0 ; revision level 56 db 1 ; length in paragraphs 57 db 0 ; checksum (updated externally) 58 db 0,0,0,0,0 ; reserved 50 pushfd 59 51 60 align 16 61 bios32_entry_point: 62 pushfd 63 cmp eax, 'ICP$' ; 0x49435024 "$PCI" 64 jne unknown_service 52 cmp bl, 0 ; Only function 0 supported 53 jnz b32_bad_func 65 54 66 ifdef PCI_FIXED_HOST_BRIDGE_1 67 mov eax, 80000000h 68 mov dx, PCI_CFG1 69 out dx, eax 70 mov dx, PCI_CFG2 71 in eax, dx 72 cmp eax, PCI_FIXED_HOST_BRIDGE_1 73 je device_ok 74 endif 55 cmp eax, 'ICP$' ; "$PCI" 56 mov al, 80h ; Unknown service 57 jnz b32_done 75 58 76 ifdef PCI_FIXED_HOST_BRIDGE_2 77 ; 18h << 11 78 mov eax, 8000c000h 79 mov dx, PCI_CFG1 80 out dx, eax 81 mov dx, PCI_CFG2 82 in eax, dx 83 cmp eax, PCI_FIXED_HOST_BRIDGE_2 84 je device_ok 85 ; 19h << 11 86 mov eax, 8000c800h 87 mov dx, PCI_CFG1 88 out dx, eax 89 mov dx, PCI_CFG2 90 in eax, dx 91 cmp eax, PCI_FIXED_HOST_BRIDGE_2 92 je device_ok 93 endif 94 jmp unknown_service 95 device_ok: 96 mov ebx, 000f0000h 97 mov ecx, 0 98 mov edx, pcibios_protected 99 xor al, al 100 jmp bios32_end 101 102 unknown_service: 103 mov al, 80h 104 bios32_end: 59 mov ebx, 000f0000h ; Base address (linear) 60 mov ecx, 0f000h ; Length of service 61 mov edx, pcibios32_entry ; Entry point offset from base 62 xor al, al ; Indicate success 63 b32_done: 105 64 popfd 106 65 retf 107 66 108 align 16 109 pcibios_protected: 110 if 1 111 ;; The old implementation of pcibios_protected will eventually go, 112 ;; replaced by C code. 113 else 67 b32_bad_func: 68 mov al, 81h ; Unsupported function 69 jmp b32_done 114 70 115 extrn _pci32_function:near 71 bios32_service endp 116 72 117 pushfd 118 push es 73 ; 74 ; The 32-bit PCI BIOS entry point - simply calls into C code. 75 ; 76 pcibios32_entry proc far 77 78 pushfd ; Preserve flags 79 cld ; Just in case... 80 81 push es ; Call into C implementation 119 82 pushad 120 83 call _pci32_function 121 84 popad 122 85 pop es 123 popfd124 retf125 endif126 pushfd127 cli128 push esi129 push edi130 cmp al, 1 ; installation check131 jne pci_pro_f02132 86 133 mov bx, 0210h 134 mov cx, 0 135 mov edx, ' ICP' ; 0x20494350 "PCI " 136 mov al, 1 137 jmp pci_pro_ok 138 139 pci_pro_f02: ;; find pci device 140 cmp al, 2 141 jne pci_pro_f03 142 143 shl ecx, 16 144 mov cx, dx 145 xor ebx, ebx 146 mov di, 0 147 pci_pro_devloop: 148 call pci_pro_select_reg 149 mov dx, PCI_CFG2 150 in eax, dx 151 cmp eax, ecx 152 jne pci_pro_nextdev 153 154 cmp si, 0 155 je pci_pro_ok 156 157 dec si 158 pci_pro_nextdev: 159 inc ebx 160 cmp ebx, MAX_BUSDEVFN 161 jne pci_pro_devloop 162 163 mov ah, 86h 164 jmp pci_pro_fail 165 166 pci_pro_f03: ;; find class code 167 cmp al, 3 168 jne pci_pro_f08 169 170 xor ebx, ebx 171 mov di, 8 172 pci_pro_devloop2: 173 call pci_pro_select_reg 174 mov dx, PCI_CFG2 175 in eax, dx 176 shr eax, 8 177 cmp eax, ecx 178 jne pci_pro_nextdev2 179 180 cmp si, 0 181 je pci_pro_ok 182 183 dec si 184 pci_pro_nextdev2: 185 inc ebx 186 cmp ebx, MAX_BUSDEVFN 187 jne pci_pro_devloop2 188 189 mov ah, 86h 190 jmp pci_pro_fail 191 192 pci_pro_f08: ;; read configuration byte 193 cmp al, 8 194 jne pci_pro_f09 195 196 call pci_pro_select_reg 197 push edx 198 mov dx, di 199 and dx, 3 200 add dx, PCI_CFG2 201 in al, dx 202 pop edx 203 mov cl, al 204 jmp pci_pro_ok 205 206 pci_pro_f09: ;; read configuration word 207 cmp al, 9 208 jne pci_pro_f0a 209 210 call pci_pro_select_reg 211 push edx 212 mov dx, di 213 and dx, 2 214 add dx, PCI_CFG2 215 in ax, dx 216 pop edx 217 mov cx, ax 218 jmp pci_pro_ok 219 220 pci_pro_f0a: ;; read configuration dword 221 cmp al, 0Ah 222 jne pci_pro_f0b 223 224 call pci_pro_select_reg 225 push edx 226 mov dx, PCI_CFG2 227 in eax, dx 228 pop edx 229 mov ecx, eax 230 jmp pci_pro_ok 231 232 pci_pro_f0b: ;; write configuration byte 233 cmp al, 0Bh 234 jne pci_pro_f0c 235 236 call pci_pro_select_reg 237 push edx 238 mov dx, di 239 and dx, 3 240 add dx, PCI_CFG2 241 mov al, cl 242 out dx, al 243 pop edx 244 jmp pci_pro_ok 245 246 pci_pro_f0c: ;; write configuration word 247 cmp al, 0Ch 248 jne pci_pro_f0d 249 250 call pci_pro_select_reg 251 push edx 252 mov dx, di 253 and dx, 2 254 add dx, PCI_CFG2 255 mov ax, cx 256 out dx, ax 257 pop edx 258 jmp pci_pro_ok 259 260 pci_pro_f0d: ;; write configuration dword 261 cmp al, 0Dh 262 jne pci_pro_unknown 263 call pci_pro_select_reg 264 push edx 265 mov dx, PCI_CFG2 266 mov eax, ecx 267 out dx, eax 268 pop edx 269 jmp pci_pro_ok 270 271 pci_pro_unknown: 272 mov ah, 81h 273 pci_pro_fail: 274 pop edi 275 pop esi 276 popfd 277 stc 87 popfd ; Restore flags and return 278 88 retf 279 89 280 pci_pro_ok: 281 xor ah, ah 282 pop edi 283 pop esi 284 popfd 285 clc 286 retf 90 pcibios32_entry endp 287 91 288 pci_pro_select_reg:289 push edx290 mov eax, 800000h291 mov ax, bx292 shl eax, 8293 and di, 0FFh294 or ax, di295 and al, 0FCh296 mov dx, PCI_CFG1297 out dx, eax298 pop edx299 ret300 92 301 93 BIOS32 ends 302 94 303 endif ; BX_PCIBIOS304 305 95 end -
trunk/src/VBox/Devices/PC/BIOS/pcibios.c
r42332 r42392 21 21 #include "inlines.h" 22 22 23 //#define DEBUG_PCI 1 //@todo!24 23 #if DEBUG_PCI 25 24 # define BX_DEBUG_PCI(...) BX_DEBUG(__VA_ARGS__) … … 280 279 data >>= 8; 281 280 281 #if 0 282 282 BX_DEBUG_PCI("PCI: Data is %08lX @ %02X:%%02X:%01X\n", data, 283 283 bus_dev_fn >> 8, bus_dev_fn >> 3 & 31, bus_dev_fn & 7); 284 #endif 284 285 285 286 if (data == search_item) … … 386 387 } else { 387 388 rep_movsb(route_buf->buf_ptr, pci_routing_table, pci_routing_table_size); 389 /* IRQs 9 and 11 are PCI only. */ 390 BX = (1 << 9) | (1 << 11); 388 391 } 389 392 break; -
trunk/src/VBox/Devices/PC/BIOS/pcibios.inc
r42332 r42392 42 42 43 43 if BX_PCIBIOS 44 45 extrn pcibios_protected:near ; in a 32-bit segment46 44 47 45 ifdef DEBUG
Note:
See TracChangeset
for help on using the changeset viewer.
