Changeset 42487 in vbox for trunk/src/VBox/VMM/VMMAll
- Timestamp:
- Jul 31, 2012 4:23:27 PM (12 years ago)
- Location:
- trunk/src/VBox/VMM/VMMAll
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r42484 r42487 1078 1078 { \ 1079 1079 VBOXSTRICTRC rcStrict2 = iemOpcodeGetNextS8SxU16(pIemCpu, (a_pu16)); \ 1080 if (rcStrict2 != VINF_SUCCESS) \ 1081 return rcStrict2; \ 1082 } while (0) 1083 1084 1085 /** 1086 * Deals with the problematic cases that iemOpcodeGetNextS8SxU32 doesn't like. 1087 * 1088 * @returns Strict VBox status code. 1089 * @param pIemCpu The IEM state. 1090 * @param pu32 Where to return the opcode dword. 1091 */ 1092 DECL_NO_INLINE(static, VBOXSTRICTRC) iemOpcodeGetNextS8SxU32Slow(PIEMCPU pIemCpu, uint32_t *pu32) 1093 { 1094 uint8_t u8; 1095 VBOXSTRICTRC rcStrict = iemOpcodeGetNextU8Slow(pIemCpu, &u8); 1096 if (rcStrict == VINF_SUCCESS) 1097 *pu32 = (int8_t)u8; 1098 return rcStrict; 1099 } 1100 1101 1102 /** 1103 * Fetches the next signed byte from the opcode stream, extending it to 1104 * unsigned 32-bit. 1105 * 1106 * @returns Strict VBox status code. 1107 * @param pIemCpu The IEM state. 1108 * @param pu32 Where to return the unsigned dword. 1109 */ 1110 DECLINLINE(VBOXSTRICTRC) iemOpcodeGetNextS8SxU32(PIEMCPU pIemCpu, uint32_t *pu32) 1111 { 1112 uint8_t const offOpcode = pIemCpu->offOpcode; 1113 if (RT_UNLIKELY(offOpcode >= pIemCpu->cbOpcode)) 1114 return iemOpcodeGetNextS8SxU32Slow(pIemCpu, pu32); 1115 1116 *pu32 = (int8_t)pIemCpu->abOpcode[offOpcode]; 1117 pIemCpu->offOpcode = offOpcode + 1; 1118 return VINF_SUCCESS; 1119 } 1120 1121 1122 /** 1123 * Fetches the next signed byte from the opcode stream and sign-extending it to 1124 * a word, returning automatically on failure. 1125 * 1126 * @param pu32 Where to return the word. 1127 * @remark Implicitly references pIemCpu. 1128 */ 1129 #define IEM_OPCODE_GET_NEXT_S8_SX_U32(a_pu32) \ 1130 do \ 1131 { \ 1132 VBOXSTRICTRC rcStrict2 = iemOpcodeGetNextS8SxU32(pIemCpu, (a_pu32)); \ 1133 if (rcStrict2 != VINF_SUCCESS) \ 1134 return rcStrict2; \ 1135 } while (0) 1136 1137 1138 /** 1139 * Deals with the problematic cases that iemOpcodeGetNextS8SxU64 doesn't like. 1140 * 1141 * @returns Strict VBox status code. 1142 * @param pIemCpu The IEM state. 1143 * @param pu64 Where to return the opcode qword. 1144 */ 1145 DECL_NO_INLINE(static, VBOXSTRICTRC) iemOpcodeGetNextS8SxU64Slow(PIEMCPU pIemCpu, uint64_t *pu64) 1146 { 1147 uint8_t u8; 1148 VBOXSTRICTRC rcStrict = iemOpcodeGetNextU8Slow(pIemCpu, &u8); 1149 if (rcStrict == VINF_SUCCESS) 1150 *pu64 = (int8_t)u8; 1151 return rcStrict; 1152 } 1153 1154 1155 /** 1156 * Fetches the next signed byte from the opcode stream, extending it to 1157 * unsigned 64-bit. 1158 * 1159 * @returns Strict VBox status code. 1160 * @param pIemCpu The IEM state. 1161 * @param pu64 Where to return the unsigned qword. 1162 */ 1163 DECLINLINE(VBOXSTRICTRC) iemOpcodeGetNextS8SxU64(PIEMCPU pIemCpu, uint64_t *pu64) 1164 { 1165 uint8_t const offOpcode = pIemCpu->offOpcode; 1166 if (RT_UNLIKELY(offOpcode >= pIemCpu->cbOpcode)) 1167 return iemOpcodeGetNextS8SxU64Slow(pIemCpu, pu64); 1168 1169 *pu64 = (int8_t)pIemCpu->abOpcode[offOpcode]; 1170 pIemCpu->offOpcode = offOpcode + 1; 1171 return VINF_SUCCESS; 1172 } 1173 1174 1175 /** 1176 * Fetches the next signed byte from the opcode stream and sign-extending it to 1177 * a word, returning automatically on failure. 1178 * 1179 * @param pu64 Where to return the word. 1180 * @remark Implicitly references pIemCpu. 1181 */ 1182 #define IEM_OPCODE_GET_NEXT_S8_SX_U64(a_pu64) \ 1183 do \ 1184 { \ 1185 VBOXSTRICTRC rcStrict2 = iemOpcodeGetNextS8SxU64(pIemCpu, (a_pu64)); \ 1080 1186 if (rcStrict2 != VINF_SUCCESS) \ 1081 1187 return rcStrict2; \ -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h
r42483 r42487 6494 6494 case IEMMODE_16BIT: 6495 6495 { 6496 uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);6497 IEMOP_HLP_NO_LOCK_PREFIX();6498 6496 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 6499 6497 { 6500 6498 /* register operand */ 6499 uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm); 6500 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6501 6501 6502 IEM_MC_BEGIN(3, 1); 6502 6503 IEM_MC_ARG(uint16_t *, pu16Dst, 0); … … 6519 6520 IEM_MC_BEGIN(3, 2); 6520 6521 IEM_MC_ARG(uint16_t *, pu16Dst, 0); 6521 IEM_MC_ARG _CONST(uint16_t, u16Src,/*=*/ u16Imm,1);6522 IEM_MC_ARG(uint16_t, u16Src, 1); 6522 6523 IEM_MC_ARG(uint32_t *, pEFlags, 2); 6523 6524 IEM_MC_LOCAL(uint16_t, u16Tmp); … … 6525 6526 6526 6527 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm); 6528 uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm); 6529 IEM_MC_ASSIGN(u16Src, u16Imm); 6530 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6527 6531 IEM_MC_FETCH_MEM_U16(u16Tmp, pIemCpu->iEffSeg, GCPtrEffDst); 6528 6532 IEM_MC_REF_LOCAL(pu16Dst, u16Tmp); … … 6539 6543 case IEMMODE_32BIT: 6540 6544 { 6541 uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm);6542 IEMOP_HLP_NO_LOCK_PREFIX();6543 6545 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 6544 6546 { 6545 6547 /* register operand */ 6548 uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm); 6549 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6550 6546 6551 IEM_MC_BEGIN(3, 1); 6547 6552 IEM_MC_ARG(uint32_t *, pu32Dst, 0); … … 6564 6569 IEM_MC_BEGIN(3, 2); 6565 6570 IEM_MC_ARG(uint32_t *, pu32Dst, 0); 6566 IEM_MC_ARG _CONST(uint32_t, u32Src,/*=*/ u32Imm,1);6571 IEM_MC_ARG(uint32_t, u32Src, 1); 6567 6572 IEM_MC_ARG(uint32_t *, pEFlags, 2); 6568 6573 IEM_MC_LOCAL(uint32_t, u32Tmp); … … 6570 6575 6571 6576 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm); 6577 uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm); 6578 IEM_MC_ASSIGN(u32Src, u32Imm); 6579 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6572 6580 IEM_MC_FETCH_MEM_U32(u32Tmp, pIemCpu->iEffSeg, GCPtrEffDst); 6573 6581 IEM_MC_REF_LOCAL(pu32Dst, u32Tmp); … … 6584 6592 case IEMMODE_64BIT: 6585 6593 { 6586 uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);6587 IEMOP_HLP_NO_LOCK_PREFIX();6588 6594 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 6589 6595 { 6590 6596 /* register operand */ 6597 uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm); 6598 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6599 6591 6600 IEM_MC_BEGIN(3, 1); 6592 6601 IEM_MC_ARG(uint64_t *, pu64Dst, 0); … … 6609 6618 IEM_MC_BEGIN(3, 2); 6610 6619 IEM_MC_ARG(uint64_t *, pu64Dst, 0); 6611 IEM_MC_ARG _CONST(uint64_t, u64Src,/*=*/ u64Imm,1);6620 IEM_MC_ARG(uint64_t, u64Src, 1); 6612 6621 IEM_MC_ARG(uint32_t *, pEFlags, 2); 6613 6622 IEM_MC_LOCAL(uint64_t, u64Tmp); … … 6615 6624 6616 6625 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm); 6626 uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm); 6627 IEM_MC_ASSIGN(u64Src, u64Imm); 6628 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6617 6629 IEM_MC_FETCH_MEM_U64(u64Tmp, pIemCpu->iEffSeg, GCPtrEffDst); 6618 6630 IEM_MC_REF_LOCAL(pu64Dst, u64Tmp); … … 6662 6674 { 6663 6675 IEMOP_MNEMONIC("imul Gv,Ev,Ib"); /* Gv = Ev * Iz; */ 6664 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 6665 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 6666 IEMOP_HLP_NO_LOCK_PREFIX(); 6676 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 6667 6677 IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF); 6668 6678 … … 6673 6683 { 6674 6684 /* register operand */ 6685 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 6686 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6687 6675 6688 IEM_MC_BEGIN(3, 1); 6676 6689 IEM_MC_ARG(uint16_t *, pu16Dst, 0); … … 6693 6706 IEM_MC_BEGIN(3, 2); 6694 6707 IEM_MC_ARG(uint16_t *, pu16Dst, 0); 6695 IEM_MC_ARG _CONST(uint16_t, u16Src,/*=*/ (int8_t)u8Imm,1);6708 IEM_MC_ARG(uint16_t, u16Src, 1); 6696 6709 IEM_MC_ARG(uint32_t *, pEFlags, 2); 6697 6710 IEM_MC_LOCAL(uint16_t, u16Tmp); … … 6699 6712 6700 6713 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm); 6714 uint16_t u16Imm; IEM_OPCODE_GET_NEXT_S8_SX_U16(&u16Imm); 6715 IEM_MC_ASSIGN(u16Src, u16Imm); 6716 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6701 6717 IEM_MC_FETCH_MEM_U16(u16Tmp, pIemCpu->iEffSeg, GCPtrEffDst); 6702 6718 IEM_MC_REF_LOCAL(pu16Dst, u16Tmp); … … 6714 6730 { 6715 6731 /* register operand */ 6732 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 6733 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6734 6716 6735 IEM_MC_BEGIN(3, 1); 6717 6736 IEM_MC_ARG(uint32_t *, pu32Dst, 0); … … 6734 6753 IEM_MC_BEGIN(3, 2); 6735 6754 IEM_MC_ARG(uint32_t *, pu32Dst, 0); 6736 IEM_MC_ARG _CONST(uint32_t, u32Src,/*=*/ (int8_t)u8Imm,1);6755 IEM_MC_ARG(uint32_t, u32Src, 1); 6737 6756 IEM_MC_ARG(uint32_t *, pEFlags, 2); 6738 6757 IEM_MC_LOCAL(uint32_t, u32Tmp); … … 6740 6759 6741 6760 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm); 6761 uint32_t u32Imm; IEM_OPCODE_GET_NEXT_S8_SX_U32(&u32Imm); 6762 IEM_MC_ASSIGN(u32Src, u32Imm); 6763 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6742 6764 IEM_MC_FETCH_MEM_U32(u32Tmp, pIemCpu->iEffSeg, GCPtrEffDst); 6743 6765 IEM_MC_REF_LOCAL(pu32Dst, u32Tmp); … … 6755 6777 { 6756 6778 /* register operand */ 6779 uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm); 6780 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6781 6757 6782 IEM_MC_BEGIN(3, 1); 6758 6783 IEM_MC_ARG(uint64_t *, pu64Dst, 0); … … 6775 6800 IEM_MC_BEGIN(3, 2); 6776 6801 IEM_MC_ARG(uint64_t *, pu64Dst, 0); 6777 IEM_MC_ARG _CONST(uint64_t, u64Src,/*=*/ (int8_t)u8Imm,1);6802 IEM_MC_ARG(uint64_t, u64Src, 1); 6778 6803 IEM_MC_ARG(uint32_t *, pEFlags, 2); 6779 6804 IEM_MC_LOCAL(uint64_t, u64Tmp); … … 6781 6806 6782 6807 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm); 6808 uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S8_SX_U64(&u64Imm); 6809 IEM_MC_ASSIGN(u64Src, u64Imm); 6810 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 6783 6811 IEM_MC_FETCH_MEM_U64(u64Tmp, pIemCpu->iEffSeg, GCPtrEffDst); 6784 6812 IEM_MC_REF_LOCAL(pu64Dst, u64Tmp);
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