VirtualBox

Changeset 42601 in vbox for trunk/src/recompiler


Ignore:
Timestamp:
Aug 5, 2012 4:26:25 PM (13 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
79786
Message:

REM: Initial changes to make it work (seemingly) with MinGW-w64.

Location:
trunk/src/recompiler
Files:
22 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/recompiler/Makefile.kmk

    r42595 r42601  
    6464#VBoxRemPrimary_DEFS           += REM_PHYS_ADDR_IN_TLB
    6565#VBoxRemPrimary_DEFS           += DEBUG_ALL_LOGGING DEBUG_DISAS DEBUG_PCALL CONFIG_DEBUG_EXEC DEBUG_FLUSH DEBUG_IOPORT DEBUG_SIGNAL DEBUG_TLB_CHECK DEBUG_TB_INVALIDATE DEBUG_TLB  # Enables huge amounts of debug logging.
     66#VBoxRemPrimary_DEFS           += DEBUG_DISAS DEBUG_PCALL CONFIG_DEBUG_EXEC DEBUG_FLUSH DEBUG_IOPORT DEBUG_SIGNAL DEBUG_TLB_CHECK DEBUG_TB_INVALIDATE DEBUG_TLB  # Enables huge amounts of debug logging.
    6667ifdef IEM_VERIFICATION_MODE
    6768 VBoxRemPrimary_DEFS          += IEM_VERIFICATION_MODE
     
    110111VBoxRemPrimary_SOURCES.win.x86 = $(VBoxREMImp_0_OUTDIR)/VBoxREMWin.def
    111112ifdef VBOX_USE_MINGWW64
    112 VBoxRemPrimary_SOURCES.win.amd64 = $(VBoxREMImp_0_OUTDIR)/VBoxREMWin.def
     113 if 0 # exporting all helps when windbg pops up on crashes
     114  VBoxRemPrimary_SOURCES.win.amd64 = $(VBoxREMImp_0_OUTDIR)/VBoxREMWin.def
     115 else
     116  VBoxRemPrimary_LDFLAGS.win.amd64 = --export-all
     117 endif
    113118endif
    114119
  • trunk/src/recompiler/VBoxRecompiler.c

    r42420 r42601  
    5656
    5757/* Don't wanna include everything. */
    58 extern void cpu_exec_init_all(unsigned long tb_size);
     58extern void cpu_exec_init_all(uintptr_t tb_size);
    5959extern void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
    6060extern void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
     
    6666
    6767#ifdef VBOX_STRICT
    68 unsigned long get_phys_page_offset(target_ulong addr);
     68ram_addr_t get_phys_page_offset(target_ulong addr);
    6969#endif
    7070
     
    266266    AssertReleaseMsg(sizeof(pVM->rem.s.Env) <= REM_ENV_SIZE, ("%#x == %#x\n", sizeof(pVM->rem.s.Env), REM_ENV_SIZE));
    267267    AssertReleaseMsg(!(RT_OFFSETOF(VM, rem) & 31), ("off=%#x\n", RT_OFFSETOF(VM, rem)));
     268#if 0 /* just an annoyance at the moment. */
    268269#if defined(DEBUG) && !defined(RT_OS_SOLARIS) && !defined(RT_OS_FREEBSD) /// @todo fix the solaris and freebsd math stuff.
    269270    Assert(!testmath());
     271#endif
    270272#endif
    271273
     
    34463448{
    34473449#ifdef VBOX_STRICT
    3448     unsigned long off;
     3450    ram_addr_t off;
    34493451    REMR3ReplayHandlerNotifications(pVM);
    34503452
  • trunk/src/recompiler/cache-utils.h

    r36170 r42601  
    1313
    1414/* mildly adjusted code from tcg-dyngen.c */
    15 static inline void flush_icache_range(unsigned long start, unsigned long stop)
     15static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
    1616{
    1717    unsigned long p, start1, stop1;
  • trunk/src/recompiler/cpu-all.h

    r37702 r42601  
    774774 */
    775775#if defined(CONFIG_USE_GUEST_BASE)
    776 extern unsigned long guest_base;
     776extern uintptr_t guest_base;
    777777extern int have_guest_base;
    778 extern unsigned long reserved_va;
     778extern uintptr_t reserved_va;
    779779#define GUEST_BASE guest_base
    780780#define RESERVED_VA reserved_va
     
    785785
    786786/* All direct uses of g2h and h2g need to go away for usermode softmmu.  */
    787 #define g2h(x) ((void *)((unsigned long)(x) + GUEST_BASE))
     787#define g2h(x) ((void *)((uintptr_t)(x) + GUEST_BASE))
    788788
    789789#if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS
     
    791791#else
    792792#define h2g_valid(x) ({ \
    793     unsigned long __guest = (unsigned long)(x) - GUEST_BASE; \
     793    uintptr_t __guest = (uintptr_t)(x) - GUEST_BASE; \
    794794    __guest < (1ul << TARGET_VIRT_ADDR_SPACE_BITS); \
    795795})
     
    797797
    798798#define h2g(x) ({ \
    799     unsigned long __ret = (unsigned long)(x) - GUEST_BASE; \
     799    uintptr_t __ret = (uintptr_t)(x) - GUEST_BASE; \
    800800    /* Check if given address fits target address space */ \
    801801    assert(h2g_valid(x)); \
     
    809809/* NOTE: we use double casts if pointers and target_ulong have
    810810   different sizes */
    811 #define saddr(x) (uint8_t *)(long)(x)
    812 #define laddr(x) (uint8_t *)(long)(x)
     811#define saddr(x) (uint8_t *)(intptr_t)(x)
     812#define laddr(x) (uint8_t *)(intptr_t)(x)
    813813#endif
    814814
     
    877877#define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK)
    878878
    879 /* ??? These should be the larger of unsigned long and target_ulong.  */
    880 extern unsigned long qemu_real_host_page_size;
    881 extern unsigned long qemu_host_page_bits;
    882 extern unsigned long qemu_host_page_size;
    883 extern unsigned long qemu_host_page_mask;
     879/* ??? These should be the larger of uintptr_t and target_ulong.  */
     880extern size_t qemu_real_host_page_size;
     881extern size_t qemu_host_page_bits;
     882extern size_t qemu_host_page_size;
     883extern uintptr_t qemu_host_page_mask;
    884884
    885885#define HOST_PAGE_ALIGN(addr) (((addr) + qemu_host_page_size - 1) & qemu_host_page_mask)
     
    903903
    904904typedef int (*walk_memory_regions_fn)(void *, abi_ulong,
    905                                       abi_ulong, unsigned long);
     905                                      abi_ulong, uintptr_t);
    906906int walk_memory_regions(void *, walk_memory_regions_fn);
    907907
  • trunk/src/recompiler/cpu-common.h

    r37689 r42601  
    2222
    2323/* address in the RAM (different from a physical address) */
    24 typedef unsigned long ram_addr_t;
     24typedef uintptr_t ram_addr_t;
    2525
    2626/* memory API */
  • trunk/src/recompiler/cpu-defs.h

    r37689 r42601  
    115115    /* Addend to virtual address to get host address.  IO accesses
    116116       use the corresponding iotlb value.  */
    117     unsigned long addend;
     117    uintptr_t addend;
    118118    /* padding to get a power of two size */
    119119    uint8_t dummy[(1 << CPU_TLB_ENTRY_BITS) -
    120120                  (sizeof(target_ulong) * 3 +
    121                    ((-sizeof(target_ulong) * 3) & (sizeof(unsigned long) - 1)) +
    122                    sizeof(unsigned long))];
     121                   ((-sizeof(target_ulong) * 3) & (sizeof(uintptr_t) - 1)) +
     122                   sizeof(uintptr_t))];
    123123} CPUTLBEntry;
    124124
     
    175175       helpers, we store some rarely used information in the CPU        \
    176176       context) */                                                      \
    177     unsigned long mem_io_pc; /* host pc at which the memory was         \
     177    uintptr_t mem_io_pc; /* host pc at which the memory was             \
    178178                                accessed */                             \
    179179    target_ulong mem_io_vaddr; /* target virtual addr at which the      \
  • trunk/src/recompiler/cpu-exec.c

    r37702 r42601  
    111111static void cpu_exec_nocache(int max_cycles, TranslationBlock *orig_tb)
    112112{
    113     unsigned long next_tb;
     113    uintptr_t next_tb;
    114114    TranslationBlock *tb;
    115115
     
    237237    TranslationBlock *tb;
    238238    uint8_t *tc_ptr;
    239 #ifndef VBOX
    240239    uintptr_t next_tb;
    241 #else  /* VBOX */
    242     unsigned long next_tb;
    243 #endif /* VBOX */
    244240
    245241# ifndef VBOX
     
    739735                }
    740736#ifdef CONFIG_DEBUG_EXEC
    741                 qemu_log_mask(CPU_LOG_EXEC, "Trace 0x%08lx [" TARGET_FMT_lx "] %s\n",
    742                              (long)tb->tc_ptr, tb->pc,
     737                qemu_log_mask(CPU_LOG_EXEC, "Trace %p [" TARGET_FMT_lx "] %s\n",
     738                             (void *)tb->tc_ptr, tb->pc,
    743739                             lookup_symbol(tb->pc));
    744740#endif
     
    775771#define env cpu_single_env
    776772#endif
     773                    Log5(("REM: tb=%p tc_ptr=%p %04x:%08RGv\n", tb, tc_ptr, env->segs[R_CS].selector, (RTGCPTR)env->eip));
    777774#if defined(VBOX) && defined(GCC_WITH_BUGGY_REGPARM)
    778775                    tcg_qemu_tb_exec(tc_ptr, next_tb);
     
    780777                    next_tb = tcg_qemu_tb_exec(tc_ptr);
    781778#endif
     779                    if (next_tb)
     780                        Log5(("REM: next_tb=%p %04x:%08RGv\n", next_tb, env->segs[R_CS].selector, (RTGCPTR)env->eip));
    782781#ifdef VBOX
    783782                    RAWEx_ProfileStop(env, STATS_QEMU_RUN_EMULATED_CODE);
     
    786785                        /* Instruction counter expired.  */
    787786                        int insns_left;
    788                         tb = (TranslationBlock *)(long)(next_tb & ~3);
     787                        tb = (TranslationBlock *)(uintptr_t)(next_tb & ~3);
    789788                        /* Restore PC.  */
    790789                        cpu_pc_from_tb(env, tb);
     
    938937   write caused the exception and otherwise 0'. 'old_set' is the
    939938   signal set which should be restored */
    940 static inline int handle_cpu_signal(unsigned long pc, unsigned long address,
     939static inline int handle_cpu_signal(uintptr_t pc, uintptr_t address,
    941940                                    int is_write, sigset_t *old_set,
    942941                                    void *puc)
     
    10251024    struct ucontext *uc = puc;
    10261025#endif
    1027     unsigned long pc;
     1026    uintptr_t pc;
    10281027    int trapno;
    10291028
     
    10361035    pc = EIP_sig(uc);
    10371036    trapno = TRAP_sig(uc);
    1038     return handle_cpu_signal(pc, (unsigned long)info->si_addr,
     1037    return handle_cpu_signal(pc, (uintptr_t)info->si_addr,
    10391038                             trapno == 0xe ?
    10401039                             (ERROR_sig(uc) >> 1) & 1 : 0,
     
    10721071{
    10731072    siginfo_t *info = pinfo;
    1074     unsigned long pc;
     1073    uintptr_t pc;
    10751074#if defined(__NetBSD__) || defined (__FreeBSD__) || defined(__DragonFly__)
    10761075    ucontext_t *uc = puc;
     
    10821081
    10831082    pc = PC_sig(uc);
    1084     return handle_cpu_signal(pc, (unsigned long)info->si_addr,
     1083    return handle_cpu_signal(pc, (uintptr_t)info->si_addr,
    10851084                             TRAP_sig(uc) == 0xe ?
    10861085                             (ERROR_sig(uc) >> 1) & 1 : 0,
     
    11621161    struct ucontext *uc = puc;
    11631162#endif
    1164     unsigned long pc;
     1163    uintptr_t pc;
    11651164    int is_write;
    11661165
     
    11751174        is_write = 1;
    11761175#endif
    1177     return handle_cpu_signal(pc, (unsigned long)info->si_addr,
     1176    return handle_cpu_signal(pc, (uintptr_t)info->si_addr,
    11781177                             is_write, &uc->uc_sigmask, puc);
    11791178}
     
    12061205    }
    12071206
    1208     return handle_cpu_signal(pc, (unsigned long)info->si_addr,
     1207    return handle_cpu_signal(pc, (uintptr_t)info->si_addr,
    12091208                             is_write, &uc->uc_sigmask, puc);
    12101209}
     
    12211220    void *sigmask = (regs + 20);
    12221221    /* XXX: is there a standard glibc define ? */
    1223     unsigned long pc = regs[1];
     1222    uintptr_t pc = regs[1];
    12241223#else
    12251224#ifdef __linux__
    12261225    struct sigcontext *sc = puc;
    1227     unsigned long pc = sc->sigc_regs.tpc;
     1226    uintptr_t pc = sc->sigc_regs.tpc;
    12281227    void *sigmask = (void *)sc->sigc_mask;
    12291228#elif defined(__OpenBSD__)
    12301229    struct sigcontext *uc = puc;
    1231     unsigned long pc = uc->sc_pc;
    1232     void *sigmask = (void *)(long)uc->sc_mask;
     1230    uintptr_t pc = uc->sc_pc;
     1231    void *sigmask = (void *)(uintptr_t)uc->sc_mask;
    12331232#endif
    12341233#endif
     
    12621261      }
    12631262    }
    1264     return handle_cpu_signal(pc, (unsigned long)info->si_addr,
     1263    return handle_cpu_signal(pc, (uintptr_t)info->si_addr,
    12651264                             is_write, sigmask, NULL);
    12661265}
     
    12731272    siginfo_t *info = pinfo;
    12741273    struct ucontext *uc = puc;
    1275     unsigned long pc;
     1274    uintptr_t pc;
    12761275    int is_write;
    12771276
     
    12831282    /* XXX: compute is_write */
    12841283    is_write = 0;
    1285     return handle_cpu_signal(pc, (unsigned long)info->si_addr,
     1284    return handle_cpu_signal(pc, (uintptr_t)info->si_addr,
    12861285                             is_write,
    12871286                             &uc->uc_sigmask, puc);
     
    12951294    siginfo_t *info = pinfo;
    12961295    struct ucontext *uc = puc;
    1297     unsigned long pc;
     1296    uintptr_t pc;
    12981297    int is_write;
    12991298
     
    13011300    /* XXX: compute is_write */
    13021301    is_write = 0;
    1303     return handle_cpu_signal(pc, (unsigned long)info->si_addr,
     1302    return handle_cpu_signal(pc, (uintptr_t)info->si_addr,
    13041303                             is_write,
    13051304                             &uc->uc_sigmask, puc);
     
    13171316    siginfo_t *info = pinfo;
    13181317    struct ucontext *uc = puc;
    1319     unsigned long ip;
     1318    uintptr_t ip;
    13201319    int is_write = 0;
    13211320
     
    13351334          break;
    13361335    }
    1337     return handle_cpu_signal(ip, (unsigned long)info->si_addr,
     1336    return handle_cpu_signal(ip, (uintptr_t)info->si_addr,
    13381337                             is_write,
    13391338                             (sigset_t *)&uc->uc_sigmask, puc);
     
    13471346    siginfo_t *info = pinfo;
    13481347    struct ucontext *uc = puc;
    1349     unsigned long pc;
     1348    uintptr_t pc;
    13501349    uint16_t *pinsn;
    13511350    int is_write = 0;
     
    13891388        break;
    13901389    }
    1391     return handle_cpu_signal(pc, (unsigned long)info->si_addr,
     1390    return handle_cpu_signal(pc, (uintptr_t)info->si_addr,
    13921391                             is_write, &uc->uc_sigmask, puc);
    13931392}
     
    14051404    /* XXX: compute is_write */
    14061405    is_write = 0;
    1407     return handle_cpu_signal(pc, (unsigned long)info->si_addr,
     1406    return handle_cpu_signal(pc, (uintptr_t)info->si_addr,
    14081407                             is_write, &uc->uc_sigmask, puc);
    14091408}
     
    14161415    struct siginfo *info = pinfo;
    14171416    struct ucontext *uc = puc;
    1418     unsigned long pc = uc->uc_mcontext.sc_iaoq[0];
     1417    uintptr_t pc = uc->uc_mcontext.sc_iaoq[0];
    14191418    uint32_t insn = *(uint32_t *)pc;
    14201419    int is_write = 0;
     
    14471446    }
    14481447
    1449     return handle_cpu_signal(pc, (unsigned long)info->si_addr,
     1448    return handle_cpu_signal(pc, (uintptr_t)info->si_addr,
    14501449                             is_write, &uc->uc_sigmask, puc);
    14511450}
  • trunk/src/recompiler/dyngen-exec.h

    r37689 r42601  
    120120   Subtracting one gets us the call instruction itself.  */
    121121#if defined(__s390__) && !defined(__s390x__)
    122 # define GETPC() ((void*)(((unsigned long)__builtin_return_address(0) & 0x7fffffffUL) - 1))
     122# define GETPC() ((void*)(((uintptr_t)__builtin_return_address(0) & 0x7fffffffUL) - 1))
    123123#elif defined(__arm__)
    124124/* Thumb return addresses have the low bit set, so we need to subtract two.
    125125   This is still safe in ARM mode because instructions are 4 bytes.  */
    126 # define GETPC() ((void *)((unsigned long)__builtin_return_address(0) - 2))
     126# define GETPC() ((void *)((uintptr_t)__builtin_return_address(0) - 2))
    127127#else
    128 # define GETPC() ((void *)((unsigned long)__builtin_return_address(0) - 1))
     128# define GETPC() ((void *)((uintptr_t)__builtin_return_address(0) - 1))
    129129#endif
    130130
  • trunk/src/recompiler/exec-all.h

    r41436 r42601  
    101101void gen_intermediate_code_pc(CPUState *env, struct TranslationBlock *tb);
    102102void gen_pc_load(CPUState *env, struct TranslationBlock *tb,
    103                  unsigned long searched_pc, int pc_pos, void *puc);
     103                 uintptr_t searched_pc, int pc_pos, void *puc);
    104104
    105105void cpu_gen_init(void);
     
    107107                 int *gen_code_size_ptr);
    108108int cpu_restore_state(struct TranslationBlock *tb,
    109                       CPUState *env, unsigned long searched_pc,
     109                      CPUState *env, uintptr_t searched_pc,
    110110                      void *puc);
    111111void cpu_resume_from_signal(CPUState *env1, void *puc);
     
    116116void cpu_exec_init(CPUState *env);
    117117void QEMU_NORETURN cpu_loop_exit(void);
    118 int page_unprotect(target_ulong address, unsigned long pc, void *puc);
     118int page_unprotect(target_ulong address, uintptr_t pc, void *puc);
    119119void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
    120120                                   int is_cpu_write_access);
     
    179179    uint16_t tb_jmp_offset[2]; /* offset of jump instruction */
    180180#else
    181     unsigned long tb_next[2]; /* address of jump generated code */
     181    uintptr_t tb_next[2]; /* address of jump generated code */
    182182#endif
    183183    /* list of TBs jumping to this one. This is a circular list using
     
    222222
    223223#if defined(_ARCH_PPC)
    224 extern void ppc_tb_set_jmp_target(unsigned long jmp_addr, unsigned long addr);
     224extern void ppc_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr);
    225225#define tb_set_jmp_target1 ppc_tb_set_jmp_target
    226226#elif defined(__i386__) || defined(__x86_64__)
    227 static inline void tb_set_jmp_target1(unsigned long jmp_addr, unsigned long addr)
     227static inline void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
    228228{
    229229    /* patch the branch destination */
     
    232232}
    233233#elif defined(__arm__)
    234 static inline void tb_set_jmp_target1(unsigned long jmp_addr, unsigned long addr)
     234static inline void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
    235235{
    236236#if QEMU_GNUC_PREREQ(4, 1)
     
    260260
    261261static inline void tb_set_jmp_target(TranslationBlock *tb,
    262                                      int n, unsigned long addr)
    263 {
    264     unsigned long offset;
     262                                     int n, uintptr_t addr)
     263{
     264    uintptr_t offset;
    265265
    266266    offset = tb->tb_jmp_offset[n];
    267     tb_set_jmp_target1((unsigned long)(tb->tc_ptr + offset), addr);
     267    tb_set_jmp_target1((uintptr_t)(tb->tc_ptr + offset), addr);
    268268}
    269269
     
    272272/* set the jump target */
    273273static inline void tb_set_jmp_target(TranslationBlock *tb,
    274                                      int n, unsigned long addr)
     274                                     int n, uintptr_t addr)
    275275{
    276276    tb->tb_next[n] = addr;
     
    285285    if (!tb->jmp_next[n]) {
    286286        /* patch the native jump address */
    287         tb_set_jmp_target(tb, n, (unsigned long)tb_next->tc_ptr);
     287        tb_set_jmp_target(tb, n, (uintptr_t)tb_next->tc_ptr);
    288288
    289289        /* add in TB jmp circular list */
    290290        tb->jmp_next[n] = tb_next->jmp_first;
    291         tb_next->jmp_first = (TranslationBlock *)((long)(tb) | (n));
     291        tb_next->jmp_first = (TranslationBlock *)((intptr_t)(tb) | (n));
    292292    }
    293293}
    294294
    295 TranslationBlock *tb_find_pc(unsigned long pc_ptr);
     295TranslationBlock *tb_find_pc(uintptr_t pc_ptr);
    296296
    297297#include "qemu-lock.h"
     
    378378    return addr + env1->phys_addends[mmu_idx][page_index];
    379379# else
    380     p = (void *)(unsigned long)addr
     380    p = (void *)(uintptr_t)addr
    381381        + env1->tlb_table[mmu_idx][page_index].addend;
    382382    return qemu_ram_addr_from_host(p);
  • trunk/src/recompiler/exec.c

    r37702 r42601  
    130130#endif /* VBOX */
    131131static uint8_t *code_gen_buffer;
    132 static unsigned long code_gen_buffer_size;
     132static size_t code_gen_buffer_size;
    133133/* threshold to flush the translated code buffer */
    134 static unsigned long code_gen_buffer_max_size;
     134static size_t code_gen_buffer_max_size;
    135135static uint8_t *code_gen_ptr;
    136136
     
    209209#define V_L1_SHIFT (L1_MAP_ADDR_SPACE_BITS - TARGET_PAGE_BITS - V_L1_BITS)
    210210
    211 unsigned long qemu_real_host_page_size;
    212 unsigned long qemu_host_page_bits;
    213 unsigned long qemu_host_page_size;
    214 unsigned long qemu_host_page_mask;
     211size_t qemu_real_host_page_size;
     212size_t qemu_host_page_bits;
     213size_t qemu_host_page_size;
     214uintptr_t qemu_host_page_mask;
    215215
    216216/* This is a multi-level map on the virtual address space.
     
    268268#ifndef VBOX
    269269#ifdef _WIN32
    270 static void map_exec(void *addr, long size)
     270static void map_exec(void *addr, size_t size)
    271271{
    272272    DWORD old_protect;
     
    276276}
    277277#else
    278 static void map_exec(void *addr, long size)
    279 {
    280     unsigned long start, end, page_size;
     278static void map_exec(void *addr, size_t size)
     279{
     280    uintptr_t start, end, page_size;
    281281
    282282    page_size = getpagesize();
    283     start = (unsigned long)addr;
     283    start = (uintptr_t)addr;
    284284    start &= ~(page_size - 1);
    285285
    286     end = (unsigned long)addr + size;
     286    end = (uintptr_t)addr + size;
    287287    end += page_size - 1;
    288288    end &= ~(page_size - 1);
     
    293293#endif
    294294#else /* VBOX */
    295 static void map_exec(void *addr, long size)
     295static void map_exec(void *addr, size_t size)
    296296{
    297297    RTMemProtect(addr, size,
     
    340340            mmap_lock();
    341341            for (i = 0; i < cnt; i++) {
    342                 unsigned long startaddr, endaddr;
     342                uintptr_t startaddr, endaddr;
    343343
    344344                startaddr = freep[i].kve_start;
     
    364364        FILE *f;
    365365
    366         last_brk = (unsigned long)sbrk(0);
     366        last_brk = (uintptr_t)sbrk(0);
    367367
    368368        f = fopen("/compat/linux/proc/self/maps", "r");
     
    371371
    372372            do {
    373                 unsigned long startaddr, endaddr;
     373                uintptr_t startaddr, endaddr;
    374374                int n;
    375375
     
    527527#endif
    528528
    529 static void code_gen_alloc(unsigned long tb_size)
     529static void code_gen_alloc(uintptr_t tb_size)
    530530{
    531531#ifdef USE_STATIC_CODE_GEN_BUFFER
     
    548548#else
    549549        /* XXX: needs adjustments */
    550         code_gen_buffer_size = (unsigned long)(ram_size / 4);
     550        code_gen_buffer_size = (uintptr_t)(ram_size / 4);
    551551#endif
    552552    }
     
    646646   (in bytes) allocated to the translation buffer. Zero means default
    647647   size. */
    648 void cpu_exec_init_all(unsigned long tb_size)
     648void cpu_exec_init_all(uintptr_t tb_size)
    649649{
    650650    cpu_gen_init();
     
    792792           ((unsigned long)(code_gen_ptr - code_gen_buffer)) / nb_tbs : 0);
    793793#endif
    794     if ((unsigned long)(code_gen_ptr - code_gen_buffer) > code_gen_buffer_size)
     794    if ((uintptr_t)(code_gen_ptr - code_gen_buffer) > code_gen_buffer_size)
    795795        cpu_abort(env1, "Internal error: code buffer overflow\n");
    796796
     
    874874    for(;;) {
    875875        tb1 = *ptb;
    876         n1 = (long)tb1 & 3;
    877         tb1 = (TranslationBlock *)((long)tb1 & ~3);
     876        n1 = (intptr_t)tb1 & 3;
     877        tb1 = (TranslationBlock *)((intptr_t)tb1 & ~3);
    878878        if (tb1 == tb) {
    879879            *ptb = tb1->page_next[n1];
     
    895895        for(;;) {
    896896            tb1 = *ptb;
    897             n1 = (long)tb1 & 3;
    898             tb1 = (TranslationBlock *)((long)tb1 & ~3);
     897            n1 = (intptr_t)tb1 & 3;
     898            tb1 = (TranslationBlock *)((intptr_t)tb1 & ~3);
    899899            if (n1 == n && tb1 == tb)
    900900                break;
     
    916916static inline void tb_reset_jump(TranslationBlock *tb, int n)
    917917{
    918     tb_set_jmp_target(tb, n, (unsigned long)(tb->tc_ptr + tb->tb_next_offset[n]));
     918    tb_set_jmp_target(tb, n, (uintptr_t)(tb->tc_ptr + tb->tb_next_offset[n]));
    919919}
    920920
     
    961961    tb1 = tb->jmp_first;
    962962    for(;;) {
    963         n1 = (long)tb1 & 3;
     963        n1 = (intptr_t)tb1 & 3;
    964964        if (n1 == 2)
    965965            break;
    966         tb1 = (TranslationBlock *)((long)tb1 & ~3);
     966        tb1 = (TranslationBlock *)((intptr_t)tb1 & ~3);
    967967        tb2 = tb1->jmp_next[n1];
    968968        tb_reset_jump(tb1, n1);
     
    970970        tb1 = tb2;
    971971    }
    972     tb->jmp_first = (TranslationBlock *)((long)tb | 2); /* fail safe */
     972    tb->jmp_first = (TranslationBlock *)((intptr_t)tb | 2); /* fail safe */
    973973
    974974    tb_phys_invalidate_count++;
     
    991991    pc = cs_base + eip;
    992992
    993     tb = tb_find(&ptb, (unsigned long)pc, (unsigned long)cs_base,
     993    tb = tb_find(&ptb, (uintptr_t)pc, (uintptr_t)cs_base,
    994994                 flags);
    995995
     
    10131013 * Gets the page offset.
    10141014 */
    1015 unsigned long get_phys_page_offset(target_ulong addr)
     1015ram_addr_t get_phys_page_offset(target_ulong addr)
    10161016{
    10171017    PhysPageDesc *p = phys_page_find(addr >> TARGET_PAGE_BITS);
     
    10581058    tb = p->first_tb;
    10591059    while (tb != NULL) {
    1060         n = (long)tb & 3;
    1061         tb = (TranslationBlock *)((long)tb & ~3);
     1060        n = (intptr_t)tb & 3;
     1061        tb = (TranslationBlock *)((intptr_t)tb & ~3);
    10621062        /* NOTE: this is subtle as a TB may span two physical pages */
    10631063        if (n == 0) {
     
    11031103    tb->cflags = cflags;
    11041104    cpu_gen_code(env, tb, &code_gen_size);
    1105     code_gen_ptr = (void *)(((unsigned long)code_gen_ptr + code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1));
     1105    code_gen_ptr = (void *)(((uintptr_t)code_gen_ptr + code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1));
    11061106
    11071107    /* check next page if needed */
     
    11511151    tb = p->first_tb;
    11521152    while (tb != NULL) {
    1153         n = (long)tb & 3;
    1154         tb = (TranslationBlock *)((long)tb & ~3);
     1153        n = (intptr_t)tb & 3;
     1154        tb = (TranslationBlock *)((intptr_t)tb & ~3);
    11551155        tb_next = tb->page_next[n];
    11561156        /* NOTE: this is subtle as a TB may span two physical pages */
     
    12361236                  cpu_single_env->mem_io_vaddr, len,
    12371237                  cpu_single_env->eip,
    1238                   cpu_single_env->eip + (long)cpu_single_env->segs[R_CS].base);
     1238                  cpu_single_env->eip + (intptr_t)cpu_single_env->segs[R_CS].base);
    12391239    }
    12401240#endif
     
    12551255#if !defined(CONFIG_SOFTMMU)
    12561256static void tb_invalidate_phys_page(tb_page_addr_t addr,
    1257                                     unsigned long pc, void *puc)
     1257                                    uintptr_t pc, void *puc)
    12581258{
    12591259    TranslationBlock *tb;
     
    12801280#endif
    12811281    while (tb != NULL) {
    1282         n = (long)tb & 3;
    1283         tb = (TranslationBlock *)((long)tb & ~3);
     1282        n = (intptr_t)tb & 3;
     1283        tb = (TranslationBlock *)((intptr_t)tb & ~3);
    12841284#ifdef TARGET_HAS_PRECISE_SMC
    12851285        if (current_tb == tb &&
     
    13251325    tb->page_next[n] = p->first_tb;
    13261326    last_first_tb = p->first_tb;
    1327     p->first_tb = (TranslationBlock *)((long)tb | n);
     1327    p->first_tb = (TranslationBlock *)((intptr_t)tb | n);
    13281328    invalidate_page_bitmap(p);
    13291329
     
    13751375
    13761376    if (nb_tbs >= code_gen_max_blocks ||
    1377         (code_gen_ptr - code_gen_buffer) >= VBOX_ONLY((unsigned long))code_gen_buffer_max_size)
     1377        (code_gen_ptr - code_gen_buffer) >= VBOX_ONLY((uintptr_t))code_gen_buffer_max_size)
    13781378        return NULL;
    13791379    tb = &tbs[nb_tbs++];
     
    14181418        tb->page_addr[1] = -1;
    14191419
    1420     tb->jmp_first = (TranslationBlock *)((long)tb | 2);
     1420    tb->jmp_first = (TranslationBlock *)((intptr_t)tb | 2);
    14211421    tb->jmp_next[0] = NULL;
    14221422    tb->jmp_next[1] = NULL;
     
    14361436/* find the TB 'tb' such that tb[0].tc_ptr <= tc_ptr <
    14371437   tb[1].tc_ptr. Return NULL if not found */
    1438 TranslationBlock *tb_find_pc(unsigned long tc_ptr)
     1438TranslationBlock *tb_find_pc(uintptr_t tc_ptr)
    14391439{
    14401440    int m_min, m_max, m;
    1441     unsigned long v;
     1441    uintptr_t v;
    14421442    TranslationBlock *tb;
    14431443
    14441444    if (nb_tbs <= 0)
    14451445        return NULL;
    1446     if (tc_ptr < (unsigned long)code_gen_buffer ||
    1447         tc_ptr >= (unsigned long)code_gen_ptr)
     1446    if (tc_ptr < (uintptr_t)code_gen_buffer ||
     1447        tc_ptr >= (uintptr_t)code_gen_ptr)
    14481448        return NULL;
    14491449    /* binary search (cf Knuth) */
     
    14531453        m = (m_min + m_max) >> 1;
    14541454        tb = &tbs[m];
    1455         v = (unsigned long)tb->tc_ptr;
     1455        v = (uintptr_t)tb->tc_ptr;
    14561456        if (v == tc_ptr)
    14571457            return tb;
     
    14761476        /* find head of list */
    14771477        for(;;) {
    1478             n1 = (long)tb1 & 3;
    1479             tb1 = (TranslationBlock *)((long)tb1 & ~3);
     1478            n1 = (intptr_t)tb1 & 3;
     1479            tb1 = (TranslationBlock *)((intptr_t)tb1 & ~3);
    14801480            if (n1 == 2)
    14811481                break;
     
    14891489        for(;;) {
    14901490            tb1 = *ptb;
    1491             n1 = (long)tb1 & 3;
    1492             tb1 = (TranslationBlock *)((long)tb1 & ~3);
     1491            n1 = (intptr_t)tb1 & 3;
     1492            tb1 = (TranslationBlock *)((intptr_t)tb1 & ~3);
    14931493            if (n1 == n && tb1 == tb)
    14941494                break;
     
    22042204
    22052205static inline void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry,
    2206                                          unsigned long start, unsigned long length)
    2207 {
    2208     unsigned long addr;
     2206                                         uintptr_t start, uintptr_t length)
     2207{
     2208    uintptr_t addr;
    22092209#ifdef VBOX
    22102210
     
    22252225{
    22262226    CPUState *env;
    2227     unsigned long length, start1;
     2227    uintptr_t length, start1;
    22282228    int i;
    22292229
     
    22412241    start1 = start;
    22422242#elif !defined(VBOX)
    2243     start1 = (unsigned long)qemu_get_ram_ptr(start);
     2243    start1 = (uintptr_t)qemu_get_ram_ptr(start);
    22442244    /* Chek that we don't span multiple blocks - this breaks the
    22452245       address comparisons below.  */
    2246     if ((unsigned long)qemu_get_ram_ptr(end - 1) - start1
     2246    if ((uintptr_t)qemu_get_ram_ptr(end - 1) - start1
    22472247            != (end - 1) - start) {
    22482248        abort();
    22492249    }
    22502250#else
    2251     start1 = (unsigned long)remR3TlbGCPhys2Ptr(first_cpu, start, 1 /*fWritable*/); /** @todo page replacing (sharing or read only) may cause trouble, fix interface/whatever. */
     2251    start1 = (uintptr_t)remR3TlbGCPhys2Ptr(first_cpu, start, 1 /*fWritable*/); /** @todo page replacing (sharing or read only) may cause trouble, fix interface/whatever. */
    22522252#endif
    22532253
     
    22992299{
    23002300    ram_addr_t ram_addr;
     2301#ifndef VBOX
    23012302    void *p;
     2303#endif
    23022304
    23032305    if ((tlb_entry->addr_write & ~TARGET_PAGE_MASK) == IO_MEM_RAM) {
     
    23052307        ram_addr = (tlb_entry->addr_write & TARGET_PAGE_MASK) + tlb_entry->addend;
    23062308#elif !defined(VBOX)
    2307         p = (void *)(unsigned long)((tlb_entry->addr_write & TARGET_PAGE_MASK)
     2309        p = (void *)(uintptr_t)((tlb_entry->addr_write & TARGET_PAGE_MASK)
    23082310            + tlb_entry->addend);
    23092311        ram_addr = qemu_ram_addr_from_host(p);
     
    23832385{
    23842386    PhysPageDesc *p;
    2385     unsigned long pd;
     2387    ram_addr_t pd;
    23862388    unsigned int index;
    23872389    target_ulong address;
    23882390    target_ulong code_address;
    2389     unsigned long addend;
     2391    uintptr_t addend;
    23902392    CPUTLBEntry *te;
    23912393    CPUWatchpoint *wp;
     
    24072409#if defined(DEBUG_TLB)
    24082410    printf("tlb_set_page: vaddr=" TARGET_FMT_lx " paddr=0x%08x prot=%x idx=%d size=" TARGET_FMT_lx " pd=0x%08lx\n",
    2409            vaddr, (int)paddr, prot, mmu_idx, size, pd);
     2411           vaddr, (int)paddr, prot, mmu_idx, size, (long)pd);
    24102412#endif
    24112413
     
    24182420    addend = pd & TARGET_PAGE_MASK;
    24192421#elif !defined(VBOX)
    2420     addend = (unsigned long)qemu_get_ram_ptr(pd & TARGET_PAGE_MASK);
     2422    addend = (uintptr_t)qemu_get_ram_ptr(pd & TARGET_PAGE_MASK);
    24212423#else
    24222424    /** @todo this is racing the phys_page_find call above since it may register
    24232425     *        a new chunk of memory...  */
    2424     addend = (unsigned long)remR3TlbGCPhys2Ptr(env, pd & TARGET_PAGE_MASK, !!(prot & PAGE_WRITE));
     2426    addend = (uintptr_t)remR3TlbGCPhys2Ptr(env, pd & TARGET_PAGE_MASK, !!(prot & PAGE_WRITE));
    24252427#endif
    24262428
     
    25532555    walk_memory_regions_fn fn;
    25542556    void *priv;
    2555     unsigned long start;
     2557    uintptr_t start;
    25562558    int prot;
    25572559};
     
    26142616{
    26152617    struct walk_memory_regions_data data;
    2616     unsigned long i;
     2618    target_ulong i;
    26172619
    26182620    data.fn = fn;
     
    27582760/* called from signal handler: invalidate the code and unprotect the
    27592761   page. Return TRUE if the fault was successfully handled. */
    2760 int page_unprotect(target_ulong address, unsigned long pc, void *puc)
     2762int page_unprotect(target_ulong address, uintptr_t pc, void *puc)
    27612763{
    27622764    unsigned int prot;
     
    28052807
    28062808static inline void tlb_set_dirty(CPUState *env,
    2807                                  unsigned long addr, target_ulong vaddr)
     2809                                 uintptr_t addr, target_ulong vaddr)
    28082810{
    28092811}
     
    29832985#define HUGETLBFS_MAGIC       0x958458f6
    29842986
    2985 static long gethugepagesize(const char *path)
     2987static size_t gethugepagesize(const char *path)
    29862988{
    29872989    struct statfs fs;
     
    30003002            fprintf(stderr, "Warning: path not on HugeTLBFS: %s\n", path);
    30013003
    3002     return fs.f_bsize;
     3004    return (size_t)fs.f_bsize;
    30033005}
    30043006
     
    30133015    int flags;
    30143016#endif
    3015     unsigned long hpagesize;
     3017    size_t hpagesize;
    30163018
    30173019    hpagesize = gethugepagesize(path);
     
    38063808    uint32_t val;
    38073809    target_phys_addr_t page;
    3808     unsigned long pd;
     3810    ram_addr_t pd;
    38093811    PhysPageDesc *p;
    38103812
     
    38583860                }
    38593861            } else {
    3860                 unsigned long addr1;
     3862                ram_addr_t addr1;
    38613863                addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
    38623864                /* RAM case */
     
    39373939    uint8_t *ptr;
    39383940    target_phys_addr_t page;
    3939     unsigned long pd;
     3941    ram_addr_t pd;
    39403942    PhysPageDesc *p;
    39413943
     
    39573959            /* do nothing */
    39583960        } else {
    3959             unsigned long addr1;
     3961            ram_addr_t addr1;
    39603962            addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
    39613963            /* ROM/RAM case */
     
    40324034    uint8_t *ptr;
    40334035    target_phys_addr_t page;
    4034     unsigned long pd;
     4036    ram_addr_t pd;
    40354037    PhysPageDesc *p;
    4036     unsigned long addr1;
     4038    ram_addr_t addr1;
    40374039
    40384040    while (len > 0) {
     
    41214123    uint8_t *ptr;
    41224124    uint32_t val;
    4123     unsigned long pd;
     4125    ram_addr_t pd;
    41244126    PhysPageDesc *p;
    41254127
     
    41574159    uint8_t *ptr;
    41584160    uint64_t val;
    4159     unsigned long pd;
     4161    ram_addr_t pd;
    41604162    PhysPageDesc *p;
    41614163
     
    42054207{
    42064208    int io_index;
     4209#ifndef VBOX
    42074210    uint8_t *ptr;
     4211#endif
    42084212    uint64_t val;
    4209     unsigned long pd;
     4213    ram_addr_t pd;
    42104214    PhysPageDesc *p;
    42114215
     
    42444248    int io_index;
    42454249    uint8_t *ptr;
    4246     unsigned long pd;
     4250    ram_addr_t pd;
    42474251    PhysPageDesc *p;
    42484252
     
    42614265    } else {
    42624266#ifndef VBOX
    4263         unsigned long addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
     4267        ram_addr_t addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
    42644268        ptr = qemu_get_ram_ptr(addr1);
    42654269        stl_p(ptr, val);
     
    42864290    int io_index;
    42874291    uint8_t *ptr;
    4288     unsigned long pd;
     4292    ram_addr_t pd;
    42894293    PhysPageDesc *p;
    42904294
     
    43234327    int io_index;
    43244328    uint8_t *ptr;
    4325     unsigned long pd;
     4329    ram_addr_t pd;
    43264330    PhysPageDesc *p;
    43274331
     
    43394343        io_mem_write[io_index][2](io_mem_opaque[io_index], addr, val);
    43404344    } else {
    4341         unsigned long addr1;
     4345        ram_addr_t addr1;
    43424346        addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
    43434347        /* RAM case */
     
    43704374    int io_index;
    43714375    uint8_t *ptr;
    4372     unsigned long pd;
     4376    ram_addr_t pd;
    43734377    PhysPageDesc *p;
    43744378
     
    43864390        io_mem_write[io_index][1](io_mem_opaque[io_index], addr, val);
    43874391    } else {
    4388         unsigned long addr1;
     4392        ram_addr_t addr1;
    43894393        addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
    43904394        /* RAM case */
     
    44534457    uint64_t flags;
    44544458
    4455     tb = tb_find_pc((unsigned long)retaddr);
     4459    tb = tb_find_pc((uintptr_t)retaddr);
    44564460    if (!tb) {
    44574461        cpu_abort(env, "cpu_io_recompile: could not find TB for pc=%p",
     
    44594463    }
    44604464    n = env->icount_decr.u16.low + tb->icount;
    4461     cpu_restore_state(tb, env, (unsigned long)retaddr, NULL);
     4465    cpu_restore_state(tb, env, (uintptr_t)retaddr, NULL);
    44624466    /* Calculate how many instructions had been executed before the fault
    44634467       occurred.  */
  • trunk/src/recompiler/gen-icount.h

    r37689 r42601  
    3030        *icount_arg = num_insns;
    3131        gen_set_label(icount_label);
    32         tcg_gen_exit_tb((long)tb + 2);
     32        tcg_gen_exit_tb((uintptr_t)(tb + 2));
    3333    }
    3434}
  • trunk/src/recompiler/qemu-lock.h

    r37675 r42601  
    101101static inline int testandset (int *p)
    102102{
    103     long int readval = 0;
     103    long int64_t readval = 0;
    104104
    105105    __asm__ __volatile__ ("lock; cmpxchgl %2, %0"
  • trunk/src/recompiler/softmmu_header.h

    r38320 r42601  
    8787    RES_TYPE res;
    8888    target_ulong addr;
    89     unsigned long physaddr;
     89    uintptr_t physaddr;
    9090    int mmu_idx;
    9191
     
    108108    int res, page_index;
    109109    target_ulong addr;
    110     unsigned long physaddr;
     110    uintptr_t physaddr;
    111111    int mmu_idx;
    112112
     
    133133    int page_index;
    134134    target_ulong addr;
    135     unsigned long physaddr;
     135    uintptr_t physaddr;
    136136    int mmu_idx;
    137137
  • trunk/src/recompiler/softmmu_template.h

    r37829 r42601  
    8282    index = (physaddr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
    8383    physaddr = (physaddr & TARGET_PAGE_MASK) + addr;
    84     env->mem_io_pc = (unsigned long)retaddr;
     84    env->mem_io_pc = (uintptr_t)retaddr;
    8585    if (index > (IO_MEM_NOTDIRTY >> IO_MEM_SHIFT)
    8686            && !can_do_io(env)) {
     
    120120    target_ulong tlb_addr;
    121121    target_phys_addr_t ioaddr;
    122     unsigned long addend;
     122    uintptr_t addend;
    123123    void *retaddr;
    124124
     
    154154#endif
    155155            addend = env->tlb_table[mmu_idx][index].addend;
    156             res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend));
     156            res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(uintptr_t)(addr+addend));
    157157        }
    158158    } else {
     
    177177    int index, shift;
    178178    target_phys_addr_t ioaddr;
    179     unsigned long addend;
     179    uintptr_t addend;
    180180    target_ulong tlb_addr, addr1, addr2;
    181181
     
    209209            /* unaligned/aligned access in the same page */
    210210            addend = env->tlb_table[mmu_idx][index].addend;
    211             res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend));
     211            res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(uintptr_t)(addr+addend));
    212212        }
    213213    } else {
     
    240240
    241241    env->mem_io_vaddr = addr;
    242     env->mem_io_pc = (unsigned long)retaddr;
     242    env->mem_io_pc = (uintptr_t)retaddr;
    243243#if SHIFT <= 2
    244244    io_mem_write[index][SHIFT](io_mem_opaque[index], physaddr, val);
     
    259259{
    260260    target_phys_addr_t ioaddr;
    261     unsigned long addend;
     261    uintptr_t addend;
    262262    target_ulong tlb_addr;
    263263    void *retaddr;
     
    292292#endif
    293293            addend = env->tlb_table[mmu_idx][index].addend;
    294             glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val);
     294            glue(glue(st, SUFFIX), _raw)((uint8_t *)(uintptr_t)(addr+addend), val);
    295295        }
    296296    } else {
     
    313313{
    314314    target_phys_addr_t ioaddr;
    315     unsigned long addend;
     315    uintptr_t addend;
    316316    target_ulong tlb_addr;
    317317    int index, i;
     
    344344            /* aligned/unaligned access in the same page */
    345345            addend = env->tlb_table[mmu_idx][index].addend;
    346             glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val);
     346            glue(glue(st, SUFFIX), _raw)((uint8_t *)(uintptr_t)(addr+addend), val);
    347347        }
    348348    } else {
  • trunk/src/recompiler/target-i386/op_helper.c

    r42488 r42601  
    56435643    TranslationBlock *tb;
    56445644    int ret;
    5645     unsigned long pc;
     5645    uintptr_t pc;
    56465646    CPUX86State *saved_env;
    56475647
     
    56555655        if (retaddr) {
    56565656            /* now we have a real cpu fault */
    5657             pc = (unsigned long)retaddr;
     5657            pc = (uintptr_t)retaddr;
    56585658            tb = tb_find_pc(pc);
    56595659            if (tb) {
     
    58455845DECLINLINE(void) tb_reset_jump(TranslationBlock *tb, int n)
    58465846{
    5847     tb_set_jmp_target(tb, n, (unsigned long)(tb->tc_ptr + tb->tb_next_offset[n]));
     5847    tb_set_jmp_target(tb, n, (uintptr_t)(tb->tc_ptr + tb->tb_next_offset[n]));
    58485848}
    58495849
  • trunk/src/recompiler/target-i386/translate.c

    r40360 r42601  
    24802480        tcg_gen_goto_tb(tb_num);
    24812481        gen_jmp_im(eip);
    2482         tcg_gen_exit_tb((long)tb + tb_num);
     2482        tcg_gen_exit_tb((intptr_t)tb + tb_num);
    24832483    } else {
    24842484        /* jump to another page: currently not optimized */
     
    83648364
    83658365void gen_pc_load(CPUState *env, TranslationBlock *tb,
    8366                 unsigned long searched_pc, int pc_pos, void *puc)
     8366                 uintptr_t searched_pc, int pc_pos, void *puc)
    83678367{
    83688368    int cc_op;
  • trunk/src/recompiler/tcg/i386/tcg-target.c

    r38064 r42601  
    4444    TCG_REG_R10,
    4545    TCG_REG_R11,
     46# if !defined(VBOX) || !defined(__MINGW64__)
    4647    TCG_REG_R9,
    4748    TCG_REG_R8,
    4849    TCG_REG_RCX,
    4950    TCG_REG_RDX,
     51# endif
    5052    TCG_REG_RSI,
    5153    TCG_REG_RDI,
     54# if defined(VBOX) && defined(__MINGW64__)
     55    TCG_REG_R9,
     56    TCG_REG_R8,
     57    TCG_REG_RDX,
     58    TCG_REG_RCX,
     59# endif
    5260    TCG_REG_RAX,
    5361#else
     
    6472static const int tcg_target_call_iarg_regs[] = {
    6573#if TCG_TARGET_REG_BITS == 64
     74# if defined(VBOX) && defined(__MINGW64__)
     75    TCG_REG_RCX,
     76    TCG_REG_RDX,
     77# else
    6678    TCG_REG_RDI,
    6779    TCG_REG_RSI,
    6880    TCG_REG_RDX,
    6981    TCG_REG_RCX,
     82# endif
    7083    TCG_REG_R8,
    7184    TCG_REG_R9,
     
    197210        if (TCG_TARGET_REG_BITS == 64) {
    198211            tcg_regset_set32(ct->u.regs, 0, 0xffff);
     212#if defined(VBOX) && defined(__MINGW64__)
     213            tcg_regset_reset_reg(ct->u.regs, tcg_target_call_iarg_regs[2]);
     214            tcg_regset_reset_reg(ct->u.regs, tcg_target_call_iarg_regs[1]);
     215            tcg_regset_reset_reg(ct->u.regs, tcg_target_call_iarg_regs[0]);
     216#else
     217            /** @todo figure why RDX isn't mentioned here. */
    199218            tcg_regset_reset_reg(ct->u.regs, TCG_REG_RSI);
    200219            tcg_regset_reset_reg(ct->u.regs, TCG_REG_RDI);
     220#endif
    201221        } else {
    202222            tcg_regset_set32(ct->u.regs, 0, 0xff);
     
    759779}
    760780
    761 #ifdef VBOX
     781#ifdef VBOX_16_BYTE_STACK_ALIGN
    762782static void tcg_out_subi(TCGContext *s, int reg, tcg_target_long val)
    763783{
     
    13901410    *label_ptr[2] = s->code_ptr - label_ptr[2] - 1;
    13911411#else
     1412# if defined(VBOX) && defined(__MINGW64__)
     1413#  error port me
     1414# endif
    13921415    {
    13931416        int32_t offset = GUEST_BASE;
     
    15261549    /* XXX: move that code at the end of the TB */
    15271550    if (TCG_TARGET_REG_BITS == 64) {
     1551#  if defined(VBOX) && defined(__MINGW64__)
     1552        tcg_out_mov(s, (opc == 3 ? TCG_TYPE_I64 : TCG_TYPE_I32),
     1553                    tcg_target_call_iarg_regs[1], data_reg);
     1554        tcg_out_movi(s, TCG_TYPE_I32, tcg_target_call_iarg_regs[2], mem_index);
     1555#  else
    15281556        tcg_out_mov(s, (opc == 3 ? TCG_TYPE_I64 : TCG_TYPE_I32),
    15291557                    TCG_REG_RSI, data_reg);
    15301558        tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_RDX, mem_index);
     1559#  endif
    15311560        stack_adjust = 0;
    15321561    } else if (TARGET_LONG_BITS == 32) {
     
    15971626    *label_ptr[2] = s->code_ptr - label_ptr[2] - 1;
    15981627#else
     1628# if defined(VBOX) && defined(__MINGW64__)
     1629#  error port me
     1630# endif
    15991631    {
    16001632        int32_t offset = GUEST_BASE;
     
    20922124    TCG_REG_RBP,
    20932125    TCG_REG_RBX,
     2126# if defined(VBOX) && defined(__MINGW64__)
     2127    TCG_REG_RSI,
     2128    TCG_REG_RDI,
     2129# endif
    20942130    TCG_REG_R12,
    20952131    TCG_REG_R13,
     
    21322168
    21332169    frame_size = push_size + TCG_STATIC_CALL_ARGS_SIZE;
     2170#if defined(VBOX) && defined(__MINGW64__)
     2171    frame_size += TCG_TARGET_CALL_STACK_OFFSET;
     2172#endif
    21342173    frame_size = (frame_size + TCG_TARGET_STACK_ALIGN - 1) &
    21352174        ~(TCG_TARGET_STACK_ALIGN - 1);
     
    21762215    tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_ECX);
    21772216    if (TCG_TARGET_REG_BITS == 64) {
     2217# if !defined(VBOX) || !defined(__MINGW64__)
    21782218        tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_RDI);
    21792219        tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_RSI);
     2220# endif
    21802221        tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R8);
    21812222        tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R9);
  • trunk/src/recompiler/tcg/i386/tcg-target.h

    r37689 r42601  
    7373#define TCG_REG_CALL_STACK TCG_REG_ESP
    7474#define TCG_TARGET_STACK_ALIGN 16
     75#if defined(VBOX) && defined(__MINGW64__)
     76# define TCG_TARGET_CALL_STACK_OFFSET 32 /* 4 qword argument/register spill zone */
     77#else
    7578#define TCG_TARGET_CALL_STACK_OFFSET 0
     79#endif
    7680
    7781/* optional instructions */
     
    126130#endif
    127131
    128 static inline void flush_icache_range(unsigned long start, unsigned long stop)
     132static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
    129133{
    130134}
  • trunk/src/recompiler/tcg/tcg-dyngen.c

    r36140 r42601  
    5252#if 0
    5353#if defined(__s390__)
    54 static inline void flush_icache_range(unsigned long start, unsigned long stop)
     54static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
    5555{
    5656}
    5757#elif defined(__ia64__)
    58 static inline void flush_icache_range(unsigned long start, unsigned long stop)
     58static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
    5959{
    6060    while (start < stop) {
     
    6868#define MIN_CACHE_LINE_SIZE 8 /* conservative value */
    6969
    70 static inline void flush_icache_range(unsigned long start, unsigned long stop)
    71 {
    72     unsigned long p;
     70static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
     71{
     72    uintptr_t p;
    7373
    7474    start &= ~(MIN_CACHE_LINE_SIZE - 1);
     
    8686}
    8787#elif defined(__alpha__)
    88 static inline void flush_icache_range(unsigned long start, unsigned long stop)
     88static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
    8989{
    9090    asm ("imb");
    9191}
    9292#elif defined(__sparc__)
    93 static inline void flush_icache_range(unsigned long start, unsigned long stop)
    94 {
    95         unsigned long p;
     93static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
     94{
     95        uintptr_t p;
    9696
    9797        p = start & ~(8UL - 1UL);
     
    102102}
    103103#elif defined(__arm__)
    104 static inline void flush_icache_range(unsigned long start, unsigned long stop)
    105 {
    106     register unsigned long _beg __asm ("a1") = start;
    107     register unsigned long _end __asm ("a2") = stop;
    108     register unsigned long _flg __asm ("a3") = 0;
     104static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
     105{
     106    register uintptr_t _beg __asm ("a1") = start;
     107    register uintptr_t _end __asm ("a2") = stop;
     108    register uintptr_t _flg __asm ("a3") = 0;
    109109    __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
    110110}
     
    112112
    113113# include <asm/cachectl.h>
    114 static inline void flush_icache_range(unsigned long start, unsigned long stop)
     114static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
    115115{
    116116    cacheflush(start,FLUSH_SCOPE_LINE,FLUSH_CACHE_BOTH,stop-start+16);
     
    119119
    120120#include <sys/cachectl.h>
    121 static inline void flush_icache_range(unsigned long start, unsigned long stop)
     121static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
    122122{
    123123    _flush_cache ((void *)start, stop - start, BCACHE);
     
    157157    uint64_t m0, m1, v0, v1, b0, b1, *b = (uint64_t *) (insn_addr & -16);
    158158#   define insn_mask ((1UL << 41) - 1)
    159     unsigned long shift;
     159    uintptr_t shift;
    160160
    161161    b0 = b[0]; b1 = b[1];
     
    302302                                     struct ia64_fixup *plt_fixes,
    303303                                     int num_plts,
    304                                      unsigned long *plt_target,
     304                                     uintptr_t *plt_target,
    305305                                     unsigned int *plt_offset)
    306306{
     
    395395
    396396    for (; stub != NULL; stub = stub->next) {
    397         unsigned long l = (unsigned long)p;
     397        uintptr_t l = (uintptr_t)p;
    398398        /* stub:
    399399         * ldil L'target, %r1
  • trunk/src/recompiler/tcg/tcg.c

    r37693 r42601  
    118118
    119119static void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type,
    120                           int label_index, long addend)
     120                          int label_index, tcg_target_long addend)
    121121{
    122122    TCGLabel *l;
     
    265265    s->code_ptr = s->code_buf;
    266266    tcg_target_qemu_prologue(s);
    267     flush_icache_range((unsigned long)s->code_buf,
    268                        (unsigned long)s->code_ptr);
     267    flush_icache_range((uintptr_t)s->code_buf,
     268                       (uintptr_t)s->code_ptr);
    269269}
    270270
     
    20042004
    20052005static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf,
    2006                                       long search_pc)
     2006                                      intptr_t search_pc)
    20072007{
    20082008    TCGOpcode opc;
     
    20962096        case INDEX_op_set_label:
    20972097            tcg_reg_alloc_bb_end(s, s->reserved_regs);
    2098             tcg_out_label(s, args[0], (long)s->code_ptr);
     2098            tcg_out_label(s, args[0], (intptr_t)s->code_ptr);
    20992099            break;
    21002100        case INDEX_op_call:
     
    21452145
    21462146    /* flush instruction cache */
    2147     flush_icache_range((unsigned long)gen_code_buf,
    2148                        (unsigned long)s->code_ptr);
     2147    flush_icache_range((uintptr_t)gen_code_buf,
     2148                       (uintptr_t)s->code_ptr);
    21492149    return s->code_ptr -  gen_code_buf;
    21502150}
     
    21542154   not be changed, though writing the same values is ok.
    21552155   Return -1 if not found. */
    2156 int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset)
     2156int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, intptr_t offset)
    21572157{
    21582158    return tcg_gen_code_common(s, gen_code_buf, offset);
  • trunk/src/recompiler/tcg/tcg.h

    r37689 r42601  
    282282    /* goto_tb support */
    283283    uint8_t *code_buf;
    284     unsigned long *tb_next;
     284    uintptr_t *tb_next;
    285285    uint16_t *tb_next_offset;
    286286    uint16_t *tb_jmp_offset; /* != NULL if USE_DIRECT_JUMP */
     
    342342    TCGContext *s = &tcg_ctx;
    343343    uint8_t *ptr, *ptr_end;
    344     size = (size + sizeof(long) - 1) & ~(sizeof(long) - 1);
     344    size = (size + sizeof(void *) - 1) & ~(sizeof(void *) - 1);
    345345    ptr = s->pool_cur;
    346346    ptr_end = ptr + size;
     
    358358
    359359int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf);
    360 int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset);
     360int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, intptr_t offset);
    361361
    362362void tcg_set_frame(TCGContext *s, int reg,
     
    502502#if defined(_ARCH_PPC) && !defined(_ARCH_PPC64)
    503503#define tcg_qemu_tb_exec(tb_ptr) \
    504     ((long REGPARM __attribute__ ((longcall)) (*)(void *))code_gen_prologue)(tb_ptr)
    505 #else
    506 # if defined(VBOX) && defined(GCC_WITH_BUGGY_REGPARM)
     504    ((intptr_t REGPARM __attribute__ ((longcall)) (*)(void *))code_gen_prologue)(tb_ptr)
     505#else
     506# if defined(VBOX) && defined(GCC_WITH_BUGGY_REGPARM) && !defined(__MINGW64__)
    507507#  define tcg_qemu_tb_exec(tb_ptr, ret)        \
    508508    __asm__ __volatile__("call *%%ecx" : "=a"(ret) : "a"(tb_ptr), "c" (&code_gen_prologue[0]) : "memory", "%edx", "cc")
    509 # else  /* !VBOX || !GCC_WITH_BUGGY_REG_PARAM */
    510 #define tcg_qemu_tb_exec(tb_ptr) ((long REGPARM (*)(void *))code_gen_prologue)(tb_ptr)
    511 # endif /* !VBOX || !GCC_WITH_BUGGY_REG_PARAM */
    512 #endif
     509# else
     510#define tcg_qemu_tb_exec(tb_ptr) ((intptr_t REGPARM (*)(void *))code_gen_prologue)(tb_ptr)
     511# endif
     512#endif
  • trunk/src/recompiler/translate-all.c

    r37689 r42601  
    5656    tcg_context_init(&tcg_ctx);
    5757    tcg_set_frame(&tcg_ctx, TCG_AREG0, offsetof(CPUState, temp_buf),
    58                   CPU_TEMP_BUF_NLONGS * sizeof(long));
     58                  sizeof(((CPUState *)0)->temp_buf));
    5959}
    6060
     
    132132 */
    133133int cpu_restore_state(TranslationBlock *tb,
    134                       CPUState *env, unsigned long searched_pc,
     134                      CPUState *env, uintptr_t searched_pc,
    135135                      void *puc)
    136136{
    137137    TCGContext *s = &tcg_ctx;
    138138    int j;
    139     unsigned long tc_ptr;
     139    uintptr_t tc_ptr;
    140140#ifdef CONFIG_PROFILER
    141141    int64_t ti;
     
    157157
    158158    /* find opc index corresponding to search_pc */
    159     tc_ptr = (unsigned long)tb->tc_ptr;
     159    tc_ptr = (uintptr_t)tb->tc_ptr;
    160160    if (searched_pc < tc_ptr)
    161161        return -1;
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