Changeset 42610 in vbox for trunk/src/VBox

Timestamp:

Aug 6, 2012 12:44:09 AM (12 years ago)

Author:

vboxsync

Message:

IEM: Implemented SGDT and SIDT.

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/IEMAll.cpp (modified) (3 diffs)
• VMMAll/IEMAllCImpl.cpp.h (modified) (3 diffs)
• VMMAll/IEMAllInstructions.cpp.h (modified) (7 diffs)
• testcase/tstIEMCheckMc.cpp (modified) (2 diffs)

trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

@@ -288 +288 @@
 
 /**
- * Checks if a intel CPUID feature is present.
+ * Checks if an Intel CPUID feature is present.
  */
 #define IEM_IS_INTEL_CPUID_FEATURE_PRESENT_EDX(a_fEdx)  \
     (   ((a_fEdx) & (X86_CPUID_FEATURE_EDX_TSC | 0)) \
      || iemRegIsIntelCpuIdFeaturePresent(pIemCpu, (a_fEdx), 0) )
+
+/**
+ * Evaluates to true if we're presenting an Intel CPU to the guest.
+ */
+#define IEM_IS_GUEST_CPU_INTEL(a_pIemCpu)  (true) /** @todo determin this once and store it the CPU structure */
+
+/**
+ * Evaluates to true if we're presenting an AMD CPU to the guest.
+ */
+#define IEM_IS_GUEST_CPU_AMD(a_pIemCpu)    (false) /** @todo determin this once and store it the CPU structure */
 
 /**
@@ -5442 +5452 @@
     }
     return rc;
+}
+
+
+/**
+ * Stores a descriptor register (sgdt, sidt).
+ *
+ * @returns Strict VBox status code.
+ * @param   pIemCpu             The IEM per CPU data.
+ * @param   cbLimit             The limit.
+ * @param   GCPTrBase           The base address.
+ * @param   iSegReg             The index of the segment register to use for
+ *                              this access.  The base and limits are checked.
+ * @param   GCPtrMem            The address of the guest memory.
+ * @param   enmOpSize           The effective operand size.
+ */
+static VBOXSTRICTRC iemMemStoreDataXdtr(PIEMCPU pIemCpu, uint16_t cbLimit, RTGCPTR GCPtrBase,
+                                        uint8_t iSegReg, RTGCPTR GCPtrMem, IEMMODE enmOpSize)
+{
+    uint8_t *pu8Src;
+    VBOXSTRICTRC rcStrict = iemMemMap(pIemCpu,
+                                      (void **)&pu8Src,
+                                      enmOpSize == IEMMODE_64BIT
+                                      ? 2 + 8
+                                      : enmOpSize == IEMMODE_32BIT
+                                      ? 2 + 4
+                                      : 2 + 3,
+                                      iSegReg,
+                                      GCPtrMem,
+                                      IEM_ACCESS_DATA_W);
+    if (rcStrict == VINF_SUCCESS)
+    {
+        pu8Src[0] = RT_BYTE1(cbLimit);
+        pu8Src[1] = RT_BYTE2(cbLimit);
+        pu8Src[2] = RT_BYTE1(GCPtrBase);
+        pu8Src[3] = RT_BYTE2(GCPtrBase);
+        pu8Src[4] = RT_BYTE3(GCPtrBase);
+        if (enmOpSize == IEMMODE_16BIT)
+            pu8Src[5] = 0; /* Note! the 286 stored 0xff here. */
+        else
+        {
+            pu8Src[5] = RT_BYTE4(GCPtrBase);
+            if (enmOpSize == IEMMODE_64BIT)
+            {
+                pu8Src[6] = RT_BYTE5(GCPtrBase);
+                pu8Src[7] = RT_BYTE6(GCPtrBase);
+                pu8Src[8] = RT_BYTE7(GCPtrBase);
+                pu8Src[9] = RT_BYTE8(GCPtrBase);
+            }
+        }
+        rcStrict = iemMemCommitAndUnmap(pIemCpu, (void *)pu8Src, IEM_ACCESS_DATA_W);
+    }
+    return rcStrict;
 }
 
@@ -6895 +6957 @@
         if (pIemCpu->enmCpuMode == IEMMODE_64BIT) \
             iemRecalEffOpSize64Default(pIemCpu); \
+    } while (0)
+
+/** The instruction has 64-bit operand size if 64-bit mode. */
+#define IEMOP_HLP_64BIT_OP_SIZE() \
+    do \
+    { \
+        if (pIemCpu->enmCpuMode == IEMMODE_64BIT) \
+            pIemCpu->enmEffOpSize = pIemCpu->enmDefOpSize = IEMMODE_64BIT; \
     } while (0)
 

trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h

@@ -2721 +2721 @@
 
 /**
+ * Implements sgdt.
+ *
+ * @param   iEffSeg         The segment where to store the gdtr content.
+ * @param   GCPtrEffDst     The address where to store the gdtr content.
+ * @param   enmEffOpSize    The effective operand size.
+ */
+IEM_CIMPL_DEF_3(iemCImpl_sgdt, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst, IEMMODE, enmEffOpSize)
+{
+    /*
+     * Join paths with sgdt.
+     * Note! No CPL or V8086 checks here, it's a really sad story, as Intel if
+     *       you really must know.
+     */
+    PCPUMCTX pCtx = pIemCpu->CTX_SUFF(pCtx);
+    VBOXSTRICTRC rcStrict = iemMemStoreDataXdtr(pIemCpu, pCtx->gdtr.cbGdt, pCtx->gdtr.pGdt, iEffSeg, GCPtrEffDst, enmEffOpSize);
+    if (rcStrict == VINF_SUCCESS)
+        iemRegAddToRip(pIemCpu, cbInstr);
+    return rcStrict;
+}
+
+
+/**
  * Implements lidt.
  *
@@ -2756 +2778 @@
 
 /**
+ * Implements sidt.
+ *
+ * @param   iEffSeg         The segment where to store the idtr content.
+ * @param   GCPtrEffDst     The address where to store the idtr content.
+ * @param   enmEffOpSize    The effective operand size.
+ */
+IEM_CIMPL_DEF_3(iemCImpl_sidt, uint8_t, iEffSeg, RTGCPTR, GCPtrEffDst, IEMMODE, enmEffOpSize)
+{
+    /*
+     * Join paths with sgdt.
+     * Note! No CPL or V8086 checks here, it's a really sad story, as Intel if
+     *       you really must know.
+     */
+    PCPUMCTX pCtx = pIemCpu->CTX_SUFF(pCtx);
+    VBOXSTRICTRC rcStrict = iemMemStoreDataXdtr(pIemCpu, pCtx->idtr.cbIdt, pCtx->idtr.pIdt, iEffSeg, GCPtrEffDst, enmEffOpSize);
+    if (rcStrict == VINF_SUCCESS)
+        iemRegAddToRip(pIemCpu, cbInstr);
+    return rcStrict;
+}
+
+
+/**
  * Implements lldt.
  *
@@ -2789 +2833 @@
     {
         Log(("lldt %04x: Loading NULL selector.\n",  uNewLdt));
-        /** @todo check if the actual value is loaded or if it's always 0. */
         if (!IEM_VERIFICATION_ENABLED(pIemCpu))
-            CPUMSetGuestLDTR(IEMCPU_TO_VMCPU(pIemCpu), 0);
+            CPUMSetGuestLDTR(IEMCPU_TO_VMCPU(pIemCpu), uNewLdt);
         else
-            pCtx->ldtr.Sel = 0;
-        pCtx->ldtr.ValidSel = 0;
+            pCtx->ldtr.Sel = uNewLdt;
+        pCtx->ldtr.ValidSel = uNewLdt;
         pCtx->ldtr.fFlags   = CPUMSELREG_FLAGS_VALID;
-        pCtx->ldtr.Attr.u   = 0;
-        pCtx->ldtr.u64Base  = 0;
-        pCtx->ldtr.u32Limit = 0;
+        if (IEM_IS_GUEST_CPU_AMD(pIemCpu) && !IEM_VERIFICATION_ENABLED(pIemCpu))
+            pCtx->ldtr.Attr.u   = 0;
+        else
+        {
+            pCtx->ldtr.u64Base  = 0;
+            pCtx->ldtr.u32Limit = 0;
+        }
 
         iemRegAddToRip(pIemCpu, cbInstr);

trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h

@@ -624 +624 @@
 FNIEMOP_DEF_1(iemOp_Grp7_sgdt, uint8_t, bRm)
 {
-    NOREF(pIemCpu); NOREF(bRm);
-    IEMOP_BITCH_ABOUT_STUB();
-    return VERR_IEM_INSTR_NOT_IMPLEMENTED;
+    IEMOP_HLP_64BIT_OP_SIZE();
+    IEM_MC_BEGIN(3, 1);
+    IEM_MC_ARG_CONST(uint8_t,   iEffSeg, /*=*/pIemCpu->iEffSeg,             0);
+    IEM_MC_ARG(RTGCPTR,         GCPtrEffSrc,                                1);
+    IEM_MC_ARG_CONST(IEMMODE,   enmEffOpSizeArg,/*=*/pIemCpu->enmEffOpSize, 2);
+    IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm);
+    IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
+    IEM_MC_CALL_CIMPL_3(iemCImpl_sgdt, iEffSeg, GCPtrEffSrc, enmEffOpSizeArg);
+    IEM_MC_END();
+    return VINF_SUCCESS;
 }
 
@@ -633 +640 @@
 FNIEMOP_DEF(iemOp_Grp7_vmcall)
 {
-    AssertFailed();
+    IEMOP_BITCH_ABOUT_STUB();
     return IEMOP_RAISE_INVALID_OPCODE();
 }
@@ -641 +648 @@
 FNIEMOP_DEF(iemOp_Grp7_vmlaunch)
 {
-    AssertFailed();
+    IEMOP_BITCH_ABOUT_STUB();
     return IEMOP_RAISE_INVALID_OPCODE();
 }
@@ -649 +656 @@
 FNIEMOP_DEF(iemOp_Grp7_vmresume)
 {
-    AssertFailed();
+    IEMOP_BITCH_ABOUT_STUB();
     return IEMOP_RAISE_INVALID_OPCODE();
 }
@@ -657 +664 @@
 FNIEMOP_DEF(iemOp_Grp7_vmxoff)
 {
-    AssertFailed();
+    IEMOP_BITCH_ABOUT_STUB();
     return IEMOP_RAISE_INVALID_OPCODE();
 }
@@ -665 +672 @@
 FNIEMOP_DEF_1(iemOp_Grp7_sidt, uint8_t, bRm)
 {
-    NOREF(pIemCpu); NOREF(bRm);
-    IEMOP_BITCH_ABOUT_STUB();
-    return VERR_IEM_INSTR_NOT_IMPLEMENTED;
+    IEMOP_HLP_64BIT_OP_SIZE();
+    IEM_MC_BEGIN(3, 1);
+    IEM_MC_ARG_CONST(uint8_t,   iEffSeg, /*=*/pIemCpu->iEffSeg,             0);
+    IEM_MC_ARG(RTGCPTR,         GCPtrEffSrc,                                1);
+    IEM_MC_ARG_CONST(IEMMODE,   enmEffOpSizeArg,/*=*/pIemCpu->enmEffOpSize, 2);
+    IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm);
+    IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
+    IEM_MC_CALL_CIMPL_3(iemCImpl_sidt, iEffSeg, GCPtrEffSrc, enmEffOpSizeArg);
+    IEM_MC_END();
+    return VINF_SUCCESS;
 }
 
@@ -694 +708 @@
     IEMOP_HLP_NO_LOCK_PREFIX();
 
-    IEMMODE enmEffOpSize = pIemCpu->enmCpuMode == IEMMODE_64BIT
-                         ? IEMMODE_64BIT
-                         : pIemCpu->enmEffOpSize;
+    IEMOP_HLP_64BIT_OP_SIZE();
     IEM_MC_BEGIN(3, 1);
-    IEM_MC_ARG_CONST(uint8_t,   iEffSeg, /*=*/pIemCpu->iEffSeg,     0);
-    IEM_MC_ARG(RTGCPTR,         GCPtrEffSrc,                        1);
-    IEM_MC_ARG_CONST(IEMMODE,   enmEffOpSizeArg,/*=*/enmEffOpSize,  2);
+    IEM_MC_ARG_CONST(uint8_t,   iEffSeg, /*=*/pIemCpu->iEffSeg,             0);
+    IEM_MC_ARG(RTGCPTR,         GCPtrEffSrc,                                1);
+    IEM_MC_ARG_CONST(IEMMODE,   enmEffOpSizeArg,/*=*/pIemCpu->enmEffOpSize, 2);
     IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm);
     IEM_MC_CALL_CIMPL_3(iemCImpl_lgdt, iEffSeg, GCPtrEffSrc, enmEffOpSizeArg);

trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp

@@ -97 +97 @@
 #define IEMOP_HLP_NO_LOCK_PREFIX()                          do { } while (0)
 #define IEMOP_HLP_NO_64BIT()                                do { } while (0)
+#define IEMOP_HLP_64BIT_OP_SIZE()                           do { } while (0)
 #define IEMOP_HLP_DEFAULT_64BIT_OP_SIZE()                   do { } while (0)
 #define IEMOP_HLP_DONE_DECODING()                           do { } while (0)
@@ -520 +521 @@
 #define IEM_MC_FPU_STACK_UNDERFLOW_THEN_POP(a_iStReg)                                           do { } while (0)
 #define IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(a_iStReg, a_iEffSeg, a_GCPtrEff)             do { } while (0)
-#define IEM_MC_FPU_STACK_UNDERFLOW_THEN_POP_POP(a_iStReg)                                       do { } while (0)
+#define IEM_MC_FPU_STACK_UNDERFLOW_THEN_POP_POP()                                               do { } while (0)
 #define IEM_MC_FPU_STACK_PUSH_UNDERFLOW()                                                       do { } while (0)
 #define IEM_MC_FPU_STACK_PUSH_UNDERFLOW_TWO()                                                   do { } while (0)