Changeset 43163 in vbox
- Timestamp:
- Sep 4, 2012 2:12:53 PM (12 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r42700 r43163 2037 2037 * Call pgmPoolCacheUsed to move the page to the head of the age list. 2038 2038 */ 2039 if (!pgmPoolIsPageLocked(pPage)) 2039 if ( !pgmPoolIsPageLocked(pPage) 2040 && pPage->idx >= PGMPOOL_IDX_FIRST /* paranoia (#6349) */) 2040 2041 break; 2041 2042 LogFlow(("pgmPoolCacheFreeOne: refuse CR3 mapping\n")); … … 4783 4784 4784 4785 /* 4785 * Quietly reject any attempts at flushing any of the special root pages. 4786 */ 4787 if (pPage->idx < PGMPOOL_IDX_FIRST) 4788 { 4789 AssertFailed(); /* can no longer happen */ 4790 Log(("pgmPoolFlushPage: special root page, rejected. enmKind=%s idx=%d\n", pgmPoolPoolKindToStr(pPage->enmKind), pPage->idx)); 4791 return VINF_SUCCESS; 4792 } 4786 * Reject any attempts at flushing any of the special root pages (shall 4787 * not happen). 4788 */ 4789 AssertMsgReturn(pPage->idx >= PGMPOOL_IDX_FIRST, 4790 ("pgmPoolFlushPage: special root page, rejected. enmKind=%s idx=%d\n", 4791 pgmPoolPoolKindToStr(pPage->enmKind), pPage->idx), 4792 VINF_SUCCESS); 4793 4793 4794 4794 pgmLock(pVM); … … 4903 4903 LogFlow(("pgmPoolFreeByPage: pPage=%p:{.Key=%RHp, .idx=%d, enmKind=%s} iUser=%d iUserTable=%#x\n", 4904 4904 pPage, pPage->Core.Key, pPage->idx, pgmPoolPoolKindToStr(pPage->enmKind), iUser, iUserTable)); 4905 Assert(pPage->idx >= PGMPOOL_IDX_FIRST); 4905 AssertReturnVoid(pPage->idx >= PGMPOOL_IDX_FIRST); /* paranoia (#6349) */ 4906 4906 4907 pgmLock(pVM); 4907 4908 pgmPoolTrackFreeUser(pPool, pPage, iUser, iUserTable); -
trunk/src/VBox/VMM/VMMR3/PGMPool.cpp
r41965 r43163 285 285 /* The NIL entry. */ 286 286 Assert(NIL_PGMPOOL_IDX == 0); 287 pPool->aPages[NIL_PGMPOOL_IDX].enmKind = PGMPOOLKIND_INVALID; 287 pPool->aPages[NIL_PGMPOOL_IDX].enmKind = PGMPOOLKIND_INVALID; 288 pPool->aPages[NIL_PGMPOOL_IDX].idx = NIL_PGMPOOL_IDX; 288 289 289 290 /* The Shadow 32-bit PD. (32 bits guest paging) */ 290 pPool->aPages[PGMPOOL_IDX_PD].Core.Key = NIL_RTHCPHYS; 291 pPool->aPages[PGMPOOL_IDX_PD].GCPhys = NIL_RTGCPHYS; 292 pPool->aPages[PGMPOOL_IDX_PD].pvPageR3 = 0; 293 pPool->aPages[PGMPOOL_IDX_PD].enmKind = PGMPOOLKIND_32BIT_PD; 294 pPool->aPages[PGMPOOL_IDX_PD].idx = PGMPOOL_IDX_PD; 291 pPool->aPages[PGMPOOL_IDX_PD].enmKind = PGMPOOLKIND_32BIT_PD; 292 pPool->aPages[PGMPOOL_IDX_PD].idx = PGMPOOL_IDX_PD; 295 293 296 294 /* The Shadow PDPT. */ 297 pPool->aPages[PGMPOOL_IDX_PDPT].Core.Key = NIL_RTHCPHYS; 298 pPool->aPages[PGMPOOL_IDX_PDPT].GCPhys = NIL_RTGCPHYS; 299 pPool->aPages[PGMPOOL_IDX_PDPT].pvPageR3 = 0; 300 pPool->aPages[PGMPOOL_IDX_PDPT].enmKind = PGMPOOLKIND_PAE_PDPT; 301 pPool->aPages[PGMPOOL_IDX_PDPT].idx = PGMPOOL_IDX_PDPT; 295 pPool->aPages[PGMPOOL_IDX_PDPT].enmKind = PGMPOOLKIND_PAE_PDPT; 296 pPool->aPages[PGMPOOL_IDX_PDPT].idx = PGMPOOL_IDX_PDPT; 302 297 303 298 /* The Shadow AMD64 CR3. */ 304 pPool->aPages[PGMPOOL_IDX_AMD64_CR3].Core.Key = NIL_RTHCPHYS; 305 pPool->aPages[PGMPOOL_IDX_AMD64_CR3].GCPhys = NIL_RTGCPHYS; 306 pPool->aPages[PGMPOOL_IDX_AMD64_CR3].pvPageR3 = 0; 307 pPool->aPages[PGMPOOL_IDX_AMD64_CR3].enmKind = PGMPOOLKIND_64BIT_PML4; 308 pPool->aPages[PGMPOOL_IDX_AMD64_CR3].idx = PGMPOOL_IDX_AMD64_CR3; 299 pPool->aPages[PGMPOOL_IDX_AMD64_CR3].enmKind = PGMPOOLKIND_64BIT_PML4; 300 pPool->aPages[PGMPOOL_IDX_AMD64_CR3].idx = PGMPOOL_IDX_AMD64_CR3; 309 301 310 302 /* The Nested Paging CR3. */ 311 pPool->aPages[PGMPOOL_IDX_NESTED_ROOT].Core.Key = NIL_RTHCPHYS; 312 pPool->aPages[PGMPOOL_IDX_NESTED_ROOT].GCPhys = NIL_RTGCPHYS; 313 pPool->aPages[PGMPOOL_IDX_NESTED_ROOT].pvPageR3 = 0; 314 pPool->aPages[PGMPOOL_IDX_NESTED_ROOT].enmKind = PGMPOOLKIND_ROOT_NESTED; 315 pPool->aPages[PGMPOOL_IDX_NESTED_ROOT].idx = PGMPOOL_IDX_NESTED_ROOT; 303 pPool->aPages[PGMPOOL_IDX_NESTED_ROOT].enmKind = PGMPOOLKIND_ROOT_NESTED; 304 pPool->aPages[PGMPOOL_IDX_NESTED_ROOT].idx = PGMPOOL_IDX_NESTED_ROOT; 316 305 317 306 /* 318 307 * Set common stuff. 319 308 */ 320 for (unsigned iPage = 1; iPage < PGMPOOL_IDX_FIRST; iPage++) 321 { 309 for (unsigned iPage = 0; iPage < PGMPOOL_IDX_FIRST; iPage++) 310 { 311 pPool->aPages[iPage].Core.Key = NIL_RTHCPHYS; 312 pPool->aPages[iPage].GCPhys = NIL_RTGCPHYS; 322 313 pPool->aPages[iPage].iNext = NIL_PGMPOOL_IDX; 314 /* pPool->aPages[iPage].cLocked = INT32_MAX; - test this out... */ 315 pPool->aPages[iPage].pvPageR3 = 0; 323 316 pPool->aPages[iPage].iUserHead = NIL_PGMPOOL_USER_INDEX; 324 317 pPool->aPages[iPage].iModifiedNext = NIL_PGMPOOL_IDX; … … 328 321 pPool->aPages[iPage].iAgeNext = NIL_PGMPOOL_IDX; 329 322 pPool->aPages[iPage].iAgePrev = NIL_PGMPOOL_IDX; 323 330 324 Assert(pPool->aPages[iPage].idx == iPage); 331 325 Assert(pPool->aPages[iPage].GCPhys == NIL_RTGCPHYS); -
trunk/src/VBox/VMM/include/PGMInternal.h
r43045 r43163 2446 2446 # define PGMPOOL_PAGE_2_PTR(a_pVM, a_pPage) pgmPoolMapPageInlined((a_pVM), (a_pPage) RTLOG_COMMA_SRC_POS) 2447 2447 #elif defined(VBOX_STRICT) || 1 /* temporarily going strict here */ 2448 # define PGMPOOL_PAGE_2_PTR(a_pVM, a_pPage) pgmPoolMapPageStrict(a_pPage )2449 DECLINLINE(void *) pgmPoolMapPageStrict(PPGMPOOLPAGE a_pPage )2448 # define PGMPOOL_PAGE_2_PTR(a_pVM, a_pPage) pgmPoolMapPageStrict(a_pPage, __FUNCTION__) 2449 DECLINLINE(void *) pgmPoolMapPageStrict(PPGMPOOLPAGE a_pPage, const char *pszCaller) 2450 2450 { 2451 2451 AssertPtr(a_pPage); 2452 AssertReleaseMsg(RT_VALID_PTR(a_pPage->pvPageR3), ("enmKind=%d idx=%#x HCPhys=%RHp GCPhys=%RGp \n", a_pPage->enmKind, a_pPage->idx, a_pPage->Core.Key, a_pPage->GCPhys));2452 AssertReleaseMsg(RT_VALID_PTR(a_pPage->pvPageR3), ("enmKind=%d idx=%#x HCPhys=%RHp GCPhys=%RGp caller=%s\n", a_pPage->enmKind, a_pPage->idx, a_pPage->Core.Key, a_pPage->GCPhys, pszCaller)); 2453 2453 return a_pPage->pvPageR3; 2454 2454 } … … 3750 3750 /** Pointer to the page of the current active CR3 - RC Ptr. */ 3751 3751 RCPTRTYPE(PPGMPOOLPAGE) pShwPageCR3RC; 3752 /* The shadow page pool index of the user table as specified during allocation; useful for freeing root pages */ 3752 /** The shadow page pool index of the user table as specified during 3753 * allocation; useful for freeing root pages. */ 3753 3754 uint32_t iShwUser; 3754 /* The index into the user table (shadowed) as specified during allocation; useful for freeing root pages. */ 3755 /** The index into the user table (shadowed) as specified during allocation; 3756 * useful for freeing root pages. */ 3755 3757 uint32_t iShwUserTable; 3756 3758 # if HC_ARCH_BITS == 64
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