VirtualBox

Changeset 43387 in vbox for trunk/include/VBox/vmm


Ignore:
Timestamp:
Sep 21, 2012 9:40:25 AM (13 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
80859
Message:

VMM: HM cleanup.

Location:
trunk/include/VBox/vmm
Files:
4 edited
4 moved

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/vmm/hm.h

    r43373 r43387  
    11/** @file
    2  * HWACCM - Intel/AMD VM Hardware Support Manager (VMM)
     2 * HM - Intel/AMD VM Hardware Support Manager (VMM)
    33 */
    44
    … …  
    2424 */
    2525
    26 #ifndef ___VBox_vmm_hwaccm_h
    27 #define ___VBox_vmm_hwaccm_h
     26#ifndef ___VBox_vmm_hm_h
     27#define ___VBox_vmm_hm_h
    2828
    2929#include <VBox/vmm/pgm.h>
    3030#include <VBox/vmm/cpum.h>
     31#include <VBox/vmm/vmm.h>
    3132#include <iprt/mp.h>
    3233
    3334
    34 /** @defgroup grp_hwaccm      The VM Hardware Manager API
     35/** @defgroup grp_hm      The VM Hardware Manager API
    3536 * @{
    3637 */
    … …  
    3940
    4041/**
    41  * Query HWACCM state (enabled/disabled)
     42 * Query HM state (enabled/disabled)
    4243 *
    4344 * @returns 0 - disabled, 1 - enabled
    4445 * @param   pVM         The VM to operate on.
    4546 */
    46 #define HWACCMIsEnabled(pVM)    ((pVM)->fHWACCMEnabled)
     47#define HMIsEnabled(pVM)    ((pVM)->fHMEnabled)
    4748
    4849 /**
    … …  
    5253 * @param   pCtx        CPU context
    5354 */
    54 #define HWACCMCanEmulateIoBlock(pVCpu)     (!CPUMIsGuestInPagedProtectedMode(pVCpu))
    55 #define HWACCMCanEmulateIoBlockEx(pCtx)    (!CPUMIsGuestInPagedProtectedModeEx(pCtx))
     55#define HMCanEmulateIoBlock(pVCpu)     (!CPUMIsGuestInPagedProtectedMode(pVCpu))
     56#define HMCanEmulateIoBlockEx(pCtx)    (!CPUMIsGuestInPagedProtectedModeEx(pCtx))
    5657
    57 VMMDECL(int)            HWACCMInvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt);
    58 VMMDECL(bool)           HWACCMHasPendingIrq(PVM pVM);
     58VMMDECL(int)            HMInvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt);
     59VMMDECL(bool)           HMHasPendingIrq(PVM pVM);
    5960
    6061#ifndef IN_RC
    61 VMMDECL(int)            HWACCMFlushTLB(PVMCPU pVCpu);
    62 VMMDECL(int)            HWACCMFlushTLBOnAllVCpus(PVM pVM);
    63 VMMDECL(int)            HWACCMInvalidatePageOnAllVCpus(PVM pVM, RTGCPTR GCVirt);
    64 VMMDECL(int)            HWACCMInvalidatePhysPage(PVM pVM, RTGCPHYS GCPhys);
    65 VMMDECL(bool)           HWACCMIsNestedPagingActive(PVM pVM);
    66 VMMDECL(PGMMODE)        HWACCMGetShwPagingMode(PVM pVM);
     62VMMDECL(int)            HMFlushTLB(PVMCPU pVCpu);
     63VMMDECL(int)            HMFlushTLBOnAllVCpus(PVM pVM);
     64VMMDECL(int)            HMInvalidatePageOnAllVCpus(PVM pVM, RTGCPTR GCVirt);
     65VMMDECL(int)            HMInvalidatePhysPage(PVM pVM, RTGCPHYS GCPhys);
     66VMMDECL(bool)           HMIsNestedPagingActive(PVM pVM);
     67VMMDECL(PGMMODE)        HMGetShwPagingMode(PVM pVM);
    6768#else
    6869/* Nop in GC */
    69 # define HWACCMFlushTLB(pVCpu)                  do { } while (0)
    70 # define HWACCMIsNestedPagingActive(pVM)        false
    71 # define HWACCMFlushTLBOnAllVCpus(pVM)          do { } while (0)
     70# define HMFlushTLB(pVCpu)                  do { } while (0)
     71# define HMIsNestedPagingActive(pVM)        false
     72# define HMFlushTLBOnAllVCpus(pVM)          do { } while (0)
    7273#endif
    7374
    7475#ifdef IN_RING0
    75 /** @defgroup grp_hwaccm_r0    The VM Hardware Manager API
    76  * @ingroup grp_hwaccm
     76/** @defgroup grp_hm_r0    The VM Hardware Manager API
     77 * @ingroup grp_hm
    7778 * @{
    7879 */
    79 VMMR0DECL(int)          HWACCMR0Init(void);
    80 VMMR0DECL(int)          HWACCMR0Term(void);
    81 VMMR0DECL(int)          HWACCMR0InitVM(PVM pVM);
    82 VMMR0DECL(int)          HWACCMR0TermVM(PVM pVM);
    83 VMMR0DECL(int)          HWACCMR0EnableAllCpus(PVM pVM);
    84 VMMR0DECL(int)          HWACCMR0EnterSwitcher(PVM pVM, bool *pfVTxDisabled);
    85 VMMR0DECL(int)          HWACCMR0LeaveSwitcher(PVM pVM, bool fVTxDisabled);
     80VMMR0DECL(int)          HMR0Init(void);
     81VMMR0DECL(int)          HMR0Term(void);
     82VMMR0DECL(int)          HMR0InitVM(PVM pVM);
     83VMMR0DECL(int)          HMR0TermVM(PVM pVM);
     84VMMR0DECL(int)          HMR0EnableAllCpus(PVM pVM);
     85VMMR0DECL(int)          HMR0EnterSwitcher(PVM pVM, VMMSWITCHER enmSwitcher, bool *pfVTxDisabled);
     86VMMR0DECL(void)         HMR0LeaveSwitcher(PVM pVM, bool fVTxDisabled);
    8687
    87 VMMR0DECL(void)         HWACCMR0SavePendingIOPortWrite(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext, unsigned uPort, unsigned uAndVal, unsigned cbSize);
    88 VMMR0DECL(void)         HWACCMR0SavePendingIOPortRead(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext, unsigned uPort, unsigned uAndVal, unsigned cbSize);
     88VMMR0DECL(void)         HMR0SavePendingIOPortWrite(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext, unsigned uPort, unsigned uAndVal, unsigned cbSize);
     89VMMR0DECL(void)         HMR0SavePendingIOPortRead(PVMCPU pVCpu, RTGCPTR GCPtrRip, RTGCPTR GCPtrRipNext, unsigned uPort, unsigned uAndVal, unsigned cbSize);
    8990
    9091/** @} */
    … …  
    9394
    9495#ifdef IN_RING3
    95 /** @defgroup grp_hwaccm_r3    The VM Hardware Manager API
    96  * @ingroup grp_hwaccm
     96/** @defgroup grp_hm_r3    The VM Hardware Manager API
     97 * @ingroup grp_hm
    9798 * @{
    9899 */
    99 VMMR3DECL(bool)         HWACCMR3IsEventPending(PVMCPU pVCpu);
    100 VMMR3DECL(int)          HWACCMR3Init(PVM pVM);
    101 VMMR3_INT_DECL(int)     HWACCMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
    102 VMMR3DECL(void)         HWACCMR3Relocate(PVM pVM);
    103 VMMR3DECL(int)          HWACCMR3Term(PVM pVM);
    104 VMMR3DECL(void)         HWACCMR3Reset(PVM pVM);
    105 VMMR3DECL(void)         HWACCMR3ResetCpu(PVMCPU pVCpu);
    106 VMMR3DECL(void)         HWACCMR3CheckError(PVM pVM, int iStatusCode);
    107 VMMR3DECL(bool)         HWACCMR3CanExecuteGuest(PVM pVM, PCPUMCTX pCtx);
    108 VMMR3DECL(void)         HWACCMR3NotifyScheduled(PVMCPU pVCpu);
    109 VMMR3DECL(void)         HWACCMR3NotifyEmulated(PVMCPU pVCpu);
    110 VMMR3DECL(bool)         HWACCMR3IsActive(PVMCPU pVCpu);
    111 VMMR3DECL(bool)         HWACCMR3IsNestedPagingActive(PVM pVM);
    112 VMMR3DECL(bool)         HWACCMR3IsAllowed(PVM pVM);
    113 VMMR3DECL(void)         HWACCMR3PagingModeChanged(PVM pVM, PVMCPU pVCpu, PGMMODE enmShadowMode, PGMMODE enmGuestMode);
    114 VMMR3DECL(bool)         HWACCMR3IsVPIDActive(PVM pVM);
    115 VMMR3DECL(int)          HWACCMR3InjectNMI(PVM pVM);
    116 VMMR3DECL(int)          HWACCMR3EmulateIoBlock(PVM pVM, PCPUMCTX pCtx);
    117 VMMR3DECL(VBOXSTRICTRC) HWACCMR3RestartPendingIOInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
    118 VMMR3DECL(int)          HWACMMR3EnablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
    119 VMMR3DECL(int)          HWACMMR3DisablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
    120 VMMR3DECL(int)          HWACCMR3PatchTprInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
    121 VMMR3DECL(bool)         HWACCMR3IsRescheduleRequired(PVM pVM, PCPUMCTX pCtx);
    122 VMMR3DECL(bool)         HWACCMR3IsVmxPreemptionTimerUsed(PVM pVM);
     100VMMR3DECL(bool)         HMR3IsEventPending(PVMCPU pVCpu);
     101VMMR3DECL(int)          HMR3Init(PVM pVM);
     102VMMR3_INT_DECL(int)     HMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
     103VMMR3DECL(void)         HMR3Relocate(PVM pVM);
     104VMMR3DECL(int)          HMR3Term(PVM pVM);
     105VMMR3DECL(void)         HMR3Reset(PVM pVM);
     106VMMR3DECL(void)         HMR3ResetCpu(PVMCPU pVCpu);
     107VMMR3DECL(void)         HMR3CheckError(PVM pVM, int iStatusCode);
     108VMMR3DECL(bool)         HMR3CanExecuteGuest(PVM pVM, PCPUMCTX pCtx);
     109VMMR3DECL(void)         HMR3NotifyScheduled(PVMCPU pVCpu);
     110VMMR3DECL(void)         HMR3NotifyEmulated(PVMCPU pVCpu);
     111VMMR3DECL(bool)         HMR3IsActive(PVMCPU pVCpu);
     112VMMR3DECL(bool)         HMR3IsNestedPagingActive(PVM pVM);
     113VMMR3DECL(bool)         HMR3IsAllowed(PVM pVM);
     114VMMR3DECL(void)         HMR3PagingModeChanged(PVM pVM, PVMCPU pVCpu, PGMMODE enmShadowMode, PGMMODE enmGuestMode);
     115VMMR3DECL(bool)         HMR3IsVPIDActive(PVM pVM);
     116VMMR3DECL(int)          HMR3InjectNMI(PVM pVM);
     117VMMR3DECL(int)          HMR3EmulateIoBlock(PVM pVM, PCPUMCTX pCtx);
     118VMMR3DECL(VBOXSTRICTRC) HMR3RestartPendingIOInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
     119VMMR3DECL(int)          HMR3EnablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
     120VMMR3DECL(int)          HMR3DisablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
     121VMMR3DECL(int)          HMR3PatchTprInstr(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
     122VMMR3DECL(bool)         HMR3IsRescheduleRequired(PVM pVM, PCPUMCTX pCtx);
     123VMMR3DECL(bool)         HMR3IsVmxPreemptionTimerUsed(PVM pVM);
    123124
    124125/** @} */
    … …  
    126127
    127128#ifdef IN_RING0
    128 /** @addtogroup grp_hwaccm_r0
     129/** @addtogroup grp_hm_r0
    129130 * @{
    130131 */
    131 VMMR0DECL(int)          HWACCMR0SetupVM(PVM pVM);
    132 VMMR0DECL(int)          HWACCMR0RunGuestCode(PVM pVM, PVMCPU pVCpu);
    133 VMMR0DECL(int)          HWACCMR0Enter(PVM pVM, PVMCPU pVCpu);
    134 VMMR0DECL(int)          HWACCMR0Leave(PVM pVM, PVMCPU pVCpu);
    135 VMMR0DECL(int)          HWACCMR0InvalidatePage(PVM pVM, PVMCPU pVCpu);
    136 VMMR0DECL(int)          HWACCMR0FlushTLB(PVM pVM);
    137 VMMR0DECL(bool)         HWACCMR0SuspendPending(void);
     132VMMR0DECL(int)          HMR0SetupVM(PVM pVM);
     133VMMR0DECL(int)          HMR0RunGuestCode(PVM pVM, PVMCPU pVCpu);
     134VMMR0DECL(int)          HMR0Enter(PVM pVM, PVMCPU pVCpu);
     135VMMR0DECL(int)          HMR0Leave(PVM pVM, PVMCPU pVCpu);
     136VMMR0DECL(int)          HMR0InvalidatePage(PVM pVM, PVMCPU pVCpu);
     137VMMR0DECL(int)          HMR0FlushTLB(PVM pVM);
     138VMMR0DECL(bool)         HMR0SuspendPending(void);
    138139
    139140# if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS)
    140 VMMR0DECL(int)          HWACCMR0SaveFPUState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
    141 VMMR0DECL(int)          HWACCMR0SaveDebugState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
    142 VMMR0DECL(int)          HWACCMR0TestSwitcher3264(PVM pVM);
     141VMMR0DECL(int)          HMR0SaveFPUState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
     142VMMR0DECL(int)          HMR0SaveDebugState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
     143VMMR0DECL(int)          HMR0TestSwitcher3264(PVM pVM);
    143144# endif
    144145

  • trunk/include/VBox/vmm/hm_svm.h

    r43373 r43387  
    11/** @file
    2  * HWACCM - SVM Structures and Definitions. (VMM)
     2 * HM - SVM Structures and Definitions. (VMM)
    33 */
    44

  • trunk/include/VBox/vmm/hm_vmx.h

    r43373 r43387  
    11/** @file
    2  * HWACCM - VMX Structures and Definitions. (VMM)
     2 * HM - VMX Structures and Definitions. (VMM)
    33 */
    44

  • trunk/include/VBox/vmm/hm_vmx.mac

    r43373 r43387  
    11;; @file
    2 ; HWACCM - VMX Structures and Definitions.
     2; HM - VMX Structures and Definitions.
    33;
    44

  • trunk/include/VBox/vmm/mm.h

    r40652 r43387  
    131131    MM_TAG_VMM,
    132132
    133     MM_TAG_HWACCM,
     133    MM_TAG_HM,
    134134
    135135    MM_TAG_32BIT_HACK = 0x7fffffff

  • trunk/include/VBox/vmm/vm.h

    r42407 r43387  
    111111    RTNATIVETHREAD          hNativeThreadR0;                        /* 48 / 32 */
    112112    /** Which host CPU ID is this EMT running on.
    113      * Only valid when in RC or HWACCMR0 with scheduling disabled. */
     113     * Only valid when in RC or HMR0 with scheduling disabled. */
    114114    RTCPUID volatile        idHostCpu;                              /* 56 / 36 */
    115115
    … …  
    139139    } cpum;
    140140
    141     /** HWACCM part. */
    142     union
    143     {
    144 #ifdef ___HWACCMInternal_h
    145         struct HWACCMCPU    s;
     141    /** HM part. */
     142    union
     143    {
     144#ifdef ___HMInternal_h
     145        struct HMCPU    s;
    146146#endif
    147147        uint8_t             padding[5376];      /* multiple of 64 */
    148     } hwaccm;
     148    } hm;
    149149
    150150    /** EM part. */
    … …  
    355355#define VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL    RT_BIT_32(17)
    356356/** Check for pending TLB shootdown actions.
    357  * Consumer: HWACCM
    358  * @todo rename to VMCPU_FF_HWACCM_TLB_SHOOTDOWN  */
     357 * Consumer: HM
     358 * @todo rename to VMCPU_FF_HM_TLB_SHOOTDOWN  */
    359359#define VMCPU_FF_TLB_SHOOTDOWN              RT_BIT_32(18)
    360360/** Check for pending TLB flush action.
    361  * Consumer: HWACCM
    362  * @todo rename to VMCPU_FF_HWACCM_TLB_FLUSH  */
     361 * Consumer: HM
     362 * @todo rename to VMCPU_FF_HM_TLB_FLUSH  */
    363363#define VMCPU_FF_TLB_FLUSH                  RT_BIT_32(VMCPU_FF_TLB_FLUSH_BIT)
    364364/** The bit number for VMCPU_FF_TLB_FLUSH. */
    … …  
    425425#define VMCPU_FF_RESUME_GUEST_MASK              (VMCPU_FF_TO_R3)
    426426
    427 /** VM Flags that cause the HWACCM loops to go back to ring-3. */
    428 #define VM_FF_HWACCM_TO_R3_MASK                 (VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY | VM_FF_PDM_QUEUES | VM_FF_EMT_RENDEZVOUS)
    429 /** VMCPU Flags that cause the HWACCM loops to go back to ring-3. */
    430 #define VMCPU_FF_HWACCM_TO_R3_MASK              (VMCPU_FF_TO_R3 | VMCPU_FF_TIMER | VMCPU_FF_PDM_CRITSECT)
     427/** VM Flags that cause the HM loops to go back to ring-3. */
     428#define VM_FF_HM_TO_R3_MASK                 (VM_FF_TM_VIRTUAL_SYNC | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY | VM_FF_PDM_QUEUES | VM_FF_EMT_RENDEZVOUS)
     429/** VMCPU Flags that cause the HM loops to go back to ring-3. */
     430#define VMCPU_FF_HM_TO_R3_MASK              (VMCPU_FF_TO_R3 | VMCPU_FF_TIMER | VMCPU_FF_PDM_CRITSECT)
    431431
    432432/** All the forced VM flags. */
    … …  
    844844    /** Hardware VM support is available and enabled.
    845845     * This is placed here for performance reasons. */
    846     bool                        fHWACCMEnabled;
     846    bool                        fHMEnabled;
    847847    /** Hardware VM support is required and non-optional.
    848848     * This is initialized together with the rest of the VM structure. */
    … …  
    930930    } pgm;
    931931
    932     /** HWACCM part. */
    933     union
    934     {
    935 #ifdef ___HWACCMInternal_h
    936         struct HWACCM s;
     932    /** HM part. */
     933    union
     934    {
     935#ifdef ___HMInternal_h
     936        struct HM s;
    937937#endif
    938938        uint8_t     padding[5376];      /* multiple of 64 */
    939     } hwaccm;
     939    } hm;
    940940
    941941    /** TRPM part. */

  • trunk/include/VBox/vmm/vm.mac

    r41976 r43387  
    6161    .fPATMEnabled           resb 1
    6262    .fCSAMEnabled           resb 1
    63     .fHWACCMEnabled         resb 1
     63    .fHMEnabled         resb 1
    6464    .fHwVirtExtForced       resb 1
    6565    .fFaultTolerantMaster   resb 1
    … …  
    133133
    134134    .cpum                   resb 3584
    135     .hwaccm                 resb 5376
     135    .hm                     resb 5376
    136136    .em                     resb 1472
    137137    .iem                    resb 3072

  • trunk/include/VBox/vmm/vmapi.h

    r38838 r43387  
    310310    VMINITCOMPLETED_RING0,
    311311    /** The hardware accelerated virtualization init is completed.
    312      * Used to make decisision depending on whether HWACCMIsEnabled(). */
    313     VMINITCOMPLETED_HWACCM,
     312     * Used to make decisision depending on whether HMIsEnabled(). */
     313    VMINITCOMPLETED_HM,
    314314    /** The GC init is completed. */
    315315    VMINITCOMPLETED_GC
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