VirtualBox

Changeset 43387 in vbox for trunk/src/VBox/VMM/include


Ignore:
Timestamp:
Sep 21, 2012 9:40:25 AM (13 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
80859
Message:

VMM: HM cleanup.

Location:
trunk/src/VBox/VMM/include
Files:
4 edited
2 moved

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/include/EMHandleRCTmpl.h

    r42779 r43387  
    2020
    2121/**
    22  * Process a subset of the raw-mode and hwaccm return codes.
     22 * Process a subset of the raw-mode and hm return codes.
    2323 *
    2424 * Since we have to share this with raw-mode single stepping, this inline
    … …  
    3535#ifdef EMHANDLERC_WITH_PATM
    3636int emR3RawHandleRC(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, int rc)
    37 #elif defined(EMHANDLERC_WITH_HWACCM)
     37#elif defined(EMHANDLERC_WITH_HM)
    3838int emR3HwaccmHandleRC(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, int rc)
    3939#endif
    … …  
    219219            break;
    220220
    221 #ifdef EMHANDLERC_WITH_HWACCM
     221#ifdef EMHANDLERC_WITH_HM
    222222        /*
    223223         * (MM)IO intensive code block detected; fall back to the recompiler for better performance
    224224         */
    225225        case VINF_EM_RAW_EMULATE_IO_BLOCK:
    226             rc = HWACCMR3EmulateIoBlock(pVM, pCtx);
    227             break;
    228 
    229         case VINF_EM_HWACCM_PATCH_TPR_INSTR:
    230             rc = HWACCMR3PatchTprInstr(pVM, pVCpu, pCtx);
     226            rc = HMR3EmulateIoBlock(pVM, pCtx);
     227            break;
     228
     229        case VINF_EM_HM_PATCH_TPR_INSTR:
     230            rc = HMR3PatchTprInstr(pVM, pVCpu, pCtx);
    231231            break;
    232232#endif
    … …  
    334334            break;
    335335
    336 #ifdef EMHANDLERC_WITH_HWACCM
     336#ifdef EMHANDLERC_WITH_HM
    337337        /*
    338338         * Up a level, after HwAccM have done some release logging.
    … …  
    347347        case VERR_VMX_UNABLE_TO_START_VM:
    348348        case VERR_VMX_UNABLE_TO_RESUME_VM:
    349             HWACCMR3CheckError(pVM, rc);
     349            HMR3CheckError(pVM, rc);
    350350            break;
    351351

  • trunk/src/VBox/VMM/include/HMInternal.h

    r43373 r43387  
    1616 */
    1717
    18 #ifndef ___HWACCMInternal_h
    19 #define ___HWACCMInternal_h
     18#ifndef ___HMInternal_h
     19#define ___HMInternal_h
    2020
    2121#include <VBox/cdefs.h>
    … …  
    2424#include <VBox/vmm/stam.h>
    2525#include <VBox/dis.h>
    26 #include <VBox/vmm/hwaccm.h>
    27 #include <VBox/vmm/hwacc_vmx.h>
     26#include <VBox/vmm/hm.h>
     27#include <VBox/vmm/hm_vmx.h>
    2828#include <VBox/vmm/pgm.h>
    2929#include <VBox/vmm/cpum.h>
    … …  
    3939
    4040#define VMX_USE_CACHED_VMCS_ACCESSES
    41 #define HWACCM_VMX_EMULATE_REALMODE
     41#define HM_VMX_EMULATE_REALMODE
    4242
    4343/* The MSR auto load/store does not work for KERNEL_GS_BASE MSR, thus we
    … …  
    5252
    5353
    54 /** @defgroup grp_hwaccm_int       Internal
    55  * @ingroup grp_hwaccm
     54/** @defgroup grp_hm_int       Internal
     55 * @ingroup grp_hm
    5656 * @internal
    5757 * @{
    … …  
    6969 * @{
    7070 */
    71 #define HWACCM_CHANGED_GUEST_FPU                RT_BIT(0)
    72 #define HWACCM_CHANGED_GUEST_CR0                RT_BIT(1)
    73 #define HWACCM_CHANGED_GUEST_CR3                RT_BIT(2)
    74 #define HWACCM_CHANGED_GUEST_CR4                RT_BIT(3)
    75 #define HWACCM_CHANGED_GUEST_GDTR               RT_BIT(4)
    76 #define HWACCM_CHANGED_GUEST_IDTR               RT_BIT(5)
    77 #define HWACCM_CHANGED_GUEST_LDTR               RT_BIT(6)
    78 #define HWACCM_CHANGED_GUEST_TR                 RT_BIT(7)
    79 #define HWACCM_CHANGED_GUEST_MSR                RT_BIT(8)
    80 #define HWACCM_CHANGED_GUEST_SEGMENT_REGS       RT_BIT(9)
    81 #define HWACCM_CHANGED_GUEST_DEBUG              RT_BIT(10)
    82 #define HWACCM_CHANGED_HOST_CONTEXT             RT_BIT(11)
    83 
    84 #define HWACCM_CHANGED_ALL                  (   HWACCM_CHANGED_GUEST_SEGMENT_REGS \
    85                                             |   HWACCM_CHANGED_GUEST_CR0          \
    86                                             |   HWACCM_CHANGED_GUEST_CR3          \
    87                                             |   HWACCM_CHANGED_GUEST_CR4          \
    88                                             |   HWACCM_CHANGED_GUEST_GDTR         \
    89                                             |   HWACCM_CHANGED_GUEST_IDTR         \
    90                                             |   HWACCM_CHANGED_GUEST_LDTR         \
    91                                             |   HWACCM_CHANGED_GUEST_TR           \
    92                                             |   HWACCM_CHANGED_GUEST_MSR          \
    93                                             |   HWACCM_CHANGED_GUEST_FPU          \
    94                                             |   HWACCM_CHANGED_GUEST_DEBUG        \
    95                                             |   HWACCM_CHANGED_HOST_CONTEXT)
    96 
    97 #define HWACCM_CHANGED_ALL_GUEST            (   HWACCM_CHANGED_GUEST_SEGMENT_REGS \
    98                                             |   HWACCM_CHANGED_GUEST_CR0          \
    99                                             |   HWACCM_CHANGED_GUEST_CR3          \
    100                                             |   HWACCM_CHANGED_GUEST_CR4          \
    101                                             |   HWACCM_CHANGED_GUEST_GDTR         \
    102                                             |   HWACCM_CHANGED_GUEST_IDTR         \
    103                                             |   HWACCM_CHANGED_GUEST_LDTR         \
    104                                             |   HWACCM_CHANGED_GUEST_TR           \
    105                                             |   HWACCM_CHANGED_GUEST_MSR          \
    106                                             |   HWACCM_CHANGED_GUEST_DEBUG        \
    107                                             |   HWACCM_CHANGED_GUEST_FPU)
     71#define HM_CHANGED_GUEST_FPU                RT_BIT(0)
     72#define HM_CHANGED_GUEST_CR0                RT_BIT(1)
     73#define HM_CHANGED_GUEST_CR3                RT_BIT(2)
     74#define HM_CHANGED_GUEST_CR4                RT_BIT(3)
     75#define HM_CHANGED_GUEST_GDTR               RT_BIT(4)
     76#define HM_CHANGED_GUEST_IDTR               RT_BIT(5)
     77#define HM_CHANGED_GUEST_LDTR               RT_BIT(6)
     78#define HM_CHANGED_GUEST_TR                 RT_BIT(7)
     79#define HM_CHANGED_GUEST_MSR                RT_BIT(8)
     80#define HM_CHANGED_GUEST_SEGMENT_REGS       RT_BIT(9)
     81#define HM_CHANGED_GUEST_DEBUG              RT_BIT(10)
     82#define HM_CHANGED_HOST_CONTEXT             RT_BIT(11)
     83
     84#define HM_CHANGED_ALL                  (   HM_CHANGED_GUEST_SEGMENT_REGS \
     85                                            |   HM_CHANGED_GUEST_CR0          \
     86                                            |   HM_CHANGED_GUEST_CR3          \
     87                                            |   HM_CHANGED_GUEST_CR4          \
     88                                            |   HM_CHANGED_GUEST_GDTR         \
     89                                            |   HM_CHANGED_GUEST_IDTR         \
     90                                            |   HM_CHANGED_GUEST_LDTR         \
     91                                            |   HM_CHANGED_GUEST_TR           \
     92                                            |   HM_CHANGED_GUEST_MSR          \
     93                                            |   HM_CHANGED_GUEST_FPU          \
     94                                            |   HM_CHANGED_GUEST_DEBUG        \
     95                                            |   HM_CHANGED_HOST_CONTEXT)
     96
     97#define HM_CHANGED_ALL_GUEST            (   HM_CHANGED_GUEST_SEGMENT_REGS \
     98                                            |   HM_CHANGED_GUEST_CR0          \
     99                                            |   HM_CHANGED_GUEST_CR3          \
     100                                            |   HM_CHANGED_GUEST_CR4          \
     101                                            |   HM_CHANGED_GUEST_GDTR         \
     102                                            |   HM_CHANGED_GUEST_IDTR         \
     103                                            |   HM_CHANGED_GUEST_LDTR         \
     104                                            |   HM_CHANGED_GUEST_TR           \
     105                                            |   HM_CHANGED_GUEST_MSR          \
     106                                            |   HM_CHANGED_GUEST_DEBUG        \
     107                                            |   HM_CHANGED_GUEST_FPU)
    108108
    109109/** @} */
    110110
    111111/** Maximum number of page flushes we are willing to remember before considering a full TLB flush. */
    112 #define HWACCM_MAX_TLB_SHOOTDOWN_PAGES      8
     112#define HM_MAX_TLB_SHOOTDOWN_PAGES      8
    113113
    114114/** Size for the EPT identity page table (1024 4 MB pages to cover the entire address space). */
    115 #define HWACCM_EPT_IDENTITY_PG_TABLE_SIZE   PAGE_SIZE
     115#define HM_EPT_IDENTITY_PG_TABLE_SIZE   PAGE_SIZE
    116116/** Size of the TSS structure + 2 pages for the IO bitmap + end byte. */
    117 #define HWACCM_VTX_TSS_SIZE                 (sizeof(VBOXTSS) + 2*PAGE_SIZE + 1)
     117#define HM_VTX_TSS_SIZE                 (sizeof(VBOXTSS) + 2*PAGE_SIZE + 1)
    118118/** Total guest mapped memory needed. */
    119 #define HWACCM_VTX_TOTAL_DEVHEAP_MEM        (HWACCM_EPT_IDENTITY_PG_TABLE_SIZE + HWACCM_VTX_TSS_SIZE)
     119#define HM_VTX_TOTAL_DEVHEAP_MEM        (HM_EPT_IDENTITY_PG_TABLE_SIZE + HM_VTX_TSS_SIZE)
    120120
    121121/** Enable for TPR guest patching. */
    122 #define VBOX_HWACCM_WITH_GUEST_PATCHING
    123 
    124 /** HWACCM SSM version
    125  */
    126 #ifdef VBOX_HWACCM_WITH_GUEST_PATCHING
    127 # define HWACCM_SSM_VERSION                 5
    128 # define HWACCM_SSM_VERSION_NO_PATCHING     4
     122#define VBOX_HM_WITH_GUEST_PATCHING
     123
     124/** HM SSM version
     125 */
     126#ifdef VBOX_HM_WITH_GUEST_PATCHING
     127# define HM_SSM_VERSION                 5
     128# define HM_SSM_VERSION_NO_PATCHING     4
    129129#else
    130 # define HWACCM_SSM_VERSION                 4
    131 # define HWACCM_SSM_VERSION_NO_PATCHING     4
    132 #endif
    133 #define HWACCM_SSM_VERSION_2_0_X            3
     130# define HM_SSM_VERSION                 4
     131# define HM_SSM_VERSION_NO_PATCHING     4
     132#endif
     133#define HM_SSM_VERSION_2_0_X            3
    134134
    135135/**
    … …  
    160160typedef enum
    161161{
    162     HWACCMPENDINGIO_INVALID = 0,
    163     HWACCMPENDINGIO_PORT_READ,
    164     HWACCMPENDINGIO_PORT_WRITE,
    165     HWACCMPENDINGIO_STRING_READ,
    166     HWACCMPENDINGIO_STRING_WRITE,
     162    HMPENDINGIO_INVALID = 0,
     163    HMPENDINGIO_PORT_READ,
     164    HMPENDINGIO_PORT_WRITE,
     165    HMPENDINGIO_STRING_READ,
     166    HMPENDINGIO_STRING_WRITE,
    167167    /** The usual 32-bit paranoia. */
    168     HWACCMPENDINGIO_32BIT_HACK   = 0x7fffffff
    169 } HWACCMPENDINGIO;
     168    HMPENDINGIO_32BIT_HACK   = 0x7fffffff
     169} HMPENDINGIO;
    170170
    171171
    172172typedef enum
    173173{
    174     HWACCMTPRINSTR_INVALID,
    175     HWACCMTPRINSTR_READ,
    176     HWACCMTPRINSTR_READ_SHR4,
    177     HWACCMTPRINSTR_WRITE_REG,
    178     HWACCMTPRINSTR_WRITE_IMM,
    179     HWACCMTPRINSTR_JUMP_REPLACEMENT,
     174    HMTPRINSTR_INVALID,
     175    HMTPRINSTR_READ,
     176    HMTPRINSTR_READ_SHR4,
     177    HMTPRINSTR_WRITE_REG,
     178    HMTPRINSTR_WRITE_IMM,
     179    HMTPRINSTR_JUMP_REPLACEMENT,
    180180    /** The usual 32-bit paranoia. */
    181     HWACCMTPRINSTR_32BIT_HACK   = 0x7fffffff
    182 } HWACCMTPRINSTR;
     181    HMTPRINSTR_32BIT_HACK   = 0x7fffffff
     182} HMTPRINSTR;
    183183
    184184typedef struct
    … …  
    195195    uint32_t                cbNewOp;
    196196    /** Instruction type. */
    197     HWACCMTPRINSTR          enmType;
     197    HMTPRINSTR          enmType;
    198198    /** Source operand. */
    199199    uint32_t                uSrcOperand;
    … …  
    204204    /** Patch address of the jump replacement. */
    205205    RTGCPTR32               pJumpTarget;
    206 } HWACCMTPRPATCH;
    207 /** Pointer to HWACCMTPRPATCH. */
    208 typedef HWACCMTPRPATCH *PHWACCMTPRPATCH;
     206} HMTPRPATCH;
     207/** Pointer to HMTPRPATCH. */
     208typedef HMTPRPATCH *PHMTPRPATCH;
    209209
    210210/**
    … …  
    215215 * @returns Return code indicating the action to take.
    216216 */
    217 typedef DECLCALLBACK (int) FNHWACCMSWITCHERHC(PVM pVM, uint32_t uOffsetVMCPU);
     217typedef DECLCALLBACK (int) FNHMSWITCHERHC(PVM pVM, uint32_t uOffsetVMCPU);
    218218/** Pointer to switcher function. */
    219 typedef FNHWACCMSWITCHERHC *PFNHWACCMSWITCHERHC;
     219typedef FNHMSWITCHERHC *PFNHMSWITCHERHC;
    220220
    221221/**
    222  * HWACCM VM Instance data.
    223  * Changes to this must checked against the padding of the hwaccm union in VM!
    224  */
    225 typedef struct HWACCM
     222 * HM VM Instance data.
     223 * Changes to this must checked against the padding of the hm union in VM!
     224 */
     225typedef struct HM
    226226{
    227227    /** Set when we've initialized VMX or SVM. */
    … …  
    276276#if HC_ARCH_BITS == 32 && defined(VBOX_ENABLE_64_BITS_GUESTS) && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL)
    277277    /** 32 to 64 bits switcher entrypoint. */
    278     R0PTRTYPE(PFNHWACCMSWITCHERHC) pfnHost32ToGuest64R0;
     278    R0PTRTYPE(PFNHMSWITCHERHC) pfnHost32ToGuest64R0;
    279279
    280280    /* AMD-V 64 bits vmrun handler */
    … …  
    300300    struct
    301301    {
    302         /** Set by the ring-0 side of HWACCM to indicate VMX is supported by the
     302        /** Set by the ring-0 side of HM to indicate VMX is supported by the
    303303         *  CPU. */
    304304        bool                        fSupported;
    … …  
    400400    struct
    401401    {
    402         /** Set by the ring-0 side of HWACCM to indicate SVM is supported by the
     402        /** Set by the ring-0 side of HM to indicate SVM is supported by the
    403403         *  CPU. */
    404404        bool                        fSupported;
    … …  
    432432    AVLOU32TREE                     PatchTree;
    433433    uint32_t                        cPatches;
    434     HWACCMTPRPATCH                  aPatches[64];
     434    HMTPRPATCH                  aPatches[64];
    435435
    436436    struct
    … …  
    443443    int32_t                 lLastError;
    444444
    445     /** HWACCMR0Init was run */
    446     bool                    fHWACCMR0Init;
     445    /** HMR0Init was run */
     446    bool                    fHMR0Init;
    447447    bool                    u8Alignment1[7];
    448448
    … …  
    451451    STAMCOUNTER             StatTPRReplaceSuccess;
    452452    STAMCOUNTER             StatTPRReplaceFailure;
    453 } HWACCM;
    454 /** Pointer to HWACCM VM instance data. */
    455 typedef HWACCM *PHWACCM;
     453} HM;
     454/** Pointer to HM VM instance data. */
     455typedef HM *PHM;
    456456
    457457/* Maximum number of cached entries. */
    … …  
    518518
    519519/** VMX StartVM function. */
    520 typedef DECLCALLBACK(int) FNHWACCMVMXSTARTVM(RTHCUINT fResume, PCPUMCTX pCtx, PVMCSCACHE pCache, PVM pVM, PVMCPU pVCpu);
     520typedef DECLCALLBACK(int) FNHMVMXSTARTVM(RTHCUINT fResume, PCPUMCTX pCtx, PVMCSCACHE pCache, PVM pVM, PVMCPU pVCpu);
    521521/** Pointer to a VMX StartVM function. */
    522 typedef R0PTRTYPE(FNHWACCMVMXSTARTVM *) PFNHWACCMVMXSTARTVM;
     522typedef R0PTRTYPE(FNHMVMXSTARTVM *) PFNHMVMXSTARTVM;
    523523
    524524/** SVM VMRun function. */
    525 typedef DECLCALLBACK(int) FNHWACCMSVMVMRUN(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVM pVM, PVMCPU pVCpu);
     525typedef DECLCALLBACK(int) FNHMSVMVMRUN(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVM pVM, PVMCPU pVCpu);
    526526/** Pointer to a SVM VMRun function. */
    527 typedef R0PTRTYPE(FNHWACCMSVMVMRUN *) PFNHWACCMSVMVMRUN;
     527typedef R0PTRTYPE(FNHMSVMVMRUN *) PFNHMSVMVMRUN;
    528528
    529529/**
    530  * HWACCM VMCPU Instance data.
    531  */
    532 typedef struct HWACCMCPU
     530 * HM VMCPU Instance data.
     531 */
     532typedef struct HMCPU
    533533{
    534534    /** Old style FPU reporting trap mask override performed (optimization) */
    … …  
    551551    volatile uint32_t           cWorldSwitchExits;
    552552
    553     /** HWACCM_CHANGED_* flags. */
     553    /** HM_CHANGED_* flags. */
    554554    uint32_t                    fContextUseFlags;
    555555
    … …  
    578578
    579579        /** Ring 0 handlers for VT-x. */
    580         PFNHWACCMVMXSTARTVM         pfnStartVM;
     580        PFNHMVMXSTARTVM         pfnStartVM;
    581581
    582582#if HC_ARCH_BITS == 32
    … …  
    658658        /** The last seen guest paging mode (by VT-x). */
    659659        PGMMODE                     enmLastSeenGuestMode;
    660         /** Current guest paging mode (as seen by HWACCMR3PagingModeChanged). */
     660        /** Current guest paging mode (as seen by HMR3PagingModeChanged). */
    661661        PGMMODE                     enmCurrGuestMode;
    662         /** Previous guest paging mode (as seen by HWACCMR3PagingModeChanged). */
     662        /** Previous guest paging mode (as seen by HMR3PagingModeChanged). */
    663663        PGMMODE                     enmPrevGuestMode;
    664664    } vmx;
    … …  
    681681
    682682        /** Ring 0 handlers for VT-x. */
    683         PFNHWACCMSVMVMRUN           pfnVMRun;
     683        PFNHMSVMVMRUN           pfnVMRun;
    684684
    685685        /** R0 memory object for the MSR bitmap (8kb). */
    … …  
    714714    {
    715715        /* Pending IO operation type. */
    716         HWACCMPENDINGIO         enmType;
     716        HMPENDINGIO         enmType;
    717717        uint32_t                uPadding;
    718718        RTGCPTR                 GCPtrRip;
    … …  
    734734
    735735    /** The CPU ID of the CPU currently owning the VMCS. Set in
    736      * HWACCMR0Enter and cleared in HWACCMR0Leave. */
     736     * HMR0Enter and cleared in HMR0Leave. */
    737737    RTCPUID                 idEnteredCpu;
    738738
    … …  
    740740    struct
    741741    {
    742         RTGCPTR             aPages[HWACCM_MAX_TLB_SHOOTDOWN_PAGES];
     742        RTGCPTR             aPages[HM_MAX_TLB_SHOOTDOWN_PAGES];
    743743        unsigned            cPages;
    744744    } TlbShootdown;
    … …  
    858858    R0PTRTYPE(PSTAMCOUNTER) paStatInjectedIrqsR0;
    859859#endif
    860 } HWACCMCPU;
    861 /** Pointer to HWACCM VM instance data. */
    862 typedef HWACCMCPU *PHWACCMCPU;
     860} HMCPU;
     861/** Pointer to HM VM instance data. */
     862typedef HMCPU *PHMCPU;
    863863
    864864
    865865#ifdef IN_RING0
    866866
    867 VMMR0DECL(PHMGLOBLCPUINFO) HWACCMR0GetCurrentCpu(void);
    868 VMMR0DECL(PHMGLOBLCPUINFO) HWACCMR0GetCurrentCpuEx(RTCPUID idCpu);
     867VMMR0DECL(PHMGLOBLCPUINFO) HMR0GetCurrentCpu(void);
     868VMMR0DECL(PHMGLOBLCPUINFO) HMR0GetCurrentCpuEx(RTCPUID idCpu);
    869869
    870870
    871871#ifdef VBOX_STRICT
    872 VMMR0DECL(void) HWACCMDumpRegs(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
    873 VMMR0DECL(void) HWACCMR0DumpDescriptor(PCX86DESCHC pDesc, RTSEL Sel, const char *pszMsg);
     872VMMR0DECL(void) HMDumpRegs(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
     873VMMR0DECL(void) HMR0DumpDescriptor(PCX86DESCHC pDesc, RTSEL Sel, const char *pszMsg);
    874874#else
    875 # define HWACCMDumpRegs(a, b ,c)            do { } while (0)
    876 # define HWACCMR0DumpDescriptor(a, b, c)    do { } while (0)
     875# define HMDumpRegs(a, b ,c)            do { } while (0)
     876# define HMR0DumpDescriptor(a, b, c)    do { } while (0)
    877877#endif
    878878
    879879# ifdef VBOX_WITH_KERNEL_USING_XMM
    880 DECLASM(int)   hwaccmR0VMXStartVMWrapXMM(RTHCUINT fResume, PCPUMCTX pCtx, PVMCSCACHE pCache, PVM pVM, PVMCPU pVCpu, PFNHWACCMVMXSTARTVM pfnStartVM);
    881 DECLASM(int)   hwaccmR0SVMRunWrapXMM(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVM pVM, PVMCPU pVCpu, PFNHWACCMSVMVMRUN pfnVMRun);
     880DECLASM(int)   hmR0VMXStartVMWrapXMM(RTHCUINT fResume, PCPUMCTX pCtx, PVMCSCACHE pCache, PVM pVM, PVMCPU pVCpu, PFNHMVMXSTARTVM pfnStartVM);
     881DECLASM(int)   hmR0SVMRunWrapXMM(RTHCPHYS pVMCBHostPhys, RTHCPHYS pVMCBPhys, PCPUMCTX pCtx, PVM pVM, PVMCPU pVCpu, PFNHMSVMVMRUN pfnVMRun);
    882882# endif
    883883
    … …  
    888888 * @param  pIdtr        Where to store the 64-bit IDTR.
    889889 */
    890 DECLASM(void) hwaccmR0Get64bitGDTRandIDTR(PX86XDTR64 pGdtr, PX86XDTR64 pIdtr);
     890DECLASM(void) hmR0Get64bitGDTRandIDTR(PX86XDTR64 pGdtr, PX86XDTR64 pIdtr);
    891891
    892892/**
    … …  
    894894 * @returns CR3
    895895 */
    896 DECLASM(uint64_t) hwaccmR0Get64bitCR3(void);
     896DECLASM(uint64_t) hmR0Get64bitCR3(void);
    897897# endif
    898898

  • trunk/src/VBox/VMM/include/HMInternal.mac

    r43373 r43387  
    11;$Id$
    22;; @file
    3 ; HWACCM - Internal header file.
     3; HM - Internal header file.
    44;
    55;

  • trunk/src/VBox/VMM/include/PGMInline.h

    r43303 r43387  
    3232#include <VBox/log.h>
    3333#include <VBox/vmm/gmm.h>
    34 #include <VBox/vmm/hwaccm.h>
     34#include <VBox/vmm/hm.h>
    3535#include <iprt/asm.h>
    3636#include <iprt/assert.h>

  • trunk/src/VBox/VMM/include/PGMInternal.h

    r43302 r43387  
    3333#include <VBox/log.h>
    3434#include <VBox/vmm/gmm.h>
    35 #include <VBox/vmm/hwaccm.h>
    36 #include <VBox/vmm/hwacc_vmx.h>
     35#include <VBox/vmm/hm.h>
     36#include <VBox/vmm/hm_vmx.h>
    3737#include "internal/pgm.h"
    3838#include <iprt/asm.h>
    … …  
    348348# define PGM_INVL_PG(pVCpu, GCVirt)             ASMInvalidatePage((void *)(uintptr_t)(GCVirt))
    349349#elif defined(IN_RING0)
    350 # define PGM_INVL_PG(pVCpu, GCVirt)             HWACCMInvalidatePage(pVCpu, (RTGCPTR)(GCVirt))
     350# define PGM_INVL_PG(pVCpu, GCVirt)             HMInvalidatePage(pVCpu, (RTGCPTR)(GCVirt))
    351351#else
    352 # define PGM_INVL_PG(pVCpu, GCVirt)             HWACCMInvalidatePage(pVCpu, (RTGCPTR)(GCVirt))
     352# define PGM_INVL_PG(pVCpu, GCVirt)             HMInvalidatePage(pVCpu, (RTGCPTR)(GCVirt))
    353353#endif
    354354
    … …  
    362362# define PGM_INVL_PG_ALL_VCPU(pVM, GCVirt)      ASMInvalidatePage((void *)(uintptr_t)(GCVirt))
    363363#elif defined(IN_RING0)
    364 # define PGM_INVL_PG_ALL_VCPU(pVM, GCVirt)      HWACCMInvalidatePageOnAllVCpus(pVM, (RTGCPTR)(GCVirt))
     364# define PGM_INVL_PG_ALL_VCPU(pVM, GCVirt)      HMInvalidatePageOnAllVCpus(pVM, (RTGCPTR)(GCVirt))
    365365#else
    366 # define PGM_INVL_PG_ALL_VCPU(pVM, GCVirt)      HWACCMInvalidatePageOnAllVCpus(pVM, (RTGCPTR)(GCVirt))
     366# define PGM_INVL_PG_ALL_VCPU(pVM, GCVirt)      HMInvalidatePageOnAllVCpus(pVM, (RTGCPTR)(GCVirt))
    367367#endif
    368368
    … …  
    376376# define PGM_INVL_BIG_PG(pVCpu, GCVirt)         ASMReloadCR3()
    377377#elif defined(IN_RING0)
    378 # define PGM_INVL_BIG_PG(pVCpu, GCVirt)         HWACCMFlushTLB(pVCpu)
     378# define PGM_INVL_BIG_PG(pVCpu, GCVirt)         HMFlushTLB(pVCpu)
    379379#else
    380 # define PGM_INVL_BIG_PG(pVCpu, GCVirt)         HWACCMFlushTLB(pVCpu)
     380# define PGM_INVL_BIG_PG(pVCpu, GCVirt)         HMFlushTLB(pVCpu)
    381381#endif
    382382
    … …  
    389389# define PGM_INVL_VCPU_TLBS(pVCpu)             ASMReloadCR3()
    390390#elif defined(IN_RING0)
    391 # define PGM_INVL_VCPU_TLBS(pVCpu)             HWACCMFlushTLB(pVCpu)
     391# define PGM_INVL_VCPU_TLBS(pVCpu)             HMFlushTLB(pVCpu)
    392392#else
    393 # define PGM_INVL_VCPU_TLBS(pVCpu)             HWACCMFlushTLB(pVCpu)
     393# define PGM_INVL_VCPU_TLBS(pVCpu)             HMFlushTLB(pVCpu)
    394394#endif
    395395
    … …  
    402402# define PGM_INVL_ALL_VCPU_TLBS(pVM)            ASMReloadCR3()
    403403#elif defined(IN_RING0)
    404 # define PGM_INVL_ALL_VCPU_TLBS(pVM)            HWACCMFlushTLBOnAllVCpus(pVM)
     404# define PGM_INVL_ALL_VCPU_TLBS(pVM)            HMFlushTLBOnAllVCpus(pVM)
    405405#else
    406 # define PGM_INVL_ALL_VCPU_TLBS(pVM)            HWACCMFlushTLBOnAllVCpus(pVM)
     406# define PGM_INVL_ALL_VCPU_TLBS(pVM)            HMFlushTLBOnAllVCpus(pVM)
    407407#endif
    408408
    … …  
    30243024    bool                            fLessThan52PhysicalAddressBits;
    30253025    /** Set when nested paging is active.
    3026      * This is meant to save calls to HWACCMIsNestedPagingActive and let the
     3026     * This is meant to save calls to HMIsNestedPagingActive and let the
    30273027     * compilers optimize the code better.  Whether we use nested paging or
    30283028     * not is something we find out during VMM initialization and we won't

  • trunk/src/VBox/VMM/include/VMMInternal.h

    r41976 r43387  
    507507    VMMGC_DO_TESTCASE_INTERRUPT_MASKING,
    508508    /** Switching testing and profiling stub. */
    509     VMMGC_DO_TESTCASE_HWACCM_NOP,
     509    VMMGC_DO_TESTCASE_HM_NOP,
    510510
    511511    /** The usual 32-bit hack. */
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