Changeset 43432 in vbox
- Timestamp:
- Sep 26, 2012 7:05:20 AM (12 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Network/DevE1000.cpp
r43416 r43432 114 114 * in the state structure. It limits the amount of descriptors loaded in one 115 115 * batch read. For example, Linux guest may use up to 20 descriptors per 116 * TSE packet. 117 */ 118 #define E1K_TXD_CACHE_SIZE 32u116 * TSE packet. The largest TSE packet seen (Windows guest) was 45 descriptors. 117 */ 118 #define E1K_TXD_CACHE_SIZE 64u 119 119 #endif /* E1K_WITH_TXD_CACHE */ 120 120 … … 1745 1745 unsigned uLevel = RTLOGGRPFLAGS_LEVEL_2) 1746 1746 { 1747 /* 1748 * Unfortunately we cannot use our format handler here, we want R0 logging 1749 * as well. 1750 */ 1747 1751 switch (e1kGetDescType(pDesc)) 1748 1752 { … … 4896 4900 E1kLog3(("%s About to process new TX descriptor at %08x%08x, TDLEN=%08x, TDH=%08x, TDT=%08x\n", 4897 4901 INSTANCE(pState), TDBAH, TDBAL + TDH * sizeof(E1KTXDESC), TDLEN, TDH, TDT)); 4898 rc = e1kXmitDesc(pState, pDesc, 4899 ((uint64_t)TDBAH << 32) + TDBAL + TDH * sizeof(E1KTXDESC), 4900 fOnWorkerThread); 4902 rc = e1kXmitDesc(pState, pDesc, e1kDescAddr(TDBAH, TDBAL, TDH), fOnWorkerThread); 4901 4903 if (RT_FAILURE(rc)) 4902 4904 break; … … 4964 4966 4965 4967 e1kLoadDesc(pState, &desc, ((uint64_t)TDBAH << 32) + TDBAL + TDH * sizeof(desc)); 4966 rc = e1kXmitDesc(pState, &desc, ((uint64_t)TDBAH << 32) + TDBAL + TDH * sizeof(desc), fOnWorkerThread);4968 rc = e1kXmitDesc(pState, &desc, e1kDescAddr(TDBAH, TDBAL, TDH), fOnWorkerThread); 4967 4969 /* If we failed to transmit descriptor we will try it again later */ 4968 4970 if (RT_FAILURE(rc)) … … 4996 4998 static void e1kDumpTxDCache(E1KSTATE *pState) 4997 4999 { 4998 for (int i = 0; i < pState->nTxDFetched; ++i) 4999 e1kPrintTDesc(pState, &pState->aTxDescriptors[i], "***", RTLOGGRPFLAGS_LEVEL_4); 5000 unsigned i, cDescs = TDLEN / sizeof(E1KTXDESC); 5001 uint32_t tdh = TDH; 5002 LogRel(("-- Transmit Descriptors (%d total) --\n", cDescs)); 5003 for (i = 0; i < cDescs; ++i) 5004 { 5005 E1KTXDESC desc; 5006 PDMDevHlpPhysRead(pState->CTX_SUFF(pDevIns), e1kDescAddr(TDBAH, TDBAL, i), 5007 &desc, sizeof(desc)); 5008 if (i == tdh) 5009 LogRel((">>> ")); 5010 LogRel(("%RGp: %R[e1ktxd]\n", e1kDescAddr(TDBAH, TDBAL, i), &desc)); 5011 } 5012 LogRel(("-- Transmit Descriptors in Cache (at %d (TDH %d)/ fetched %d / max %d) --\n", 5013 pState->iTxDCurrent, TDH, pState->nTxDFetched, E1K_TXD_CACHE_SIZE)); 5014 if (tdh > pState->iTxDCurrent) 5015 tdh -= pState->iTxDCurrent; 5016 else 5017 tdh = cDescs + tdh - pState->iTxDCurrent; 5018 for (i = 0; i < pState->nTxDFetched; ++i) 5019 { 5020 if (i == pState->iTxDCurrent) 5021 LogRel((">>> ")); 5022 LogRel(("%RGp: %R[e1ktxd]\n", e1kDescAddr(TDBAH, TDBAL, tdh++ % cDescs), &pState->aTxDescriptors[i])); 5023 } 5000 5024 } 5001 5025 … … 5060 5084 if (RT_UNLIKELY(fIncomplete)) 5061 5085 { 5086 static bool fTxDCacheDumped = false; 5062 5087 /* 5063 5088 * The descriptor cache is full, but we were unable to find … … 5071 5096 pState->nTxDFetched, pState->iTxDCurrent, 5072 5097 e1kGetTxLen(pState))); 5073 Log4(("%s No complete packets in%s TxD cache! " 5074 "Fetched=%d, current=%d, TX len=%d. Dump follows:\n", 5075 INSTANCE(pState), 5076 u8Remain == E1K_TXD_CACHE_SIZE ? " full" : "", 5077 pState->nTxDFetched, pState->iTxDCurrent, 5078 e1kGetTxLen(pState))); 5079 e1kDumpTxDCache(pState); 5098 if (!fTxDCacheDumped) 5099 { 5100 fTxDCacheDumped = true; 5101 e1kDumpTxDCache(pState); 5102 } 5080 5103 pState->iTxDCurrent = pState->nTxDFetched = 0; 5104 /* 5105 * Returning an error at this point means Guru in R0 5106 * (see @bugref{6428}). 5107 */ 5108 # ifdef IN_RING3 5081 5109 rc = VERR_NET_INCOMPLETE_TX_PACKET; 5110 # else /* !IN_RING3 */ 5111 rc = VINF_IOM_R3_IOPORT_WRITE; 5112 # endif /* !IN_RING3 */ 5082 5113 goto out; 5083 5114 } … … 6500 6531 SSMR3PutU16(pSSM, pState->u16VTagTCI); 6501 6532 #ifdef E1K_WITH_TXD_CACHE 6533 #if 0 6502 6534 SSMR3PutU8(pSSM, pState->nTxDFetched); 6503 6535 SSMR3PutMem(pSSM, pState->aTxDescriptors, 6504 6536 pState->nTxDFetched * sizeof(pState->aTxDescriptors[0])); 6537 #else 6538 /* 6539 * There is no point in storing TX descriptor cache entries as we can simply 6540 * fetch them again. Moreover, normally the cache is always empty when we 6541 * save the state. Store zero entries for compatibility. 6542 */ 6543 SSMR3PutU8(pSSM, 0); 6544 #endif 6505 6545 #endif /* E1K_WITH_TXD_CACHE */ 6506 6546 /**@todo GSO requires some more state here. */ … … 6632 6672 rc = SSMR3GetU8(pSSM, &pState->nTxDFetched); 6633 6673 AssertRCReturn(rc, rc); 6634 SSMR3GetMem(pSSM, pState->aTxDescriptors, 6635 pState->nTxDFetched * sizeof(pState->aTxDescriptors[0])); 6674 if (pState->nTxDFetched) 6675 SSMR3GetMem(pSSM, pState->aTxDescriptors, 6676 pState->nTxDFetched * sizeof(pState->aTxDescriptors[0])); 6636 6677 } 6637 6678 else … … 6918 6959 6919 6960 /** 6920 * Dump receive descriptor to debugger info buffer. 6921 * 6922 * @param pState The device state structure. 6923 * @param pHlp The output helpers. 6924 * @param addr Physical address of the descriptor in guest context. 6925 * @param pDesc Pointer to the descriptor. 6926 */ 6927 static void e1kRDescInfo(E1KSTATE* pState, PCDBGFINFOHLP pHlp, RTGCPHYS addr, E1KRXDESC* pDesc) 6928 { 6929 pHlp->pfnPrintf(pHlp, "%RGp: Address=%16LX Length=%04X Csum=%04X\n", 6930 addr, pDesc->u64BufAddr, pDesc->u16Length, pDesc->u16Checksum); 6931 pHlp->pfnPrintf(pHlp, " STA: %s %s %s %s %s %s %s ERR: %s %s %s %s SPECIAL: %s VLAN=%03x PRI=%x\n", 6932 pDesc->status.fPIF ? "PIF" : "pif", 6933 pDesc->status.fIPCS ? "IPCS" : "ipcs", 6934 pDesc->status.fTCPCS ? "TCPCS" : "tcpcs", 6935 pDesc->status.fVP ? "VP" : "vp", 6936 pDesc->status.fIXSM ? "IXSM" : "ixsm", 6937 pDesc->status.fEOP ? "EOP" : "eop", 6938 pDesc->status.fDD ? "DD" : "dd", 6939 pDesc->status.fRXE ? "RXE" : "rxe", 6940 pDesc->status.fIPE ? "IPE" : "ipe", 6941 pDesc->status.fTCPE ? "TCPE" : "tcpe", 6942 pDesc->status.fCE ? "CE" : "ce", 6943 E1K_SPEC_CFI(pDesc->status.u16Special) ? "CFI" :"cfi", 6944 E1K_SPEC_VLAN(pDesc->status.u16Special), 6945 E1K_SPEC_PRI(pDesc->status.u16Special)); 6946 } 6947 6948 /** 6949 * Dump transmit descriptor to debugger info buffer. 6950 * 6951 * @param pState The device state structure. 6952 * @param pHlp The output helpers. 6953 * @param addr Physical address of the descriptor in guest context. 6954 * @param pDesc Pointer to descriptor union. 6955 */ 6956 static void e1kTDescInfo(E1KSTATE* pState, PCDBGFINFOHLP pHlp, RTGCPHYS addr, E1KTXDESC* pDesc) 6957 { 6961 * @copydoc FNRTSTRFORMATTYPE 6962 */ 6963 static DECLCALLBACK(size_t) e1kFmtRxDesc(PFNRTSTROUTPUT pfnOutput, 6964 void *pvArgOutput, 6965 const char *pszType, 6966 void const *pvValue, 6967 int cchWidth, 6968 int cchPrecision, 6969 unsigned fFlags, 6970 void *pvUser) 6971 { 6972 AssertReturn(strcmp(pszType, "e1krxd") == 0, 0); 6973 E1KRXDESC* pDesc = (E1KRXDESC*)pvValue; 6974 if (!pDesc) 6975 return RTStrFormat(pfnOutput, pvArgOutput, NULL, 0, "NULL_RXD"); 6976 6977 size_t cbPrintf = 0; 6978 cbPrintf += RTStrFormat(pfnOutput, pvArgOutput, NULL, 0, "Address=%16LX Length=%04X Csum=%04X\n", 6979 pDesc->u64BufAddr, pDesc->u16Length, pDesc->u16Checksum); 6980 cbPrintf += RTStrFormat(pfnOutput, pvArgOutput, NULL, 0, " STA: %s %s %s %s %s %s %s ERR: %s %s %s %s SPECIAL: %s VLAN=%03x PRI=%x", 6981 pDesc->status.fPIF ? "PIF" : "pif", 6982 pDesc->status.fIPCS ? "IPCS" : "ipcs", 6983 pDesc->status.fTCPCS ? "TCPCS" : "tcpcs", 6984 pDesc->status.fVP ? "VP" : "vp", 6985 pDesc->status.fIXSM ? "IXSM" : "ixsm", 6986 pDesc->status.fEOP ? "EOP" : "eop", 6987 pDesc->status.fDD ? "DD" : "dd", 6988 pDesc->status.fRXE ? "RXE" : "rxe", 6989 pDesc->status.fIPE ? "IPE" : "ipe", 6990 pDesc->status.fTCPE ? "TCPE" : "tcpe", 6991 pDesc->status.fCE ? "CE" : "ce", 6992 E1K_SPEC_CFI(pDesc->status.u16Special) ? "CFI" :"cfi", 6993 E1K_SPEC_VLAN(pDesc->status.u16Special), 6994 E1K_SPEC_PRI(pDesc->status.u16Special)); 6995 return cbPrintf; 6996 } 6997 6998 /** 6999 * @copydoc FNRTSTRFORMATTYPE 7000 */ 7001 static DECLCALLBACK(size_t) e1kFmtTxDesc(PFNRTSTROUTPUT pfnOutput, 7002 void *pvArgOutput, 7003 const char *pszType, 7004 void const *pvValue, 7005 int cchWidth, 7006 int cchPrecision, 7007 unsigned fFlags, 7008 void *pvUser) 7009 { 7010 AssertReturn(strcmp(pszType, "e1ktxd") == 0, 0); 7011 E1KTXDESC* pDesc = (E1KTXDESC*)pvValue; 7012 if (!pDesc) 7013 return RTStrFormat(pfnOutput, pvArgOutput, NULL, 0, "NULL_TXD"); 7014 7015 size_t cbPrintf = 0; 6958 7016 switch (e1kGetDescType(pDesc)) 6959 7017 { 6960 7018 case E1K_DTYP_CONTEXT: 6961 pHlp->pfnPrintf(pHlp, "%RGp: Type=Context\n", addr);6962 pHlp->pfnPrintf(pHlp, " IPCSS=%02X IPCSO=%02X IPCSE=%04X TUCSS=%02X TUCSO=%02X TUCSE=%04X\n",6963 pDesc->context.ip.u8CSS, pDesc->context.ip.u8CSO, pDesc->context.ip.u16CSE,6964 pDesc->context.tu.u8CSS, pDesc->context.tu.u8CSO, pDesc->context.tu.u16CSE);6965 pHlp->pfnPrintf(pHlp, " TUCMD:%s%s%s %s %s PAYLEN=%04x HDRLEN=%04x MSS=%04x STA: %s\n",6966 pDesc->context.dw2.fIDE ? " IDE":"",6967 pDesc->context.dw2.fRS ? " RS" :"",6968 pDesc->context.dw2.fTSE ? " TSE":"",6969 pDesc->context.dw2.fIP ? "IPv4":"IPv6",6970 pDesc->context.dw2.fTCP ? "TCP":"UDP",6971 pDesc->context.dw2.u20PAYLEN,6972 pDesc->context.dw3.u8HDRLEN,6973 pDesc->context.dw3.u16MSS,6974 pDesc->context.dw3.fDD?"DD":"");7019 cbPrintf += RTStrFormat(pfnOutput, pvArgOutput, NULL, 0, "Type=Context\n" 7020 " IPCSS=%02X IPCSO=%02X IPCSE=%04X TUCSS=%02X TUCSO=%02X TUCSE=%04X\n" 7021 " TUCMD:%s%s%s %s %s PAYLEN=%04x HDRLEN=%04x MSS=%04x STA: %s", 7022 pDesc->context.ip.u8CSS, pDesc->context.ip.u8CSO, pDesc->context.ip.u16CSE, 7023 pDesc->context.tu.u8CSS, pDesc->context.tu.u8CSO, pDesc->context.tu.u16CSE, 7024 pDesc->context.dw2.fIDE ? " IDE":"", 7025 pDesc->context.dw2.fRS ? " RS" :"", 7026 pDesc->context.dw2.fTSE ? " TSE":"", 7027 pDesc->context.dw2.fIP ? "IPv4":"IPv6", 7028 pDesc->context.dw2.fTCP ? "TCP":"UDP", 7029 pDesc->context.dw2.u20PAYLEN, 7030 pDesc->context.dw3.u8HDRLEN, 7031 pDesc->context.dw3.u16MSS, 7032 pDesc->context.dw3.fDD?"DD":""); 6975 7033 break; 6976 7034 case E1K_DTYP_DATA: 6977 pHlp->pfnPrintf(pHlp, "%RGp: Type=Data Address=%16LX DTALEN=%05X\n", 6978 addr, 6979 pDesc->data.u64BufAddr, 6980 pDesc->data.cmd.u20DTALEN); 6981 pHlp->pfnPrintf(pHlp, " DCMD:%s%s%s%s%s%s%s STA:%s%s%s POPTS:%s%s SPECIAL:%s VLAN=%03x PRI=%x\n", 6982 pDesc->data.cmd.fIDE ? " IDE" :"", 6983 pDesc->data.cmd.fVLE ? " VLE" :"", 6984 pDesc->data.cmd.fRPS ? " RPS" :"", 6985 pDesc->data.cmd.fRS ? " RS" :"", 6986 pDesc->data.cmd.fTSE ? " TSE" :"", 6987 pDesc->data.cmd.fIFCS? " IFCS":"", 6988 pDesc->data.cmd.fEOP ? " EOP" :"", 6989 pDesc->data.dw3.fDD ? " DD" :"", 6990 pDesc->data.dw3.fEC ? " EC" :"", 6991 pDesc->data.dw3.fLC ? " LC" :"", 6992 pDesc->data.dw3.fTXSM? " TXSM":"", 6993 pDesc->data.dw3.fIXSM? " IXSM":"", 6994 E1K_SPEC_CFI(pDesc->data.dw3.u16Special) ? "CFI" :"cfi", 6995 E1K_SPEC_VLAN(pDesc->data.dw3.u16Special), 6996 E1K_SPEC_PRI(pDesc->data.dw3.u16Special)); 7035 cbPrintf += RTStrFormat(pfnOutput, pvArgOutput, NULL, 0, "Type=Data Address=%16LX DTALEN=%05X\n" 7036 " DCMD:%s%s%s%s%s%s%s STA:%s%s%s POPTS:%s%s SPECIAL:%s VLAN=%03x PRI=%x", 7037 pDesc->data.u64BufAddr, 7038 pDesc->data.cmd.u20DTALEN, 7039 pDesc->data.cmd.fIDE ? " IDE" :"", 7040 pDesc->data.cmd.fVLE ? " VLE" :"", 7041 pDesc->data.cmd.fRPS ? " RPS" :"", 7042 pDesc->data.cmd.fRS ? " RS" :"", 7043 pDesc->data.cmd.fTSE ? " TSE" :"", 7044 pDesc->data.cmd.fIFCS? " IFCS":"", 7045 pDesc->data.cmd.fEOP ? " EOP" :"", 7046 pDesc->data.dw3.fDD ? " DD" :"", 7047 pDesc->data.dw3.fEC ? " EC" :"", 7048 pDesc->data.dw3.fLC ? " LC" :"", 7049 pDesc->data.dw3.fTXSM? " TXSM":"", 7050 pDesc->data.dw3.fIXSM? " IXSM":"", 7051 E1K_SPEC_CFI(pDesc->data.dw3.u16Special) ? "CFI" :"cfi", 7052 E1K_SPEC_VLAN(pDesc->data.dw3.u16Special), 7053 E1K_SPEC_PRI(pDesc->data.dw3.u16Special)); 6997 7054 break; 6998 7055 case E1K_DTYP_LEGACY: 6999 pHlp->pfnPrintf(pHlp, "%RGp: Type=Legacy Address=%16LX DTALEN=%05X\n", 7000 addr, 7001 pDesc->data.u64BufAddr, 7002 pDesc->legacy.cmd.u16Length); 7003 pHlp->pfnPrintf(pHlp, " CMD:%s%s%s%s%s%s%s STA:%s%s%s CSO=%02x CSS=%02x SPECIAL:%s VLAN=%03x PRI=%x\n", 7004 pDesc->legacy.cmd.fIDE ? " IDE" :"", 7005 pDesc->legacy.cmd.fVLE ? " VLE" :"", 7006 pDesc->legacy.cmd.fRPS ? " RPS" :"", 7007 pDesc->legacy.cmd.fRS ? " RS" :"", 7008 pDesc->legacy.cmd.fIC ? " IC" :"", 7009 pDesc->legacy.cmd.fIFCS? " IFCS":"", 7010 pDesc->legacy.cmd.fEOP ? " EOP" :"", 7011 pDesc->legacy.dw3.fDD ? " DD" :"", 7012 pDesc->legacy.dw3.fEC ? " EC" :"", 7013 pDesc->legacy.dw3.fLC ? " LC" :"", 7014 pDesc->legacy.cmd.u8CSO, 7015 pDesc->legacy.dw3.u8CSS, 7016 E1K_SPEC_CFI(pDesc->legacy.dw3.u16Special) ? "CFI" :"cfi", 7017 E1K_SPEC_VLAN(pDesc->legacy.dw3.u16Special), 7018 E1K_SPEC_PRI(pDesc->legacy.dw3.u16Special)); 7056 cbPrintf += RTStrFormat(pfnOutput, pvArgOutput, NULL, 0, "Type=Legacy Address=%16LX DTALEN=%05X\n" 7057 " CMD:%s%s%s%s%s%s%s STA:%s%s%s CSO=%02x CSS=%02x SPECIAL:%s VLAN=%03x PRI=%x", 7058 pDesc->data.u64BufAddr, 7059 pDesc->legacy.cmd.u16Length, 7060 pDesc->legacy.cmd.fIDE ? " IDE" :"", 7061 pDesc->legacy.cmd.fVLE ? " VLE" :"", 7062 pDesc->legacy.cmd.fRPS ? " RPS" :"", 7063 pDesc->legacy.cmd.fRS ? " RS" :"", 7064 pDesc->legacy.cmd.fIC ? " IC" :"", 7065 pDesc->legacy.cmd.fIFCS? " IFCS":"", 7066 pDesc->legacy.cmd.fEOP ? " EOP" :"", 7067 pDesc->legacy.dw3.fDD ? " DD" :"", 7068 pDesc->legacy.dw3.fEC ? " EC" :"", 7069 pDesc->legacy.dw3.fLC ? " LC" :"", 7070 pDesc->legacy.cmd.u8CSO, 7071 pDesc->legacy.dw3.u8CSS, 7072 E1K_SPEC_CFI(pDesc->legacy.dw3.u16Special) ? "CFI" :"cfi", 7073 E1K_SPEC_VLAN(pDesc->legacy.dw3.u16Special), 7074 E1K_SPEC_PRI(pDesc->legacy.dw3.u16Special)); 7019 7075 break; 7020 7076 default: 7021 pHlp->pfnPrintf(pHlp, "%RGp: Invalid Transmit Descriptor\n", addr);7077 cbPrintf += RTStrFormat(pfnOutput, pvArgOutput, NULL, 0, "Invalid Transmit Descriptor"); 7022 7078 break; 7023 7079 } 7080 7081 return cbPrintf; 7024 7082 } 7025 7083 … … 7076 7134 } 7077 7135 unsigned cDescs = RDLEN / sizeof(E1KRXDESC); 7136 uint32_t rdh = RDH; 7078 7137 pHlp->pfnPrintf(pHlp, "\n-- Receive Descriptors (%d total) --\n", cDescs); 7079 7138 for (i = 0; i < cDescs; ++i) … … 7082 7141 PDMDevHlpPhysRead(pDevIns, e1kDescAddr(RDBAH, RDBAL, i), 7083 7142 &desc, sizeof(desc)); 7084 e1kRDescInfo(pState, pHlp, e1kDescAddr(RDBAH, RDBAL, i), &desc); 7143 if (i == rdh) 7144 pHlp->pfnPrintf(pHlp, ">>> "); 7145 pHlp->pfnPrintf(pHlp, "%RGp: %R[e1krxd]\n", e1kDescAddr(RDBAH, RDBAL, i), &desc); 7085 7146 } 7086 7147 pHlp->pfnPrintf(pHlp, "\n-- Receive Descriptors in Cache (at %d (RDH %d)/ fetched %d / max %d) --\n", 7087 7148 pState->iRxDCurrent, RDH, pState->nRxDFetched, E1K_RXD_CACHE_SIZE); 7088 int rdh = RDH; 7089 for (i = pState->iRxDCurrent; i < pState->nRxDFetched; ++i) 7090 e1kRDescInfo(pState, pHlp, e1kDescAddr(RDBAH, RDBAL, rdh++ % cDescs), &pState->aRxDescriptors[i]); 7149 if (rdh > pState->iRxDCurrent) 7150 rdh -= pState->iRxDCurrent; 7151 else 7152 rdh = cDescs + rdh - pState->iRxDCurrent; 7153 for (i = 0; i < pState->nRxDFetched; ++i) 7154 { 7155 if (i == pState->iRxDCurrent) 7156 pHlp->pfnPrintf(pHlp, ">>> "); 7157 pHlp->pfnPrintf(pHlp, "%RGp: %R[e1krxd]\n", 7158 e1kDescAddr(RDBAH, RDBAL, rdh++ % cDescs), 7159 &pState->aRxDescriptors[i]); 7160 } 7091 7161 7092 7162 cDescs = TDLEN / sizeof(E1KTXDESC); 7163 uint32_t tdh = TDH; 7093 7164 pHlp->pfnPrintf(pHlp, "\n-- Transmit Descriptors (%d total) --\n", cDescs); 7094 7165 for (i = 0; i < cDescs; ++i) … … 7097 7168 PDMDevHlpPhysRead(pDevIns, e1kDescAddr(TDBAH, TDBAL, i), 7098 7169 &desc, sizeof(desc)); 7099 e1kTDescInfo(pState, pHlp, e1kDescAddr(TDBAH, TDBAL, i), &desc); 7170 if (i == tdh) 7171 pHlp->pfnPrintf(pHlp, ">>> "); 7172 pHlp->pfnPrintf(pHlp, "%RGp: %R[e1ktxd]\n", e1kDescAddr(TDBAH, TDBAL, i), &desc); 7173 } 7174 pHlp->pfnPrintf(pHlp, "\n-- Transmit Descriptors in Cache (at %d (TDH %d)/ fetched %d / max %d) --\n", 7175 pState->iTxDCurrent, TDH, pState->nTxDFetched, E1K_TXD_CACHE_SIZE); 7176 if (tdh > pState->iTxDCurrent) 7177 tdh -= pState->iTxDCurrent; 7178 else 7179 tdh = cDescs + tdh - pState->iTxDCurrent; 7180 for (i = 0; i < pState->nTxDFetched; ++i) 7181 { 7182 if (i == pState->iTxDCurrent) 7183 pHlp->pfnPrintf(pHlp, ">>> "); 7184 pHlp->pfnPrintf(pHlp, "%RGp: %R[e1ktxd]\n", 7185 e1kDescAddr(TDBAH, TDBAL, tdh++ % cDescs), 7186 &pState->aTxDescriptors[i]); 7100 7187 } 7101 7188 … … 7255 7342 /// @todo: is this value really correct? fff8 doesn't look like actual PCI address 7256 7343 e1kPCICfgSetU32(pci, 0xE4 + 4, 0x0040FFF8); 7344 } 7345 7346 static int e1kInitDebugHelpers() 7347 { 7348 int rc; 7349 rc = RTStrFormatTypeRegister("e1krxd", e1kFmtRxDesc, NULL); 7350 AssertRCReturn(rc, rc); 7351 rc = RTStrFormatTypeRegister("e1ktxd", e1kFmtTxDesc, NULL); 7352 AssertRC(rc); 7353 return rc; 7257 7354 } 7258 7355 … … 7599 7696 return rc; 7600 7697 7698 rc = e1kInitDebugHelpers(); 7699 if (RT_FAILURE(rc)) 7700 return rc; 7701 7601 7702 e1kHardReset(pState); 7602 7703
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