Changeset 43468 in vbox

Timestamp:

Sep 28, 2012 3:21:24 PM (12 years ago)

Author:

vboxsync

Message:

VMM: HM bits. More renaming in prepartion of

Location:

trunk/src/VBox/VMM

Files:

• VMMR0/HWVMXR0.cpp (modified) (9 diffs)
• VMMR3/HM.cpp (modified) (1 diff)
• include/HMInternal.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

@@ -224 +224 @@
 #endif
 
-    pVM->hm.s.vmx.hMemObjAPIC = NIL_RTR0MEMOBJ;
+    pVM->hm.s.vmx.hMemObjApicAccess = NIL_RTR0MEMOBJ;
 
     if (pVM->hm.s.vmx.msr.vmx_proc_ctls.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_TPR_SHADOW)
     {
         /* Allocate one page for the APIC physical page (serves for filtering accesses). */
-        rc = RTR0MemObjAllocCont(&pVM->hm.s.vmx.hMemObjAPIC, PAGE_SIZE, false /* fExecutable */);
+        rc = RTR0MemObjAllocCont(&pVM->hm.s.vmx.hMemObjApicAccess, PAGE_SIZE, false /* fExecutable */);
         AssertRC(rc);
         if (RT_FAILURE(rc))
             return rc;
 
-        pVM->hm.s.vmx.pbAPIC     = (uint8_t *)RTR0MemObjAddress(pVM->hm.s.vmx.hMemObjAPIC);
-        pVM->hm.s.vmx.HCPhysAPIC = RTR0MemObjGetPagePhysAddr(pVM->hm.s.vmx.hMemObjAPIC, 0);
-        ASMMemZero32(pVM->hm.s.vmx.pbAPIC, PAGE_SIZE);
+        pVM->hm.s.vmx.pbApicAccess     = (uint8_t *)RTR0MemObjAddress(pVM->hm.s.vmx.hMemObjApicAccess);
+        pVM->hm.s.vmx.HCPhysApicAccess = RTR0MemObjGetPagePhysAddr(pVM->hm.s.vmx.hMemObjApicAccess, 0);
+        ASMMemZero32(pVM->hm.s.vmx.pbApicAccess, PAGE_SIZE);
     }
     else
     {
-        pVM->hm.s.vmx.hMemObjAPIC = 0;
-        pVM->hm.s.vmx.pbAPIC       = 0;
-        pVM->hm.s.vmx.HCPhysAPIC   = 0;
+        pVM->hm.s.vmx.hMemObjApicAccess = 0;
+        pVM->hm.s.vmx.pbApicAccess       = 0;
+        pVM->hm.s.vmx.HCPhysApicAccess   = 0;
     }
 
@@ -390 +390 @@
 #endif /* VBOX_WITH_AUTO_MSR_LOAD_RESTORE */
     }
-    if (pVM->hm.s.vmx.hMemObjAPIC != NIL_RTR0MEMOBJ)
-    {
-        RTR0MemObjFree(pVM->hm.s.vmx.hMemObjAPIC, false);
-        pVM->hm.s.vmx.hMemObjAPIC = NIL_RTR0MEMOBJ;
-        pVM->hm.s.vmx.pbAPIC       = 0;
-        pVM->hm.s.vmx.HCPhysAPIC   = 0;
+    if (pVM->hm.s.vmx.hMemObjApicAccess != NIL_RTR0MEMOBJ)
+    {
+        RTR0MemObjFree(pVM->hm.s.vmx.hMemObjApicAccess, false);
+        pVM->hm.s.vmx.hMemObjApicAccess = NIL_RTR0MEMOBJ;
+        pVM->hm.s.vmx.pbApicAccess       = 0;
+        pVM->hm.s.vmx.HCPhysApicAccess   = 0;
     }
 #ifdef VBOX_WITH_CRASHDUMP_MAGIC
@@ -562 +562 @@
             /* CR8 reads from the APIC shadow page; writes cause an exit is they lower the TPR below the threshold */
             val |= VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_TPR_SHADOW;
-            Assert(pVM->hm.s.vmx.pbAPIC);
+            Assert(pVM->hm.s.vmx.pbApicAccess);
         }
         else
@@ -703 +703 @@
         if (pVM->hm.s.vmx.msr.vmx_proc_ctls.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_TPR_SHADOW)
         {
-            Assert(pVM->hm.s.vmx.hMemObjAPIC);
+            Assert(pVM->hm.s.vmx.hMemObjApicAccess);
             /* Optional */
             rc  = VMXWriteVMCS(VMX_VMCS_CTRL_TPR_THRESHOLD, 0);
@@ -709 +709 @@
 
             if (pVM->hm.s.vmx.msr.vmx_proc_ctls2.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC2_VIRT_APIC)
-                rc |= VMXWriteVMCS64(VMX_VMCS_CTRL_APIC_ACCESSADDR_FULL, pVM->hm.s.vmx.HCPhysAPIC);
+                rc |= VMXWriteVMCS64(VMX_VMCS_CTRL_APIC_ACCESSADDR_FULL, pVM->hm.s.vmx.HCPhysApicAccess);
 
             AssertRC(rc);
@@ -2775 +2775 @@
 
     Assert(!(pVM->hm.s.vmx.msr.vmx_proc_ctls2.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC2_VIRT_APIC)
-           || (pVCpu->hm.s.vmx.pbVAPIC && pVM->hm.s.vmx.pbAPIC));
+           || (pVCpu->hm.s.vmx.pbVAPIC && pVM->hm.s.vmx.pbApicAccess));
 
     /*
@@ -3504 +3504 @@
                     {
                         Log(("Enable VT-x virtual APIC access filtering\n"));
-                        rc2 = IOMMMIOMapMMIOHCPage(pVM, GCPhysApicBase, pVM->hm.s.vmx.HCPhysAPIC, X86_PTE_RW | X86_PTE_P);
+                        rc2 = IOMMMIOMapMMIOHCPage(pVM, GCPhysApicBase, pVM->hm.s.vmx.HCPhysApicAccess, X86_PTE_RW | X86_PTE_P);
                         AssertRC(rc2);
                     }
@@ -4010 +4010 @@
                 {
                     Log(("Enable VT-x virtual APIC access filtering\n"));
-                    rc2 = IOMMMIOMapMMIOHCPage(pVM, GCPhysApicBase, pVM->hm.s.vmx.HCPhysAPIC, X86_PTE_RW | X86_PTE_P);
+                    rc2 = IOMMMIOMapMMIOHCPage(pVM, GCPhysApicBase, pVM->hm.s.vmx.HCPhysApicAccess, X86_PTE_RW | X86_PTE_P);
                     AssertRC(rc2);
                 }
@@ -4071 +4071 @@
             {
                 Log(("Enable VT-x virtual APIC access filtering\n"));
-                rc2 = IOMMMIOMapMMIOHCPage(pVM, GCPhysApicBase, pVM->hm.s.vmx.HCPhysAPIC, X86_PTE_RW | X86_PTE_P);
+                rc2 = IOMMMIOMapMMIOHCPage(pVM, GCPhysApicBase, pVM->hm.s.vmx.HCPhysApicAccess, X86_PTE_RW | X86_PTE_P);
                 AssertRC(rc2);
             }

trunk/src/VBox/VMM/VMMR3/HM.cpp

@@ -1107 +1107 @@
             LogRel(("HM: MSR_IA32_VMX_VMCS_ENUM        = %RX64\n", pVM->hm.s.vmx.msr.vmx_vmcs_enum));
 
-            LogRel(("HM: TPR shadow physaddr           = %RHp\n", pVM->hm.s.vmx.HCPhysAPIC));
+            LogRel(("HM: APIC-access page physaddr     = %RHp\n", pVM->hm.s.vmx.HCPhysApicAccess));
 
             /* Paranoia */

trunk/src/VBox/VMM/include/HMInternal.h

@@ -329 +329 @@
         R3PTRTYPE(PX86PD)           pNonPagingModeEPTPageTable;
 
-        /** R0 memory object for the APIC physical page (serves for filtering accesses). */
-        RTR0MEMOBJ                  hMemObjAPIC;
-        /** Physical address of the APIC physical page (serves for filtering accesses). */
-        RTHCPHYS                    HCPhysAPIC;
-        /** Virtual address of the APIC physical page (serves for filtering accesses). */
-        R0PTRTYPE(uint8_t *)        pbAPIC;
+        /** R0 memory object for the APIC-access page. */
+        RTR0MEMOBJ                  hMemObjApicAccess;
+        /** Physical address of the APIC-access page. */
+        RTHCPHYS                    HCPhysApicAccess;
+        /** Virtual address of the APIC-access page. */
+        R0PTRTYPE(uint8_t *)        pbApicAccess;
 
         /** R0 memory object for the MSR entry load page (guest MSRs). */