Changeset 43495 in vbox for trunk/src/VBox/VMM/include
- Timestamp:
- Oct 1, 2012 5:11:16 PM (12 years ago)
- File:
-
- 1 edited
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- Added
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trunk/src/VBox/VMM/include/HMInternal.h
r43469 r43495 143 143 RTR0MEMOBJ hMemObj; 144 144 /** Current ASID (AMD-V) / VPID (Intel). */ 145 uint32_t uCurrentA SID;145 uint32_t uCurrentAsid; 146 146 /** TLB flush count. */ 147 uint32_t cT LBFlushes;147 uint32_t cTlbFlushes; 148 148 /** Whether to flush each new ASID/VPID before use. */ 149 bool fFlushA SIDBeforeUse;149 bool fFlushAsidBeforeUse; 150 150 /** Configured for VT-x or AMD-V. */ 151 151 bool fConfigured; … … 260 260 261 261 /** Maximum ASID allowed. */ 262 uint32_t uMaxA SID;262 uint32_t uMaxAsid; 263 263 264 264 /** The maximum number of resumes loops allowed in ring-0 (safety precaution). … … 308 308 309 309 /** Set if VPID is supported. */ 310 bool fV PID;310 bool fVpid; 311 311 312 312 /** Set if VT-x VPID is allowed. */ 313 bool fAllowV PID;313 bool fAllowVpid; 314 314 315 315 /** Set if unrestricted guest execution is allowed (real and protected mode without paging). */ … … 342 342 #endif 343 343 /** Ring 0 handlers for VT-x. */ 344 DECLR0CALLBACKMEMBER(void, pfnSetupTaggedT LB, (PVM pVM, PVMCPU pVCpu));344 DECLR0CALLBACKMEMBER(void, pfnSetupTaggedTlb, (PVM pVM, PVMCPU pVCpu)); 345 345 346 346 #if HC_ARCH_BITS == 32 && defined(VBOX_ENABLE_64_BITS_GUESTS) … … 373 373 374 374 /** Flush types for invept & invvpid; they depend on capabilities. */ 375 VMX_FLUSH_EPT enmFlushE PT;376 VMX_FLUSH_VPID enmFlushV PID;375 VMX_FLUSH_EPT enmFlushEpt; 376 VMX_FLUSH_VPID enmFlushVpid; 377 377 } vmx; 378 378 … … 396 396 R0PTRTYPE(void *) pvIOBitmap; 397 397 398 /* HWCR msr(for diagnostics) */399 uint64_t msrH WCR;398 /* HWCR MSR (for diagnostics) */ 399 uint64_t msrHwcr; 400 400 401 401 /** SVM revision. */ … … 537 537 538 538 /** TLB flush count */ 539 uint32_t cT LBFlushes;539 uint32_t cTlbFlushes; 540 540 541 541 /** Current ASID in use by the VM */ 542 uint32_t uCurrentA SID;542 uint32_t uCurrentAsid; 543 543 544 544 uint32_t u32Alignment; 545 545 546 546 /* Host's TSC_AUX MSR (used when RDTSCP doesn't cause VM-exits). */ 547 uint64_t u64HostT SCAux;547 uint64_t u64HostTscAux; 548 548 549 549 struct … … 666 666 667 667 /** R0 memory object for the MSR bitmap (8kb). */ 668 RTR0MEMOBJ hMemObjM SRBitmap;668 RTR0MEMOBJ hMemObjMsrBitmap; 669 669 /** Physical address of the MSR bitmap (8kb). */ 670 RTHCPHYS HCPhysM SRBitmap;670 RTHCPHYS HCPhysMsrBitmap; 671 671 /** Virtual address of the MSR bitmap. */ 672 R0PTRTYPE(void *) pvM SRBitmap;672 R0PTRTYPE(void *) pvMsrBitmap; 673 673 } svm; 674 674 … … 784 784 STAMCOUNTER StatExitRdmsr; 785 785 STAMCOUNTER StatExitWrmsr; 786 STAMCOUNTER StatExitC LTS;786 STAMCOUNTER StatExitClts; 787 787 STAMCOUNTER StatExitHlt; 788 788 STAMCOUNTER StatExitMwait; … … 796 796 STAMCOUNTER StatExitMaxResume; 797 797 STAMCOUNTER StatExitPreemptPending; 798 STAMCOUNTER StatExitM TF;798 STAMCOUNTER StatExitMtf; 799 799 STAMCOUNTER StatIntReinject; 800 800 STAMCOUNTER StatPendingHostIrq; … … 809 809 STAMCOUNTER StatNoFlushTLBWorldSwitch; 810 810 STAMCOUNTER StatFlushTLBCRxChange; 811 STAMCOUNTER StatFlushA SID;812 STAMCOUNTER StatFlushN P;813 STAMCOUNTER StatFlushT LBInvlpga;811 STAMCOUNTER StatFlushAsid; 812 STAMCOUNTER StatFlushNestedPaging; 813 STAMCOUNTER StatFlushTlbInvlpga; 814 814 STAMCOUNTER StatTlbShootdown; 815 815 STAMCOUNTER StatTlbShootdownFlush;
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