Changeset 43977 in vbox for trunk/src/VBox/VMM

Timestamp:

Nov 27, 2012 4:43:29 PM (12 years ago)

Author:

vboxsync

Message:

VMM/HWVMXR0: Naming.

Location:

trunk/src/VBox/VMM

Files:

• VMMR0/HWVMXR0.cpp (modified) (7 diffs)
• include/HMInternal.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

@@ -282 +282 @@
 
         /* Allocate one page for the virtual APIC page for TPR caching. */
-        rc = RTR0MemObjAllocCont(&pVCpu->hm.s.vmx.hMemObjVAPIC, PAGE_SIZE, false /* fExecutable */);
+        rc = RTR0MemObjAllocCont(&pVCpu->hm.s.vmx.hMemObjVirtApic, PAGE_SIZE, false /* fExecutable */);
         AssertRC(rc);
         if (RT_FAILURE(rc))
             return rc;
 
-        pVCpu->hm.s.vmx.pbVAPIC     = (uint8_t *)RTR0MemObjAddress(pVCpu->hm.s.vmx.hMemObjVAPIC);
-        pVCpu->hm.s.vmx.HCPhysVAPIC = RTR0MemObjGetPagePhysAddr(pVCpu->hm.s.vmx.hMemObjVAPIC, 0);
-        ASMMemZeroPage(pVCpu->hm.s.vmx.pbVAPIC);
+        pVCpu->hm.s.vmx.pbVirtApic     = (uint8_t *)RTR0MemObjAddress(pVCpu->hm.s.vmx.hMemObjVirtApic);
+        pVCpu->hm.s.vmx.HCPhysVirtApic = RTR0MemObjGetPagePhysAddr(pVCpu->hm.s.vmx.hMemObjVirtApic, 0);
+        ASMMemZeroPage(pVCpu->hm.s.vmx.pbVirtApic);
 
         /* Allocate the MSR bitmap if this feature is supported. */
@@ -359 +359 @@
             pVCpu->hm.s.vmx.HCPhysVMCS  = 0;
         }
-        if (pVCpu->hm.s.vmx.hMemObjVAPIC != NIL_RTR0MEMOBJ)
-        {
-            RTR0MemObjFree(pVCpu->hm.s.vmx.hMemObjVAPIC, false);
-            pVCpu->hm.s.vmx.hMemObjVAPIC = NIL_RTR0MEMOBJ;
-            pVCpu->hm.s.vmx.pbVAPIC      = 0;
-            pVCpu->hm.s.vmx.HCPhysVAPIC  = 0;
+        if (pVCpu->hm.s.vmx.hMemObjVirtApic != NIL_RTR0MEMOBJ)
+        {
+            RTR0MemObjFree(pVCpu->hm.s.vmx.hMemObjVirtApic, false);
+            pVCpu->hm.s.vmx.hMemObjVirtApic = NIL_RTR0MEMOBJ;
+            pVCpu->hm.s.vmx.pbVirtApic      = 0;
+            pVCpu->hm.s.vmx.HCPhysVirtApic  = 0;
         }
         if (pVCpu->hm.s.vmx.hMemObjMsrBitmap != NIL_RTR0MEMOBJ)
@@ -706 +706 @@
             /* Optional */
             rc  = VMXWriteVmcs(VMX_VMCS32_CTRL_TPR_THRESHOLD, 0);
-            rc |= VMXWriteVmcs64(VMX_VMCS64_CTRL_VAPIC_PAGEADDR_FULL, pVCpu->hm.s.vmx.HCPhysVAPIC);
+            rc |= VMXWriteVmcs64(VMX_VMCS64_CTRL_VAPIC_PAGEADDR_FULL, pVCpu->hm.s.vmx.HCPhysVirtApic);
 
             if (pVM->hm.s.vmx.msr.vmx_proc_ctls2.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC2_VIRT_APIC)
@@ -2811 +2811 @@
 
     Assert(!(pVM->hm.s.vmx.msr.vmx_proc_ctls2.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC2_VIRT_APIC)
-           || (pVCpu->hm.s.vmx.pbVAPIC && pVM->hm.s.vmx.pbApicAccess));
+           || (pVCpu->hm.s.vmx.pbVirtApic && pVM->hm.s.vmx.pbApicAccess));
 
     /*
@@ -3066 +3066 @@
         AssertRC(rc2);
         /* The TPR can be found at offset 0x80 in the APIC mmio page. */
-        pVCpu->hm.s.vmx.pbVAPIC[0x80] = u8LastTPR;
+        pVCpu->hm.s.vmx.pbVirtApic[0x80] = u8LastTPR;
 
         /*
@@ -3268 +3268 @@
     {
         Assert(pVM->hm.s.fTPRPatchingActive);
-        pVCpu->hm.s.vmx.pbVAPIC[0x80] = pCtx->msrLSTAR = ASMRdMsr(MSR_K8_LSTAR);
+        pVCpu->hm.s.vmx.pbVirtApic[0x80] = pCtx->msrLSTAR = ASMRdMsr(MSR_K8_LSTAR);
         ASMWrMsr(MSR_K8_LSTAR, u64OldLSTAR);
     }
@@ -3380 +3380 @@
      */
     if (    fSetupTPRCaching
-        &&  u8LastTPR != pVCpu->hm.s.vmx.pbVAPIC[0x80])
-    {
-        rc2 = PDMApicSetTPR(pVCpu, pVCpu->hm.s.vmx.pbVAPIC[0x80]);
+        &&  u8LastTPR != pVCpu->hm.s.vmx.pbVirtApic[0x80])
+    {
+        rc2 = PDMApicSetTPR(pVCpu, pVCpu->hm.s.vmx.pbVirtApic[0x80]);
         AssertRC(rc2);
     }

trunk/src/VBox/VMM/include/HMInternal.h

@@ -550 +550 @@
         uint64_t                    u64EntryCtls;
         /** Physical address of the virtual APIC page for TPR caching. */
-        RTHCPHYS                    HCPhysVAPIC;
+        RTHCPHYS                    HCPhysVirtApic;
         /** R0 memory object for the virtual APIC page for TPR caching. */
-        RTR0MEMOBJ                  hMemObjVAPIC;
+        RTR0MEMOBJ                  hMemObjVirtApic;
         /** Virtual address of the virtual APIC page for TPR caching. */
-        R0PTRTYPE(uint8_t *)        pbVAPIC;
+        R0PTRTYPE(uint8_t *)        pbVirtApic;
 
         /** Current CR0 mask. */