Changeset 44035 in vbox for trunk/src/VBox/VMM

Timestamp:

Dec 4, 2012 6:30:44 PM (12 years ago)

Author:

vboxsync

Message:

VMM: hungarian again.

Location:

trunk/src/VBox/VMM

Files:

• VMMR0/HWSVMR0.cpp (modified) (5 diffs)
• VMMR0/HWVMXR0.cpp (modified) (5 diffs)
• VMMR3/HM.cpp (modified) (2 diffs)
• testcase/tstVMStructSize.cpp (modified) (1 diff)

trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

@@ -533 +533 @@
 
     /* Set pending event state. */
-    pVCpu->hm.s.Event.uIntrInfo  = pEvent->au64[0];
+    pVCpu->hm.s.Event.u64IntrInfo  = pEvent->au64[0];
     pVCpu->hm.s.Event.fPending = true;
 }
@@ -593 +593 @@
         SVM_EVENT Event;
 
-        Log(("Reinjecting event %08x %08x at %RGv\n", pVCpu->hm.s.Event.uIntrInfo, pVCpu->hm.s.Event.uErrCode,
+        Log(("Reinjecting event %08x %08x at %RGv\n", pVCpu->hm.s.Event.u64IntrInfo, pVCpu->hm.s.Event.u32ErrCode,
              (RTGCPTR)pCtx->rip));
         STAM_COUNTER_INC(&pVCpu->hm.s.StatIntReinject);
-        Event.au64[0] = pVCpu->hm.s.Event.uIntrInfo;
+        Event.au64[0] = pVCpu->hm.s.Event.u64IntrInfo;
         hmR0SvmInjectEvent(pVCpu, pvVMCB, pCtx, &Event);
 
@@ -1792 +1792 @@
 
     /* Check if an injected event was interrupted prematurely. */
-    pVCpu->hm.s.Event.uIntrInfo = pvVMCB->ctrl.ExitIntInfo.au64[0];
+    pVCpu->hm.s.Event.u64IntrInfo = pvVMCB->ctrl.ExitIntInfo.au64[0];
     if (    pvVMCB->ctrl.ExitIntInfo.n.u1Valid
             /* we don't care about 'int xx' as the instruction will be restarted. */
         &&  pvVMCB->ctrl.ExitIntInfo.n.u3Type != SVM_EVENT_SOFTWARE_INT)
     {
-        Log(("Pending inject %RX64 at %RGv exit=%08x\n", pVCpu->hm.s.Event.uIntrInfo, (RTGCPTR)pCtx->rip, exitCode));
+        Log(("Pending inject %RX64 at %RGv exit=%08x\n", pVCpu->hm.s.Event.u64IntrInfo, (RTGCPTR)pCtx->rip, exitCode));
 
 #ifdef LOG_ENABLED
         SVM_EVENT Event;
-        Event.au64[0] = pVCpu->hm.s.Event.uIntrInfo;
+        Event.au64[0] = pVCpu->hm.s.Event.u64IntrInfo;
 
         if (    exitCode == SVM_EXIT_EXCEPTION_E
@@ -1813 +1813 @@
         /* Error code present? (redundant) */
         if (pvVMCB->ctrl.ExitIntInfo.n.u1ErrorCodeValid)
-            pVCpu->hm.s.Event.uErrCode  = pvVMCB->ctrl.ExitIntInfo.n.u32ErrorCode;
+            pVCpu->hm.s.Event.u32ErrCode  = pvVMCB->ctrl.ExitIntInfo.n.u32ErrorCode;
         else
-            pVCpu->hm.s.Event.uErrCode  = 0;
+            pVCpu->hm.s.Event.u32ErrCode  = 0;
     }
 #ifdef VBOX_WITH_STATISTICS
@@ -2739 +2739 @@
         {
             SVM_EVENT Event;
-            Event.au64[0] = pVCpu->hm.s.Event.uIntrInfo;
+            Event.au64[0] = pVCpu->hm.s.Event.u64IntrInfo;
 
             /* Caused by an injected interrupt. */

trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

@@ -1000 +1000 @@
     if (pVCpu->hm.s.Event.fPending)
     {
-        Log(("CPU%d: Reinjecting event %RX64 %08x at %RGv cr2=%RX64\n", pVCpu->idCpu, pVCpu->hm.s.Event.uIntrInfo,
-             pVCpu->hm.s.Event.uErrCode, (RTGCPTR)pCtx->rip, pCtx->cr2));
+        Log(("CPU%d: Reinjecting event %RX64 %08x at %RGv cr2=%RX64\n", pVCpu->idCpu, pVCpu->hm.s.Event.u64IntrInfo,
+             pVCpu->hm.s.Event.u32ErrCode, (RTGCPTR)pCtx->rip, pCtx->cr2));
         STAM_COUNTER_INC(&pVCpu->hm.s.StatIntReinject);
-        rc = hmR0VmxInjectEvent(pVM, pVCpu, pCtx, pVCpu->hm.s.Event.uIntrInfo, 0, pVCpu->hm.s.Event.uErrCode);
+        rc = hmR0VmxInjectEvent(pVM, pVCpu, pCtx, pVCpu->hm.s.Event.u64IntrInfo, 0, pVCpu->hm.s.Event.u32ErrCode);
         AssertRC(rc);
 
@@ -1171 +1171 @@
          */
         pVCpu->hm.s.Event.fPending = false;
-        switch (VMX_EXIT_INTERRUPTION_INFO_TYPE(pVCpu->hm.s.Event.uIntrInfo))
+        switch (VMX_EXIT_INTERRUPTION_INFO_TYPE(pVCpu->hm.s.Event.u64IntrInfo))
         {
         case VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT:
@@ -1189 +1189 @@
             AssertFailed();
         }
-        TRPMAssertTrap(pVCpu, VMX_EXIT_INTERRUPTION_INFO_VECTOR(pVCpu->hm.s.Event.uIntrInfo), enmTrapType);
-        if (VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_IS_VALID(pVCpu->hm.s.Event.uIntrInfo))
-            TRPMSetErrorCode(pVCpu, pVCpu->hm.s.Event.uErrCode);
+        TRPMAssertTrap(pVCpu, VMX_EXIT_INTERRUPTION_INFO_VECTOR(pVCpu->hm.s.Event.u64IntrInfo), enmTrapType);
+        if (VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_IS_VALID(pVCpu->hm.s.Event.u64IntrInfo))
+            TRPMSetErrorCode(pVCpu, pVCpu->hm.s.Event.u32ErrCode);
         //@todo: Is there any situation where we need to call TRPMSetFaultAddress()?
     }
@@ -3332 +3332 @@
     rc2 = VMXReadCachedVmcs(VMX_VMCS32_RO_IDT_INFO,            &val);
     AssertRC(rc2);
-    pVCpu->hm.s.Event.uIntrInfo = VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(val);
-    if (    VMX_EXIT_INTERRUPTION_INFO_VALID(pVCpu->hm.s.Event.uIntrInfo)
+    pVCpu->hm.s.Event.u64IntrInfo = VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(val);
+    if (    VMX_EXIT_INTERRUPTION_INFO_VALID(pVCpu->hm.s.Event.u64IntrInfo)
         /* Ignore 'int xx' as they'll be restarted anyway. */
-        &&  VMX_EXIT_INTERRUPTION_INFO_TYPE(pVCpu->hm.s.Event.uIntrInfo) != VMX_EXIT_INTERRUPTION_INFO_TYPE_SW
+        &&  VMX_EXIT_INTERRUPTION_INFO_TYPE(pVCpu->hm.s.Event.u64IntrInfo) != VMX_EXIT_INTERRUPTION_INFO_TYPE_SW
         /* Ignore software exceptions (such as int3) as they'll reoccur when we restart the instruction anyway. */
-        &&  VMX_EXIT_INTERRUPTION_INFO_TYPE(pVCpu->hm.s.Event.uIntrInfo) != VMX_EXIT_INTERRUPTION_INFO_TYPE_SWEXCPT)
+        &&  VMX_EXIT_INTERRUPTION_INFO_TYPE(pVCpu->hm.s.Event.u64IntrInfo) != VMX_EXIT_INTERRUPTION_INFO_TYPE_SWEXCPT)
     {
         Assert(!pVCpu->hm.s.Event.fPending);
         pVCpu->hm.s.Event.fPending = true;
         /* Error code present? */
-        if (VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_IS_VALID(pVCpu->hm.s.Event.uIntrInfo))
+        if (VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_IS_VALID(pVCpu->hm.s.Event.u64IntrInfo))
         {
             rc2 = VMXReadCachedVmcs(VMX_VMCS32_RO_IDT_ERRCODE, &val);
             AssertRC(rc2);
-            pVCpu->hm.s.Event.uErrCode  = val;
+            pVCpu->hm.s.Event.u32ErrCode  = val;
             Log(("Pending inject %RX64 at %RGv exit=%08x intInfo=%08x exitQualification=%RGv pending error=%RX64\n",
-                 pVCpu->hm.s.Event.uIntrInfo, (RTGCPTR)pCtx->rip, exitReason, intInfo, exitQualification, val));
+                 pVCpu->hm.s.Event.u64IntrInfo, (RTGCPTR)pCtx->rip, exitReason, intInfo, exitQualification, val));
         }
         else
         {
-            Log(("Pending inject %RX64 at %RGv exit=%08x intInfo=%08x exitQualification=%RGv\n", pVCpu->hm.s.Event.uIntrInfo,
+            Log(("Pending inject %RX64 at %RGv exit=%08x intInfo=%08x exitQualification=%RGv\n", pVCpu->hm.s.Event.u64IntrInfo,
                  (RTGCPTR)pCtx->rip, exitReason, intInfo, exitQualification));
-            pVCpu->hm.s.Event.uErrCode  = 0;
+            pVCpu->hm.s.Event.u32ErrCode  = 0;
         }
     }
 #ifdef VBOX_STRICT
-    else if (   VMX_EXIT_INTERRUPTION_INFO_VALID(pVCpu->hm.s.Event.uIntrInfo)
+    else if (   VMX_EXIT_INTERRUPTION_INFO_VALID(pVCpu->hm.s.Event.u64IntrInfo)
                 /* Ignore software exceptions (such as int3) as they're reoccur when we restart the instruction anyway. */
-             && VMX_EXIT_INTERRUPTION_INFO_TYPE(pVCpu->hm.s.Event.uIntrInfo) == VMX_EXIT_INTERRUPTION_INFO_TYPE_SWEXCPT)
+             && VMX_EXIT_INTERRUPTION_INFO_TYPE(pVCpu->hm.s.Event.u64IntrInfo) == VMX_EXIT_INTERRUPTION_INFO_TYPE_SWEXCPT)
     {
         Log(("Ignore pending inject %RX64 at %RGv exit=%08x intInfo=%08x exitQualification=%RGv\n",
-             pVCpu->hm.s.Event.uIntrInfo, (RTGCPTR)pCtx->rip, exitReason, intInfo, exitQualification));
+             pVCpu->hm.s.Event.u64IntrInfo, (RTGCPTR)pCtx->rip, exitReason, intInfo, exitQualification));
     }
 
@@ -4711 +4711 @@
             pVCpu->hm.s.Event.fPending = false;
 
-            Log(("VMX_EXIT_TASK_SWITCH: reassert trap %d\n", VMX_EXIT_INTERRUPTION_INFO_VECTOR(pVCpu->hm.s.Event.uIntrInfo)));
-            Assert(!VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_IS_VALID(pVCpu->hm.s.Event.uIntrInfo));
+            Log(("VMX_EXIT_TASK_SWITCH: reassert trap %d\n", VMX_EXIT_INTERRUPTION_INFO_VECTOR(pVCpu->hm.s.Event.u64IntrInfo)));
+            Assert(!VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_IS_VALID(pVCpu->hm.s.Event.u64IntrInfo));
             //@todo: Why do we assume this had to be a hardware interrupt? What about software interrupts or exceptions?
-            rc2 = TRPMAssertTrap(pVCpu, VMX_EXIT_INTERRUPTION_INFO_VECTOR(pVCpu->hm.s.Event.uIntrInfo), TRPM_HARDWARE_INT);
+            rc2 = TRPMAssertTrap(pVCpu, VMX_EXIT_INTERRUPTION_INFO_VECTOR(pVCpu->hm.s.Event.u64IntrInfo), TRPM_HARDWARE_INT);
             AssertRC(rc2);
         }

trunk/src/VBox/VMM/VMMR3/HM.cpp

@@ -2764 +2764 @@
         rc = SSMR3PutU32(pSSM, pVM->aCpus[i].hm.s.Event.fPending);
         AssertRCReturn(rc, rc);
-        rc = SSMR3PutU32(pSSM, pVM->aCpus[i].hm.s.Event.uErrCode);
+        rc = SSMR3PutU32(pSSM, pVM->aCpus[i].hm.s.Event.u32ErrCode);
         AssertRCReturn(rc, rc);
-        rc = SSMR3PutU64(pSSM, pVM->aCpus[i].hm.s.Event.uIntrInfo);
+        rc = SSMR3PutU64(pSSM, pVM->aCpus[i].hm.s.Event.u64IntrInfo);
         AssertRCReturn(rc, rc);
 
@@ -2858 +2858 @@
         rc = SSMR3GetU32(pSSM, &pVM->aCpus[i].hm.s.Event.fPending);
         AssertRCReturn(rc, rc);
-        rc = SSMR3GetU32(pSSM, &pVM->aCpus[i].hm.s.Event.uErrCode);
+        rc = SSMR3GetU32(pSSM, &pVM->aCpus[i].hm.s.Event.u32ErrCode);
         AssertRCReturn(rc, rc);
-        rc = SSMR3GetU64(pSSM, &pVM->aCpus[i].hm.s.Event.uIntrInfo);
+        rc = SSMR3GetU64(pSSM, &pVM->aCpus[i].hm.s.Event.u64IntrInfo);
         AssertRCReturn(rc, rc);
 

trunk/src/VBox/VMM/testcase/tstVMStructSize.cpp

@@ -402 +402 @@
     CHECK_MEMBER_ALIGNMENT(HMCPU, vmx.HCPhysVMCS, sizeof(RTHCPHYS));
     CHECK_MEMBER_ALIGNMENT(HMCPU, vmx.u32ProcCtls, 8);
-    CHECK_MEMBER_ALIGNMENT(HMCPU, Event.uIntrInfo, 8);
+    CHECK_MEMBER_ALIGNMENT(HMCPU, Event.u64IntrInfo, 8);
 
     /* Make sure the set is large enough and has the correct size. */