Changeset 44506 in vbox for trunk/src/VBox/Devices/Bus
- Timestamp:
- Feb 1, 2013 11:12:13 AM (12 years ago)
- svn:sync-xref-src-repo-rev:
- 83542
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Bus/DevPCI.cpp
r44310 r44506 5 5 6 6 /* 7 * Copyright (C) 2006-20 07Oracle Corporation7 * Copyright (C) 2006-2013 Oracle Corporation 8 8 * 9 9 * This file is part of VirtualBox Open Source Edition (OSE), as … … 222 222 223 223 #ifdef IN_RING3 224 DECLINLINE(PPCIDEVICE) pci FindBridge(PPCIBUS pBus, uint8_t iBus);224 DECLINLINE(PPCIDEVICE) pciR3FindBridge(PPCIBUS pBus, uint8_t iBus); 225 225 #endif 226 226 … … 242 242 243 243 #ifdef IN_RING3 244 244 245 static void pci_update_mappings(PCIDevice *d) 245 246 { … … 501 502 { 502 503 #ifdef IN_RING3 /** @todo do lookup in R0/RC too! */ 503 PPCIDEVICE pBridgeDevice = pci FindBridge(&pGlobals->PciBus, iBus);504 PPCIDEVICE pBridgeDevice = pciR3FindBridge(&pGlobals->PciBus, iBus); 504 505 if (pBridgeDevice) 505 506 { … … 547 548 { 548 549 #ifdef IN_RING3 /** @todo do lookup in R0/RC too! */ 549 PPCIDEVICE pBridgeDevice = pci FindBridge(&pGlobals->PciBus, iBus);550 PPCIDEVICE pBridgeDevice = pciR3FindBridge(&pGlobals->PciBus, iBus); 550 551 if (pBridgeDevice) 551 552 { … … 757 758 758 759 #ifdef IN_RING3 760 759 761 /** 760 762 * Finds a bridge on the bus which contains the destination bus. … … 765 767 * @param iBus Destination bus number. 766 768 */ 767 DECLINLINE(PPCIDEVICE) pci FindBridge(PPCIBUS pBus, uint8_t iBus)769 DECLINLINE(PPCIDEVICE) pciR3FindBridge(PPCIBUS pBus, uint8_t iBus) 768 770 { 769 771 /* Search for a fitting bridge. */ … … 787 789 } 788 790 789 static void p iix3_reset(PIIX3State *d)791 static void pciR3Piix3Reset(PIIX3State *d) 790 792 { 791 793 uint8_t *pci_conf = d->dev.config; … … 1247 1249 * @param pSSM The handle to save the state to. 1248 1250 */ 1249 static DECLCALLBACK(int) pci GenericSaveExec(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSM)1251 static DECLCALLBACK(int) pciR3GenericSaveExec(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSM) 1250 1252 { 1251 1253 NOREF(pDevIns); … … 1262 1264 * @param pSSM The handle to the saved state. 1263 1265 */ 1264 static DECLCALLBACK(int) pci GenericLoadExec(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSM)1266 static DECLCALLBACK(int) pciR3GenericLoadExec(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSM) 1265 1267 { 1266 1268 NOREF(pDevIns); … … 1687 1689 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique. 1688 1690 */ 1689 static int pciR egisterInternal(PPCIBUS pBus, int iDev, PPCIDEVICE pPciDev, const char *pszName)1691 static int pciR3RegisterDeviceInternal(PPCIBUS pBus, int iDev, PPCIDEVICE pPciDev, const char *pszName) 1690 1692 { 1691 1693 /* … … 1829 1831 * @param iDev The PCI device number. Use a negative value for auto assigning one. 1830 1832 */ 1831 static DECLCALLBACK(int) pciR egister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev)1833 static DECLCALLBACK(int) pciR3Register(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev) 1832 1834 { 1833 1835 PPCIBUS pBus = DEVINS_2_PCIBUS(pDevIns); … … 1848 1850 * Register the device. 1849 1851 */ 1850 return pciRegisterInternal(pBus, iDev, pPciDev, pszName); 1851 } 1852 1853 1854 static DECLCALLBACK(int) pciIORegionRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback) 1852 return pciR3RegisterDeviceInternal(pBus, iDev, pPciDev, pszName); 1853 } 1854 1855 1856 static DECLCALLBACK(int) pciR3CommonIORegionRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, 1857 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback) 1855 1858 { 1856 1859 NOREF(pDevIns); … … 1895 1898 * @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksR3 1896 1899 */ 1897 static DECLCALLBACK(void) pci SetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,1898 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)1900 static DECLCALLBACK(void) pciR3CommonSetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld, 1901 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld) 1899 1902 { 1900 1903 NOREF(pDevIns); … … 1916 1919 * @param pDevIns Device instance of the first bus. 1917 1920 */ 1918 static DECLCALLBACK(int) pci FakePCIBIOS(PPDMDEVINS pDevIns)1921 static DECLCALLBACK(int) pciR3FakePCIBIOS(PPDMDEVINS pDevIns) 1919 1922 { 1920 1923 unsigned i; … … 1976 1979 * @param pszArgs Argument string. Optional and specific to the handler. 1977 1980 */ 1978 static DECLCALLBACK(void) pci IrqInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)1981 static DECLCALLBACK(void) pciR3IrqInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) 1979 1982 { 1980 1983 PPCIGLOBALS pGlobals = PDMINS_2_DATA(pDevIns, PPCIGLOBALS); … … 1998 2001 } 1999 2002 2000 static void printIndent(PCDBGFINFOHLP pHlp, int iIndent) 2001 { 2002 for (int i = 0; i < iIndent; i++) 2003 { 2003 static void pciR3PrintIndent(PCDBGFINFOHLP pHlp, int iIndent) 2004 { 2005 while (iIndent-- > 0) 2004 2006 pHlp->pfnPrintf(pHlp, " "); 2005 } 2006 } 2007 2008 static void pciBusInfo(PPCIBUS pBus, PCDBGFINFOHLP pHlp, int iIndent, bool fRegisters) 2007 } 2008 2009 static void pciR3BusInfo(PPCIBUS pBus, PCDBGFINFOHLP pHlp, int iIndent, bool fRegisters) 2009 2010 { 2010 2011 for (uint32_t iDev = 0; iDev < RT_ELEMENTS(pBus->devices); iDev++) … … 2013 2014 if (pPciDev != NULL) 2014 2015 { 2015 p rintIndent(pHlp, iIndent);2016 pciR3PrintIndent(pHlp, iIndent); 2016 2017 2017 2018 /* … … 2062 2063 } 2063 2064 2064 p rintIndent(pHlp, iIndent + 2);2065 pciR3PrintIndent(pHlp, iIndent + 2); 2065 2066 pHlp->pfnPrintf(pHlp, "%s region #%d: %x..%x\n", 2066 2067 pszDesc, iRegion, u32Addr, u32Addr+iRegionSize); … … 2070 2071 } 2071 2072 2072 p rintIndent(pHlp, iIndent + 2);2073 pciR3PrintIndent(pHlp, iIndent + 2); 2073 2074 uint16_t iStatus = PCIDevGetWord(pPciDev, VBOX_PCI_STATUS); 2074 2075 pHlp->pfnPrintf(pHlp, "Command: %.*Rhxs, Status: %.*Rhxs\n", 2075 2076 sizeof(uint16_t), &iCmd, sizeof(uint16_t), &iStatus); 2076 p rintIndent(pHlp, iIndent + 2);2077 pciR3PrintIndent(pHlp, iIndent + 2); 2077 2078 pHlp->pfnPrintf(pHlp, "Bus master: %s\n", 2078 2079 iCmd & VBOX_PCI_COMMAND_MASTER ? "Yes" : "No"); … … 2080 2081 if (fRegisters) 2081 2082 { 2082 p rintIndent(pHlp, iIndent + 2);2083 pciR3PrintIndent(pHlp, iIndent + 2); 2083 2084 pHlp->pfnPrintf(pHlp, "PCI registers:\n"); 2084 2085 for (int iReg = 0; iReg < 0x100; ) … … 2086 2087 int iPerLine = 0x10; 2087 2088 Assert (0x100 % iPerLine == 0); 2088 p rintIndent(pHlp, iIndent + 3);2089 pciR3PrintIndent(pHlp, iIndent + 3); 2089 2090 2090 2091 while (iPerLine-- > 0) … … 2100 2101 if (pBus->cBridges > 0) 2101 2102 { 2102 p rintIndent(pHlp, iIndent);2103 pciR3PrintIndent(pHlp, iIndent); 2103 2104 pHlp->pfnPrintf(pHlp, "Registered %d bridges, subordinate buses info follows\n", pBus->cBridges); 2104 2105 for (uint32_t iBridge = 0; iBridge < pBus->cBridges; iBridge++) 2105 2106 { 2106 2107 PPCIBUS pBusSub = PDMINS_2_DATA(pBus->papBridgesR3[iBridge]->pDevIns, PPCIBUS); 2107 pci BusInfo(pBusSub, pHlp, iIndent + 1, fRegisters);2108 pciR3BusInfo(pBusSub, pHlp, iIndent + 1, fRegisters); 2108 2109 } 2109 2110 } … … 2117 2118 * @param pszArgs Argument string. Optional and specific to the handler. 2118 2119 */ 2119 static DECLCALLBACK(void) pci Info(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)2120 static DECLCALLBACK(void) pciR3Info(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) 2120 2121 { 2121 2122 PPCIBUS pBus = DEVINS_2_PCIBUS(pDevIns); 2122 2123 2123 2124 if (pszArgs == NULL || !*pszArgs || !strcmp(pszArgs, "basic")) 2124 pci BusInfo(pBus, pHlp, 0, false);2125 pciR3BusInfo(pBus, pHlp, 0, false); 2125 2126 else if (!strcmp(pszArgs, "verbose")) 2126 pci BusInfo(pBus, pHlp, 0, true);2127 pciR3BusInfo(pBus, pHlp, 0, true); 2127 2128 else 2128 2129 pHlp->pfnPrintf(pHlp, "Invalid argument. Recognized arguments are 'basic', 'verbose'.\n"); … … 2132 2133 * @copydoc FNPDMDEVRELOCATE 2133 2134 */ 2134 static DECLCALLBACK(void) pciR elocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)2135 static DECLCALLBACK(void) pciR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta) 2135 2136 { 2136 2137 PPCIGLOBALS pGlobals = PDMINS_2_DATA(pDevIns, PPCIGLOBALS); … … 2153 2154 * @copydoc FNPDMDEVRESET 2154 2155 */ 2155 static DECLCALLBACK(void) pciR eset(PPDMDEVINS pDevIns)2156 { 2157 pci FakePCIBIOS(pDevIns);2156 static DECLCALLBACK(void) pciR3Reset(PPDMDEVINS pDevIns) 2157 { 2158 pciR3FakePCIBIOS(pDevIns); 2158 2159 } 2159 2160 … … 2161 2162 * @interface_method_impl{PDMDEVREG,pfnConstruct} 2162 2163 */ 2163 static DECLCALLBACK(int) pci Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)2164 static DECLCALLBACK(int) pciR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg) 2164 2165 { 2165 2166 Assert(iInstance == 0); … … 2211 2212 pGlobals->PciBus.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns); 2212 2213 pGlobals->PciBus.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 2213 pGlobals->PciBus.papBridgesR3 = (PPCIDEVICE *)PDMDevHlpMMHeapAllocZ(pDevIns, sizeof(PPCIDEVICE) * RT_ELEMENTS(pGlobals->PciBus.devices)); 2214 pGlobals->PciBus.papBridgesR3 = (PPCIDEVICE *)PDMDevHlpMMHeapAllocZ(pDevIns, sizeof(PPCIDEVICE) 2215 * RT_ELEMENTS(pGlobals->PciBus.devices)); 2214 2216 2215 2217 PDMPCIBUSREG PciBusReg; 2216 2218 PPCIBUS pBus = &pGlobals->PciBus; 2217 2219 PciBusReg.u32Version = PDM_PCIBUSREG_VERSION; 2218 PciBusReg.pfnRegisterR3 = pciR egister;2220 PciBusReg.pfnRegisterR3 = pciR3Register; 2219 2221 PciBusReg.pfnRegisterMsiR3 = NULL; 2220 PciBusReg.pfnIORegionRegisterR3 = pci IORegionRegister;2221 PciBusReg.pfnSetConfigCallbacksR3 = pci SetConfigCallbacks;2222 PciBusReg.pfnIORegionRegisterR3 = pciR3CommonIORegionRegister; 2223 PciBusReg.pfnSetConfigCallbacksR3 = pciR3CommonSetConfigCallbacks; 2222 2224 PciBusReg.pfnSetIrqR3 = pciSetIrq; 2223 PciBusReg.pfnSaveExecR3 = pci GenericSaveExec;2224 PciBusReg.pfnLoadExecR3 = pci GenericLoadExec;2225 PciBusReg.pfnFakePCIBIOSR3 = pci FakePCIBIOS;2225 PciBusReg.pfnSaveExecR3 = pciR3GenericSaveExec; 2226 PciBusReg.pfnLoadExecR3 = pciR3GenericLoadExec; 2227 PciBusReg.pfnFakePCIBIOSR3 = pciR3FakePCIBIOS; 2226 2228 PciBusReg.pszSetIrqRC = fGCEnabled ? "pciSetIrq" : NULL; 2227 2229 PciBusReg.pszSetIrqR0 = fR0Enabled ? "pciSetIrq" : NULL; … … 2255 2257 pBus->PciDev.pDevIns = pDevIns; 2256 2258 pciDevSetRequestedDevfunc(&pBus->PciDev); 2257 pciR egisterInternal(pBus, 0, &pBus->PciDev, "i440FX");2259 pciR3RegisterDeviceInternal(pBus, 0, &pBus->PciDev, "i440FX"); 2258 2260 2259 2261 /* PIIX3 */ … … 2266 2268 pGlobals->PIIX3State.dev.pDevIns = pDevIns; 2267 2269 pciDevSetRequestedDevfunc(&pGlobals->PIIX3State.dev); 2268 pciR egisterInternal(pBus, 8, &pGlobals->PIIX3State.dev, "PIIX3");2269 p iix3_reset(&pGlobals->PIIX3State);2270 pciR3RegisterDeviceInternal(pBus, 8, &pGlobals->PIIX3State.dev, "PIIX3"); 2271 pciR3Piix3Reset(&pGlobals->PIIX3State); 2270 2272 2271 2273 pBus->iDevSearch = 16; … … 2306 2308 return rc; 2307 2309 2308 PDMDevHlpDBGFInfoRegister(pDevIns, "pci", "Display PCI bus status. Recognizes 'basic' or 'verbose' "2309 "as arguments, defaults to 'basic'.", pciInfo);2310 2311 PDMDevHlpDBGFInfoRegister(pDevIns, "pciirq", "Display PCI IRQ routing state. (no arguments)", pci IrqInfo);2310 PDMDevHlpDBGFInfoRegister(pDevIns, "pci", 2311 "Display PCI bus status. Recognizes 'basic' or 'verbose' as arguments, defaults to 'basic'.", 2312 pciR3Info); 2313 PDMDevHlpDBGFInfoRegister(pDevIns, "pciirq", "Display PCI IRQ routing state. (no arguments)", pciR3IrqInfo); 2312 2314 2313 2315 return VINF_SUCCESS; … … 2339 2341 sizeof(PCIGLOBALS), 2340 2342 /* pfnConstruct */ 2341 pci Construct,2343 pciR3Construct, 2342 2344 /* pfnDestruct */ 2343 2345 NULL, 2344 2346 /* pfnRelocate */ 2345 pciR elocate,2347 pciR3Relocate, 2346 2348 /* pfnIOCtl */ 2347 2349 NULL, … … 2349 2351 NULL, 2350 2352 /* pfnReset */ 2351 pciR eset,2353 pciR3Reset, 2352 2354 /* pfnSuspend */ 2353 2355 NULL, … … 2413 2415 #ifdef IN_RING3 2414 2416 2415 static void pcibridgeConfigWrite(PPDMDEVINSR3 pDevIns, uint8_t iBus, uint8_t iDevice, uint32_t u32Address, uint32_t u32Value, unsigned cb) 2417 /** 2418 * @callback_method_impl{FNPCIBRIDGECONFIGWRITE} 2419 */ 2420 static void pcibridgeR3ConfigWrite(PPDMDEVINSR3 pDevIns, uint8_t iBus, uint8_t iDevice, uint32_t u32Address, uint32_t u32Value, unsigned cb) 2416 2421 { 2417 2422 PPCIBUS pBus = PDMINS_2_DATA(pDevIns, PPCIBUS); … … 2422 2427 if (iBus != pBus->PciDev.config[VBOX_PCI_SECONDARY_BUS]) 2423 2428 { 2424 PPCIDEVICE pBridgeDevice = pci FindBridge(pBus, iBus);2429 PPCIDEVICE pBridgeDevice = pciR3FindBridge(pBus, iBus); 2425 2430 if (pBridgeDevice) 2426 2431 { … … 2441 2446 } 2442 2447 2443 static uint32_t pcibridgeConfigRead(PPDMDEVINSR3 pDevIns, uint8_t iBus, uint8_t iDevice, uint32_t u32Address, unsigned cb) 2448 /** 2449 * @callback_method_impl{FNPCIBRIDGECONFIGREAD} 2450 */ 2451 static uint32_t pcibridgeR3ConfigRead(PPDMDEVINSR3 pDevIns, uint8_t iBus, uint8_t iDevice, uint32_t u32Address, unsigned cb) 2444 2452 { 2445 2453 PPCIBUS pBus = PDMINS_2_DATA(pDevIns, PPCIBUS); … … 2451 2459 if (iBus != pBus->PciDev.config[VBOX_PCI_SECONDARY_BUS]) 2452 2460 { 2453 PPCIDEVICE pBridgeDevice = pci FindBridge(pBus, iBus);2461 PPCIDEVICE pBridgeDevice = pciR3FindBridge(pBus, iBus); 2454 2462 if (pBridgeDevice) 2455 2463 { … … 2506 2514 * @param iDev The PCI device number. Use a negative value for auto assigning one. 2507 2515 */ 2508 static DECLCALLBACK(int) pcibridgeR egister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev)2516 static DECLCALLBACK(int) pcibridgeR3RegisterDevice(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev) 2509 2517 { 2510 2518 PPCIBUS pBus = PDMINS_2_DATA(pDevIns, PPCIBUS); … … 2524 2532 * Register the device. 2525 2533 */ 2526 return pciR egisterInternal(pBus, iDev, pPciDev, pszName);2534 return pciR3RegisterDeviceInternal(pBus, iDev, pPciDev, pszName); 2527 2535 } 2528 2536 … … 2531 2539 * @copydoc FNPDMDEVRESET 2532 2540 */ 2533 static DECLCALLBACK(void) pcibridgeR eset(PPDMDEVINS pDevIns)2541 static DECLCALLBACK(void) pcibridgeR3Reset(PPDMDEVINS pDevIns) 2534 2542 { 2535 2543 PPCIBUS pBus = PDMINS_2_DATA(pDevIns, PPCIBUS); … … 2545 2553 * @copydoc FNPDMDEVRELOCATE 2546 2554 */ 2547 static DECLCALLBACK(void) pcibridgeR elocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)2555 static DECLCALLBACK(void) pcibridgeR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta) 2548 2556 { 2549 2557 PPCIBUS pBus = PDMINS_2_DATA(pDevIns, PPCIBUS); … … 2562 2570 * @interface_method_impl{PDMDEVREG,pfnConstruct} 2563 2571 */ 2564 static DECLCALLBACK(int) pcibridge Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)2572 static DECLCALLBACK(int) pcibridgeR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg) 2565 2573 { 2566 2574 PDMDEV_CHECK_VERSIONS_RETURN(pDevIns); … … 2598 2606 PDMPCIBUSREG PciBusReg; 2599 2607 PciBusReg.u32Version = PDM_PCIBUSREG_VERSION; 2600 PciBusReg.pfnRegisterR3 = pcibridgeR egister;2608 PciBusReg.pfnRegisterR3 = pcibridgeR3RegisterDevice; 2601 2609 PciBusReg.pfnRegisterMsiR3 = NULL; 2602 PciBusReg.pfnIORegionRegisterR3 = pci IORegionRegister;2603 PciBusReg.pfnSetConfigCallbacksR3 = pci SetConfigCallbacks;2610 PciBusReg.pfnIORegionRegisterR3 = pciR3CommonIORegionRegister; 2611 PciBusReg.pfnSetConfigCallbacksR3 = pciR3CommonSetConfigCallbacks; 2604 2612 PciBusReg.pfnSetIrqR3 = pcibridgeSetIrq; 2605 PciBusReg.pfnSaveExecR3 = pci GenericSaveExec;2606 PciBusReg.pfnLoadExecR3 = pci GenericLoadExec;2613 PciBusReg.pfnSaveExecR3 = pciR3GenericSaveExec; 2614 PciBusReg.pfnLoadExecR3 = pciR3GenericLoadExec; 2607 2615 PciBusReg.pfnFakePCIBIOSR3 = NULL; /* Only needed for the first bus. */ 2608 2616 PciBusReg.pszSetIrqRC = fGCEnabled ? "pcibridgeSetIrq" : NULL; … … 2644 2652 /* Bridge-specific data */ 2645 2653 pciDevSetPci2PciBridge(&pBus->PciDev); 2646 pBus->PciDev.Int.s.pfnBridgeConfigRead = pcibridge ConfigRead;2647 pBus->PciDev.Int.s.pfnBridgeConfigWrite = pcibridge ConfigWrite;2654 pBus->PciDev.Int.s.pfnBridgeConfigRead = pcibridgeR3ConfigRead; 2655 pBus->PciDev.Int.s.pfnBridgeConfigWrite = pcibridgeR3ConfigWrite; 2648 2656 2649 2657 /* … … 2705 2713 sizeof(PCIBUS), 2706 2714 /* pfnConstruct */ 2707 pcibridge Construct,2715 pcibridgeR3Construct, 2708 2716 /* pfnDestruct */ 2709 2717 NULL, 2710 2718 /* pfnRelocate */ 2711 pcibridgeR elocate,2719 pcibridgeR3Relocate, 2712 2720 /* pfnIOCtl */ 2713 2721 NULL, … … 2715 2723 NULL, 2716 2724 /* pfnReset */ 2717 pcibridgeR eset,2725 pcibridgeR3Reset, 2718 2726 /* pfnSuspend */ 2719 2727 NULL,
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