Changeset 44514 in vbox for trunk/src/VBox/Devices/PC
- Timestamp:
- Feb 1, 2013 2:26:03 PM (12 years ago)
- Location:
- trunk/src/VBox/Devices/PC
- Files:
-
- 1 added
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/PC/ACPI/VBoxAcpi.cpp
r35346 r44514 5 5 6 6 /* 7 * Copyright (C) 2009 Oracle Corporation7 * Copyright (C) 2009-2013 Oracle Corporation 8 8 * 9 9 * This file is part of VirtualBox Open Source Edition (OSE), as … … 16 16 */ 17 17 18 19 /******************************************************************************* 20 * Header Files * 21 *******************************************************************************/ 22 #include <iprt/cdefs.h> 18 23 #if !defined(IN_RING3) 19 # error Pure R3 code24 # error Pure R3 code 20 25 #endif 21 26 … … 42 47 #endif 43 48 49 #include "VBoxDD.h" 50 51 44 52 #ifdef VBOX_WITH_DYNAMIC_DSDT 45 static int prepareDynamicDsdt(PPDMDEVINS pDevIns, 46 void* *ppPtr, 47 size_t *puDsdtLen) 48 { 49 *ppPtr = NULL; 50 *puDsdtLen = 0; 53 54 static int prepareDynamicDsdt(PPDMDEVINS pDevIns, void **ppvPtr, size_t *pcbDsdt) 55 { 56 *ppvPtr = NULL; 57 *pcbDsdt = 0; 51 58 return 0; 52 59 } 53 60 54 static int cleanupDynamicDsdt(PPDMDEVINS pDevIns, 55 void* pPtr) 61 static int cleanupDynamicDsdt(PPDMDEVINS pDevIns, void *pvPtr) 56 62 { 57 63 return 0; 58 64 } 59 65 60 #else 61 static int patchAml(PPDMDEVINS pDevIns, uint8_t* pAml, size_t uAmlLen) 66 #else /* VBOX_WITH_DYNAMIC_DSDT */ 67 68 static int patchAml(PPDMDEVINS pDevIns, uint8_t *pabAml, size_t cbAml) 62 69 { 63 70 uint16_t cNumCpus; … … 85 92 * for VCPU not configured 86 93 */ 87 for (uint32_t i = 0; i < uAmlLen- 7; i++)94 for (uint32_t i = 0; i < cbAml - 7; i++) 88 95 { 89 96 /* … … 97 104 * PblkLen := ByteData 98 105 */ 99 if ( (pAml[i] == 0x5b) && (pAml[i+1] == 0x83))100 { 101 if ( (pAml[i+3] != 'C') || (pAml[i+4] != 'P'))106 if (pabAml[i] == 0x5b && pabAml[i+1] == 0x83) 107 { 108 if (pabAml[i+3] != 'C' || pabAml[i+4] != 'P') 102 109 /* false alarm, not named starting CP */ 103 110 continue; 104 111 105 112 /* Processor ID */ 106 if (p Aml[i+7] < cNumCpus)113 if (pabAml[i+7] < cNumCpus) 107 114 continue; 108 115 … … 112 119 * for full format 113 120 */ 114 uint32_t cBytes = p Aml[i + 2];121 uint32_t cBytes = pabAml[i + 2]; 115 122 AssertReleaseMsg((cBytes >> 6) == 0, 116 123 ("So far, we only understand simple package length")); … … 118 125 /* including AML_PROCESSOR_OP itself */ 119 126 for (uint32_t j = 0; j < cBytes + 2; j++) 120 p Aml[i+j] = 0xa3;127 pabAml[i+j] = 0xa3; 121 128 122 129 /* Can increase i by cBytes + 1, but not really worth it */ … … 125 132 126 133 /* now recompute checksum, whole file byte sum must be 0 */ 127 p Aml[9] = 0;128 uint8_t aSum = 0;129 for (uint32_t i = 0; i < uAmlLen; i++)130 aSum = aSum + (uint8_t)pAml[i];131 p Aml[9] = (uint8_t) (0 - aSum);134 pabAml[9] = 0; 135 uint8_t bSum = 0; 136 for (uint32_t i = 0; i < cbAml; i++) 137 bSum = bSum + pabAml[i]; 138 pabAml[9] = (uint8_t)(0 - bSum); 132 139 133 140 return 0; … … 138 145 * only contain the ACPI containers which may have a CPU 139 146 */ 140 static int patchAmlCpuHotPlug(PPDMDEVINS pDevIns, uint8_t * pAml, size_t uAmlLen)147 static int patchAmlCpuHotPlug(PPDMDEVINS pDevIns, uint8_t *pabAml, size_t cbAml) 141 148 { 142 149 uint16_t cNumCpus; … … 156 163 * for VCPU not configured 157 164 */ 158 while (idxAml < uAmlLen- 7)165 while (idxAml < cbAml - 7) 159 166 { 160 167 /* … … 164 171 * DeviceOp := ExtOpPrefix 0x82 165 172 */ 166 if ( (pAml[idxAml] == 0x5b) && (pAml[idxAml+1] == 0x82))173 if (pabAml[idxAml] == 0x5b && pabAml[idxAml+1] == 0x82) 167 174 { 168 175 /* Check if the enclosed CPU device is configured. */ 169 uint8_t *p bAmlPkgLength = &pAml[idxAml+2];176 uint8_t *pabAmlPkgLength = &pabAml[idxAml+2]; 170 177 uint32_t cBytes = 0; 171 uint32_t cLengthBytesFollow = p bAmlPkgLength[0] >> 6;178 uint32_t cLengthBytesFollow = pabAmlPkgLength[0] >> 6; 172 179 173 180 if (cLengthBytesFollow == 0) 174 181 { 175 182 /* Simple package length */ 176 cBytes = p bAmlPkgLength[0];183 cBytes = pabAmlPkgLength[0]; 177 184 } 178 185 else … … 180 187 unsigned idxLengthByte = 1; 181 188 182 cBytes = p bAmlPkgLength[0] & 0xF;189 cBytes = pabAmlPkgLength[0] & 0xF; 183 190 184 191 while (idxLengthByte <= cLengthBytesFollow) 185 192 { 186 cBytes |= p bAmlPkgLength[idxLengthByte] << (4*idxLengthByte);193 cBytes |= pabAmlPkgLength[idxLengthByte] << (4*idxLengthByte); 187 194 idxLengthByte++; 188 195 } 189 196 } 190 197 191 uint8_t *p bAmlDevName = &pbAmlPkgLength[cLengthBytesFollow+1];192 uint8_t *p bAmlCpu = &pbAmlDevName[4];198 uint8_t *pabAmlDevName = &pabAmlPkgLength[cLengthBytesFollow+1]; 199 uint8_t *pabAmlCpu = &pabAmlDevName[4]; 193 200 bool fCpuConfigured = false; 194 201 bool fCpuFound = false; 195 202 196 if ((p bAmlDevName[0] != 'S') || (pbAmlDevName[1] != 'C') || (pbAmlDevName[2] != 'K'))203 if ((pabAmlDevName[0] != 'S') || (pabAmlDevName[1] != 'C') || (pabAmlDevName[2] != 'K')) 197 204 { 198 205 /* false alarm, not named starting SCK */ … … 213 220 * PblkLen := ByteData 214 221 */ 215 if ((p bAmlCpu[idxAmlCpu] == 0x5b) && (pbAmlCpu[idxAmlCpu+1] == 0x83))222 if ((pabAmlCpu[idxAmlCpu] == 0x5b) && (pabAmlCpu[idxAmlCpu+1] == 0x83)) 216 223 { 217 if ((p bAmlCpu[idxAmlCpu+4] != 'C') || (pbAmlCpu[idxAmlCpu+5] != 'P'))224 if ((pabAmlCpu[idxAmlCpu+4] != 'C') || (pabAmlCpu[idxAmlCpu+5] != 'P')) 218 225 /* false alarm, not named starting CP */ 219 226 continue; … … 222 229 223 230 /* Processor ID */ 224 if (p bAmlCpu[idxAmlCpu+8] < cNumCpus)231 if (pabAmlCpu[idxAmlCpu+8] < cNumCpus) 225 232 { 226 LogFlow(("CPU %d is configured\n", p bAmlCpu[idxAmlCpu+8]));233 LogFlow(("CPU %d is configured\n", pabAmlCpu[idxAmlCpu+8])); 227 234 fCpuConfigured = true; 228 235 break; … … 230 237 else 231 238 { 232 LogFlow(("CPU %d is not configured\n", p bAmlCpu[idxAmlCpu+8]));239 LogFlow(("CPU %d is not configured\n", pabAmlCpu[idxAmlCpu+8])); 233 240 fCpuConfigured = false; 234 241 break; … … 249 256 /* including AML_DEVICE_OP itself */ 250 257 for (uint32_t j = 0; j < cBytes + 2; j++) 251 p Aml[idxAml+j] = 0xa3;258 pabAml[idxAml+j] = 0xa3; 252 259 } 253 260 … … 259 266 260 267 /* now recompute checksum, whole file byte sum must be 0 */ 261 p Aml[9] = 0;262 uint8_t aSum = 0;263 for (uint32_t i = 0; i < uAmlLen; i++)264 aSum = aSum + (uint8_t)pAml[i];265 p Aml[9] = (uint8_t) (0 - aSum);268 pabAml[9] = 0; 269 uint8_t bSum = 0; 270 for (uint32_t i = 0; i < cbAml; i++) 271 bSum = bSum + pabAml[i]; 272 pabAml[9] = (uint8_t)(0 - bSum); 266 273 267 274 return 0; 268 275 } 269 #endif 276 277 #endif /* VBOX_WITH_DYNAMIC_DSDT */ 270 278 271 279 /** … … 276 284 * @param pcszCfgName The configuration key holding the file path 277 285 * @param pcszSignature The signature to check for 278 * @param pp bAmlCode Where to store the pointer to the AML code on success.286 * @param ppabAmlCode Where to store the pointer to the AML code on success. 279 287 * @param pcbAmlCode Where to store the number of bytes of the AML code on success. 280 288 */ 281 static int acpiAmlLoadExternal(PPDMDEVINS pDevIns, const char *pcszCfgName, const char *pcszSignature, uint8_t **pp bAmlCode, size_t *pcbAmlCode)282 { 283 uint8_t *p bAmlCode = NULL;289 static int acpiAmlLoadExternal(PPDMDEVINS pDevIns, const char *pcszCfgName, const char *pcszSignature, uint8_t **ppabAmlCode, size_t *pcbAmlCode) 290 { 291 uint8_t *pabAmlCode = NULL; 284 292 size_t cbAmlCode = 0; 285 293 char *pszAmlFilePath = NULL; … … 307 315 && ((uint64_t)cbAmlCode == cbAmlFile)) 308 316 { 309 p bAmlCode = (uint8_t *)RTMemAllocZ(cbAmlCode);310 if (p bAmlCode)317 pabAmlCode = (uint8_t *)RTMemAllocZ(cbAmlCode); 318 if (pabAmlCode) 311 319 { 312 rc = RTFileReadAt(FileAml, 0, p bAmlCode, cbAmlCode, NULL);320 rc = RTFileReadAt(FileAml, 0, pabAmlCode, cbAmlCode, NULL); 313 321 314 322 /* … … 317 325 */ 318 326 if ( RT_FAILURE(rc) 319 || strncmp((const char *)p bAmlCode, pcszSignature, 4))327 || strncmp((const char *)pabAmlCode, pcszSignature, 4)) 320 328 { 321 RTMemFree(p bAmlCode);322 p bAmlCode = NULL;329 RTMemFree(pabAmlCode); 330 pabAmlCode = NULL; 323 331 324 332 /* Return error if file header check failed */ … … 328 336 else 329 337 { 330 *pp bAmlCode = pbAmlCode;338 *ppabAmlCode = pabAmlCode; 331 339 *pcbAmlCode = cbAmlCode; 332 340 rc = VINF_SUCCESS; … … 345 353 } 346 354 347 /* Two only public functions */ 348 int acpiPrepareDsdt(PPDMDEVINS pDevIns, void * *ppPtr, size_t *puDsdtLen) 355 356 /** No docs, lazy coder. */ 357 int acpiPrepareDsdt(PPDMDEVINS pDevIns, void **ppvPtr, size_t *pcbDsdt) 349 358 { 350 359 #ifdef VBOX_WITH_DYNAMIC_DSDT 351 return prepareDynamicDsdt(pDevIns, pp Ptr, puDsdtLen);360 return prepareDynamicDsdt(pDevIns, ppvPtr, pcbDsdt); 352 361 #else 353 uint8_t *p bAmlCodeDsdt = NULL;362 uint8_t *pabAmlCodeDsdt = NULL; 354 363 size_t cbAmlCodeDsdt = 0; 355 int rc = acpiAmlLoadExternal(pDevIns, "DsdtFilePath", "DSDT", &p bAmlCodeDsdt, &cbAmlCodeDsdt);364 int rc = acpiAmlLoadExternal(pDevIns, "DsdtFilePath", "DSDT", &pabAmlCodeDsdt, &cbAmlCodeDsdt); 356 365 357 366 if (rc == VERR_CFGM_VALUE_NOT_FOUND) … … 361 370 /* Use the compiled in AML code */ 362 371 cbAmlCodeDsdt = sizeof(AmlCode); 363 p bAmlCodeDsdt = (uint8_t *)RTMemAllocZ(cbAmlCodeDsdt);364 if (p bAmlCodeDsdt)365 memcpy(p bAmlCodeDsdt, AmlCode, cbAmlCodeDsdt);372 pabAmlCodeDsdt = (uint8_t *)RTMemAllocZ(cbAmlCodeDsdt); 373 if (pabAmlCodeDsdt) 374 memcpy(pabAmlCodeDsdt, AmlCode, cbAmlCodeDsdt); 366 375 else 367 376 rc = VERR_NO_MEMORY; … … 373 382 if (RT_SUCCESS(rc)) 374 383 { 375 patchAml(pDevIns, p bAmlCodeDsdt, cbAmlCodeDsdt);376 *pp Ptr = pbAmlCodeDsdt;377 *p uDsdtLen= cbAmlCodeDsdt;384 patchAml(pDevIns, pabAmlCodeDsdt, cbAmlCodeDsdt); 385 *ppvPtr = pabAmlCodeDsdt; 386 *pcbDsdt = cbAmlCodeDsdt; 378 387 } 379 388 return rc; … … 381 390 } 382 391 383 int acpiCleanupDsdt(PPDMDEVINS pDevIns, void * pPtr) 392 /** No docs, lazy coder. */ 393 int acpiCleanupDsdt(PPDMDEVINS pDevIns, void *pvPtr) 384 394 { 385 395 #ifdef VBOX_WITH_DYNAMIC_DSDT 386 return cleanupDynamicDsdt(pDevIns, p Ptr);396 return cleanupDynamicDsdt(pDevIns, pvPtr); 387 397 #else 388 if (p Ptr)389 RTMemFree(p Ptr);398 if (pvPtr) 399 RTMemFree(pvPtr); 390 400 return VINF_SUCCESS; 391 401 #endif 392 402 } 393 403 394 int acpiPrepareSsdt(PPDMDEVINS pDevIns, void* *ppPtr, size_t *puSsdtLen) 395 { 396 uint8_t *pbAmlCodeSsdt = NULL; 404 /** No docs, lazy coder. */ 405 int acpiPrepareSsdt(PPDMDEVINS pDevIns, void **ppvPtr, size_t *pcbSsdt) 406 { 407 uint8_t *pabAmlCodeSsdt = NULL; 397 408 size_t cbAmlCodeSsdt = 0; 398 int rc = acpiAmlLoadExternal(pDevIns, "SsdtFilePath", "SSDT", &p bAmlCodeSsdt, &cbAmlCodeSsdt);409 int rc = acpiAmlLoadExternal(pDevIns, "SsdtFilePath", "SSDT", &pabAmlCodeSsdt, &cbAmlCodeSsdt); 399 410 400 411 if (rc == VERR_CFGM_VALUE_NOT_FOUND) 401 412 { 402 413 bool fCpuHotPlug = false; 403 uint8_t *p bAmlCode = NULL;414 uint8_t *pabAmlCode = NULL; 404 415 rc = CFGMR3QueryBoolDef(pDevIns->pCfg, "CpuHotPlug", &fCpuHotPlug, false); 405 416 … … 409 420 if (fCpuHotPlug) 410 421 { 411 p bAmlCode = AmlCodeSsdtCpuHotPlug;422 pabAmlCode = AmlCodeSsdtCpuHotPlug; 412 423 cbAmlCodeSsdt = sizeof(AmlCodeSsdtCpuHotPlug); 413 424 } 414 425 else 415 426 { 416 p bAmlCode = AmlCodeSsdtStandard;427 pabAmlCode = AmlCodeSsdtStandard; 417 428 cbAmlCodeSsdt = sizeof(AmlCodeSsdtStandard); 418 429 } 419 430 420 p bAmlCodeSsdt = (uint8_t *)RTMemAllocZ(cbAmlCodeSsdt);421 if (p bAmlCodeSsdt)422 { 423 memcpy(p bAmlCodeSsdt, pbAmlCode, cbAmlCodeSsdt);431 pabAmlCodeSsdt = (uint8_t *)RTMemAllocZ(cbAmlCodeSsdt); 432 if (pabAmlCodeSsdt) 433 { 434 memcpy(pabAmlCodeSsdt, pabAmlCode, cbAmlCodeSsdt); 424 435 425 436 if (fCpuHotPlug) 426 patchAmlCpuHotPlug(pDevIns, p bAmlCodeSsdt, cbAmlCodeSsdt);437 patchAmlCpuHotPlug(pDevIns, pabAmlCodeSsdt, cbAmlCodeSsdt); 427 438 else 428 patchAml(pDevIns, p bAmlCodeSsdt, cbAmlCodeSsdt);439 patchAml(pDevIns, pabAmlCodeSsdt, cbAmlCodeSsdt); 429 440 } 430 441 else … … 437 448 if (RT_SUCCESS(rc)) 438 449 { 439 *pp Ptr = pbAmlCodeSsdt;440 *p uSsdtLen= cbAmlCodeSsdt;450 *ppvPtr = pabAmlCodeSsdt; 451 *pcbSsdt = cbAmlCodeSsdt; 441 452 } 442 453 … … 444 455 } 445 456 446 int acpiCleanupSsdt(PPDMDEVINS pDevIns, void* pPtr) 447 { 448 if (pPtr) 449 RTMemFree(pPtr); 457 /** No docs, lazy coder. */ 458 int acpiCleanupSsdt(PPDMDEVINS pDevIns, void *pvPtr) 459 { 460 if (pvPtr) 461 RTMemFree(pvPtr); 450 462 return VINF_SUCCESS; 451 463 } -
trunk/src/VBox/Devices/PC/DevACPI.cpp
r44447 r44514 5 5 6 6 /* 7 * Copyright (C) 2006-201 1Oracle Corporation7 * Copyright (C) 2006-2013 Oracle Corporation 8 8 * 9 9 * This file is part of VirtualBox Open Source Edition (OSE), as … … 41 41 # define DEBUG_ACPI 42 42 #endif 43 44 #if defined(IN_RING3) && !defined(VBOX_DEVICE_STRUCT_TESTCASE)45 int acpiPrepareDsdt(PPDMDEVINS pDevIns, void* *ppPtr, size_t *puDsdtLen);46 int acpiCleanupDsdt(PPDMDEVINS pDevIns, void* pPtr);47 48 int acpiPrepareSsdt(PPDMDEVINS pDevIns, void* *ppPtr, size_t *puSsdtLen);49 int acpiCleanupSsdt(PPDMDEVINS pDevIns, void* pPtr);50 #endif /* !IN_RING3 */51 43 52 44 … … 249 241 * 4. Note that the _STA method is sometimes called prior to the _INI method 250 242 * (ACPI spec 6.3.7, _STA). See the special case for BAT_DEVICE_STATUS in 251 * acpi BatIndexWrite() for handling this. */243 * acpiR3BatIndexWrite() for handling this. */ 252 244 uint8_t u8IndexShift; 253 245 /** provide an I/O-APIC */ … … 601 593 AssertCompileSize(ACPITBLMCFGENTRY, 16); 602 594 603 # ifdef IN_RING3 /** @todo r=bird: Move this down to where it's used. */ 604 605 # define PCAT_COMPAT 0x1 /**< system has also a dual-8259 setup */ 595 #define PCAT_COMPAT 0x1 /**< system has also a dual-8259 setup */ 606 596 607 597 /** Custom Description Table */ … … 613 603 AssertCompileSize(ACPITBLCUST, 512); 614 604 615 /**616 * Multiple APIC Description Table.617 *618 * This structure looks somewhat convoluted due layout of MADT table in MP case.619 * There extpected to be multiple LAPIC records for each CPU, thus we cannot620 * use regular C structure and proxy to raw memory instead.621 */622 class AcpiTableMADT623 {624 /**625 * All actual data stored in dynamically allocated memory pointed by this field.626 */627 uint8_t *m_pbData;628 /**629 * Number of CPU entries in this MADT.630 */631 uint32_t m_cCpus;632 633 /**634 * Number of interrupt overrides.635 */636 uint32_t m_cIsos;637 638 public:639 /**640 * Address of ACPI header641 */642 inline ACPITBLHEADER *header_addr(void) const643 {644 return (ACPITBLHEADER *)m_pbData;645 }646 647 /**648 * Address of local APIC for each CPU. Note that different CPUs address different LAPICs,649 * although address is the same for all of them.650 */651 inline uint32_t *u32LAPIC_addr(void) const652 {653 return (uint32_t *)(header_addr() + 1);654 }655 656 /**657 * Address of APIC flags658 */659 inline uint32_t *u32Flags_addr(void) const660 {661 return (uint32_t *)(u32LAPIC_addr() + 1);662 }663 664 /**665 * Address of ISO description666 */667 inline ACPITBLISO *ISO_addr(void) const668 {669 return (ACPITBLISO *)(u32Flags_addr() + 1);670 }671 672 /**673 * Address of per-CPU LAPIC descriptions674 */675 inline ACPITBLLAPIC *LApics_addr(void) const676 {677 return (ACPITBLLAPIC *)(ISO_addr() + m_cIsos);678 }679 680 /**681 * Address of IO APIC description682 */683 inline ACPITBLIOAPIC *IOApic_addr(void) const684 {685 return (ACPITBLIOAPIC *)(LApics_addr() + m_cCpus);686 }687 688 /**689 * Size of MADT.690 * Note that this function assumes IOApic to be the last field in structure.691 */692 inline uint32_t size(void) const693 {694 return (uint8_t *)(IOApic_addr() + 1) - (uint8_t *)header_addr();695 }696 697 /**698 * Raw data of MADT.699 */700 inline const uint8_t *data(void) const701 {702 return m_pbData;703 }704 705 /**706 * Size of MADT for given ACPI config, useful to compute layout.707 */708 static uint32_t sizeFor(ACPIState *pThis, uint32_t cIsos)709 {710 return AcpiTableMADT(pThis->cCpus, cIsos).size();711 }712 713 /*714 * Constructor, only works in Ring 3, doesn't look like a big deal.715 */716 AcpiTableMADT(uint32_t cCpus, uint32_t cIsos)717 {718 m_cCpus = cCpus;719 m_cIsos = cIsos;720 m_pbData = NULL; /* size() uses this and gcc will complain if not initialized. */721 uint32_t cb = size();722 m_pbData = (uint8_t *)RTMemAllocZ(cb);723 }724 725 ~AcpiTableMADT()726 {727 RTMemFree(m_pbData);728 }729 };730 # endif /* IN_RING3 */731 605 732 606 #pragma pack() … … 741 615 RT_C_DECLS_END 742 616 #ifdef IN_RING3 743 static int acpi PlantTables(ACPIState *pThis);617 static int acpiR3PlantTables(ACPIState *pThis); 744 618 #endif 745 619 … … 747 621 748 622 /* SCI IRQ */ 749 DECLINLINE(void) acpi SetIrq(ACPIState *pThis, int level)623 DECLINLINE(void) acpiR3SetIrq(ACPIState *pThis, int level) 750 624 { 751 625 if (pThis->pm1a_ctl & SCI_EN) … … 768 642 } 769 643 770 DECLINLINE( int) gpe0_level(ACPIState *pThis)644 DECLINLINE(bool) gpe0_level(ACPIState *pThis) 771 645 { 772 646 return (pThis->gpe0_en & pThis->gpe0_sts) != 0; … … 774 648 775 649 /** 776 * Used by acpi PM1aStsWrite, acpiPM1aEnWrite, acpiPmTimer,777 * acpi Port_PowerBuffonPress and acpiPort_SleepButtonPress to650 * Used by acpiR3PM1aStsWrite, acpiR3PM1aEnWrite, acpiR3PmTimer, 651 * acpiR3Port_PowerBuffonPress and acpiR3Port_SleepButtonPress to 778 652 * update the GPE0.STS and GPE0.EN registers and trigger IRQs. 779 653 * … … 784 658 * @param en The new GPE0.EN value. 785 659 */ 786 static void update_pm1a(ACPIState *pThis, uint32_t sts, uint32_t en)660 static void apicR3UpdatePm1a(ACPIState *pThis, uint32_t sts, uint32_t en) 787 661 { 788 662 Assert(PDMCritSectIsOwner(&pThis->CritSect)); … … 794 668 int const new_level = (pm1a_pure_en(en) & pm1a_pure_sts(sts)) != 0; 795 669 796 Log((" update_pm1a() old=%x new=%x\n", old_level, new_level));670 Log(("apicR3UpdatePm1a() old=%x new=%x\n", old_level, new_level)); 797 671 798 672 pThis->pm1a_en = en; … … 800 674 801 675 if (new_level != old_level) 802 acpi SetIrq(pThis, new_level);803 } 804 805 /** 806 * Used by acpi Gpe0StsWrite, acpiGpe0EnWrite, acpiAttach and acpiDetach to676 acpiR3SetIrq(pThis, new_level); 677 } 678 679 /** 680 * Used by acpiR3Gpe0StsWrite, acpiR3Gpe0EnWrite, acpiAttach and acpiDetach to 807 681 * update the GPE0.STS and GPE0.EN registers and trigger IRQs. 808 682 * … … 813 687 * @param en The new GPE0.EN value. 814 688 */ 815 static void update_gpe0(ACPIState *pThis, uint32_t sts, uint32_t en)689 static void apicR3UpdateGpe0(ACPIState *pThis, uint32_t sts, uint32_t en) 816 690 { 817 691 Assert(PDMCritSectIsOwner(&pThis->CritSect)); … … 827 701 828 702 if (new_level != old_level) 829 acpi SetIrq(pThis, new_level);830 } 831 832 /** 833 * Used by acpi PM1aCtlWrite to power off the VM.703 acpiR3SetIrq(pThis, new_level); 704 } 705 706 /** 707 * Used by acpiR3PM1aCtlWrite to power off the VM. 834 708 * 835 709 * @param pThis The ACPI instance. 836 710 * @returns Strict VBox status code. 837 711 */ 838 static int acpi PowerOff(ACPIState *pThis)712 static int acpiR3DoPowerOff(ACPIState *pThis) 839 713 { 840 714 int rc = PDMDevHlpVMPowerOff(pThis->pDevIns); … … 845 719 846 720 /** 847 * Used by acpi PM1aCtlWrite to put the VM to sleep.721 * Used by acpiR3PM1aCtlWrite to put the VM to sleep. 848 722 * 849 723 * @param pThis The ACPI instance. 850 724 * @returns Strict VBox status code. 851 725 */ 852 static int acpi Sleep(ACPIState *pThis)726 static int acpiR3DoSleep(ACPIState *pThis) 853 727 { 854 728 /* We must set WAK_STS on resume (includes restore) so the guest knows that … … 881 755 * @interface_method_impl{PDMIACPIPORT,pfnPowerButtonPress} 882 756 */ 883 static DECLCALLBACK(int) acpi Port_PowerButtonPress(PPDMIACPIPORT pInterface)757 static DECLCALLBACK(int) acpiR3Port_PowerButtonPress(PPDMIACPIPORT pInterface) 884 758 { 885 759 ACPIState *pThis = RT_FROM_MEMBER(pInterface, ACPIState, IACPIPort); 886 760 DEVACPI_LOCK_R3(pThis); 887 761 888 Log(("acpi Port_PowerButtonPress: handled=%d status=%x\n", pThis->fPowerButtonHandled, pThis->pm1a_sts));762 Log(("acpiR3Port_PowerButtonPress: handled=%d status=%x\n", pThis->fPowerButtonHandled, pThis->pm1a_sts)); 889 763 pThis->fPowerButtonHandled = false; 890 update_pm1a(pThis, pThis->pm1a_sts | PWRBTN_STS, pThis->pm1a_en);764 apicR3UpdatePm1a(pThis, pThis->pm1a_sts | PWRBTN_STS, pThis->pm1a_en); 891 765 892 766 DEVACPI_UNLOCK(pThis); … … 897 771 * @interface_method_impl{PDMIACPIPORT,pfnGetPowerButtonHandled} 898 772 */ 899 static DECLCALLBACK(int) acpi Port_GetPowerButtonHandled(PPDMIACPIPORT pInterface, bool *pfHandled)773 static DECLCALLBACK(int) acpiR3Port_GetPowerButtonHandled(PPDMIACPIPORT pInterface, bool *pfHandled) 900 774 { 901 775 ACPIState *pThis = RT_FROM_MEMBER(pInterface, ACPIState, IACPIPort); … … 912 786 * Guest entered into G0 (working) or G1 (sleeping)} 913 787 */ 914 static DECLCALLBACK(int) acpi Port_GetGuestEnteredACPIMode(PPDMIACPIPORT pInterface, bool *pfEntered)788 static DECLCALLBACK(int) acpiR3Port_GetGuestEnteredACPIMode(PPDMIACPIPORT pInterface, bool *pfEntered) 915 789 { 916 790 ACPIState *pThis = RT_FROM_MEMBER(pInterface, ACPIState, IACPIPort); … … 926 800 * @interface_method_impl{PDMIACPIPORT,pfnGetCpuStatus} 927 801 */ 928 static DECLCALLBACK(int) acpi Port_GetCpuStatus(PPDMIACPIPORT pInterface, unsigned uCpu, bool *pfLocked)802 static DECLCALLBACK(int) acpiR3Port_GetCpuStatus(PPDMIACPIPORT pInterface, unsigned uCpu, bool *pfLocked) 929 803 { 930 804 ACPIState *pThis = RT_FROM_MEMBER(pInterface, ACPIState, IACPIPort); … … 943 817 * @param pInterface Pointer to the interface structure containing the called function pointer. 944 818 */ 945 static DECLCALLBACK(int) acpi Port_SleepButtonPress(PPDMIACPIPORT pInterface)819 static DECLCALLBACK(int) acpiR3Port_SleepButtonPress(PPDMIACPIPORT pInterface) 946 820 { 947 821 ACPIState *pThis = RT_FROM_MEMBER(pInterface, ACPIState, IACPIPort); 948 822 DEVACPI_LOCK_R3(pThis); 949 823 950 update_pm1a(pThis, pThis->pm1a_sts | SLPBTN_STS, pThis->pm1a_en);824 apicR3UpdatePm1a(pThis, pThis->pm1a_sts | SLPBTN_STS, pThis->pm1a_en); 951 825 952 826 DEVACPI_UNLOCK(pThis); … … 955 829 956 830 /** 957 * Used by acpi PmTimer to re-arm the PM timer.831 * Used by acpiR3PmTimer to re-arm the PM timer. 958 832 * 959 833 * The caller is expected to either hold the clock lock or to have made sure … … 963 837 * @param uNow The current time. 964 838 */ 965 static void acpi PmTimerReset(ACPIState *pThis, uint64_t uNow)839 static void acpiR3PmTimerReset(ACPIState *pThis, uint64_t uNow) 966 840 { 967 841 uint64_t uTimerFreq = TMTimerGetFreq(pThis->CTX_SUFF(pPmTimer)); … … 974 848 * @callback_method_impl{FNTMTIMERDEV, PM Timer callback} 975 849 */ 976 static DECLCALLBACK(void) acpi PmTimer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)850 static DECLCALLBACK(void) acpiR3PmTimer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser) 977 851 { 978 852 ACPIState *pThis = (ACPIState *)pvUser; … … 984 858 pThis->pm1a_sts, (pThis->pm1a_sts & TMR_STS) != 0, 985 859 pThis->pm1a_en, (pThis->pm1a_en & TMR_EN) != 0)); 986 update_pm1a(pThis, pThis->pm1a_sts | TMR_STS, pThis->pm1a_en);860 apicR3UpdatePm1a(pThis, pThis->pm1a_sts | TMR_STS, pThis->pm1a_en); 987 861 DEVACPI_UNLOCK(pThis); 988 862 989 acpi PmTimerReset(pThis, TMTimerGet(pTimer));990 } 991 992 /** 993 * _BST method - used by acpi BatDataRead to implement BAT_STATUS_STATE and994 * acpi LoadState.863 acpiR3PmTimerReset(pThis, TMTimerGet(pTimer)); 864 } 865 866 /** 867 * _BST method - used by acpiR3BatDataRead to implement BAT_STATUS_STATE and 868 * acpiR3LoadState. 995 869 * 996 870 * @returns VINF_SUCCESS. 997 871 * @param pThis The ACPI instance. 998 872 */ 999 static int acpi FetchBatteryStatus(ACPIState *pThis)873 static int acpiR3FetchBatteryStatus(ACPIState *pThis) 1000 874 { 1001 875 uint32_t *p = pThis->au8BatteryInfo; … … 1029 903 1030 904 /** 1031 * _BIF method - used by acpi BatDataRead to implement BAT_INFO_UNITS and1032 * acpi LoadState.905 * _BIF method - used by acpiR3BatDataRead to implement BAT_INFO_UNITS and 906 * acpiR3LoadState. 1033 907 * 1034 908 * @returns VINF_SUCCESS. 1035 909 * @param pThis The ACPI instance. 1036 910 */ 1037 static int acpi FetchBatteryInfo(ACPIState *pThis)911 static int acpiR3FetchBatteryInfo(ACPIState *pThis) 1038 912 { 1039 913 uint32_t *p = pThis->au8BatteryInfo; … … 1053 927 1054 928 /** 1055 * The _STA method - used by acpi BatDataRead to implement BAT_DEVICE_STATUS.929 * The _STA method - used by acpiR3BatDataRead to implement BAT_DEVICE_STATUS. 1056 930 * 1057 931 * @returns status mask or 0. 1058 932 * @param pThis The ACPI instance. 1059 933 */ 1060 static uint32_t acpi GetBatteryDeviceStatus(ACPIState *pThis)934 static uint32_t acpiR3GetBatteryDeviceStatus(ACPIState *pThis) 1061 935 { 1062 936 bool fPresent; /* battery present? */ … … 1082 956 1083 957 /** 1084 * Used by acpi BatDataRead to implement BAT_POWER_SOURCE.958 * Used by acpiR3BatDataRead to implement BAT_POWER_SOURCE. 1085 959 * 1086 960 * @returns status. 1087 961 * @param pThis The ACPI instance. 1088 962 */ 1089 static uint32_t acpi GetPowerSource(ACPIState *pThis)963 static uint32_t acpiR3GetPowerSource(ACPIState *pThis) 1090 964 { 1091 965 /* query the current power source from the host driver */ … … 1102 976 * @callback_method_impl{FNIOMIOPORTOUT, Battery status index} 1103 977 */ 1104 PDMBOTHCBDECL(int) acpi BatIndexWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)1105 { 1106 Log(("acpi BatIndexWrite: %#x (%#x)\n", u32, u32 >> 2));978 PDMBOTHCBDECL(int) acpiR3BatIndexWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 979 { 980 Log(("acpiR3BatIndexWrite: %#x (%#x)\n", u32, u32 >> 2)); 1107 981 if (cb != 4) 1108 982 return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u u32=%#x\n", cb, Port, u32); … … 1128 1002 * @callback_method_impl{FNIOMIOPORTIN, Battery status data} 1129 1003 */ 1130 PDMBOTHCBDECL(int) acpi BatDataRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)1004 PDMBOTHCBDECL(int) acpiR3BatDataRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) 1131 1005 { 1132 1006 if (cb != 4) … … 1140 1014 { 1141 1015 case BAT_STATUS_STATE: 1142 acpi FetchBatteryStatus(pThis);1016 acpiR3FetchBatteryStatus(pThis); 1143 1017 /* fall thru */ 1144 1018 case BAT_STATUS_PRESENT_RATE: … … 1149 1023 1150 1024 case BAT_INFO_UNITS: 1151 acpi FetchBatteryInfo(pThis);1025 acpiR3FetchBatteryInfo(pThis); 1152 1026 /* fall thru */ 1153 1027 case BAT_INFO_DESIGN_CAPACITY: … … 1163 1037 1164 1038 case BAT_DEVICE_STATUS: 1165 *pu32 = acpi GetBatteryDeviceStatus(pThis);1039 *pu32 = acpiR3GetBatteryDeviceStatus(pThis); 1166 1040 break; 1167 1041 1168 1042 case BAT_POWER_SOURCE: 1169 *pu32 = acpi GetPowerSource(pThis);1043 *pu32 = acpiR3GetPowerSource(pThis); 1170 1044 break; 1171 1045 … … 1183 1057 * @callback_method_impl{FNIOMIOPORTOUT, System info index} 1184 1058 */ 1185 PDMBOTHCBDECL(int) acpi SysInfoIndexWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)1186 { 1187 Log(("acpi SysInfoIndexWrite: %#x (%#x)\n", u32, u32 >> 2));1059 PDMBOTHCBDECL(int) acpiR3SysInfoIndexWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 1060 { 1061 Log(("acpiR3SysInfoIndexWrite: %#x (%#x)\n", u32, u32 >> 2)); 1188 1062 if (cb != 4) 1189 1063 return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u u32=%#x\n", cb, Port, u32); … … 1215 1089 * @callback_method_impl{FNIOMIOPORTIN, System info data} 1216 1090 */ 1217 PDMBOTHCBDECL(int) acpi SysInfoDataRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)1091 PDMBOTHCBDECL(int) acpiR3SysInfoDataRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) 1218 1092 { 1219 1093 if (cb != 4) … … 1385 1259 1386 1260 DEVACPI_UNLOCK(pThis); 1387 Log(("acpi SysInfoDataRead: idx=%d val=%#x (%d) rc=%Rrc\n", uSystemInfoIndex, *pu32, *pu32, rc));1261 Log(("acpiR3SysInfoDataRead: idx=%d val=%#x (%d) rc=%Rrc\n", uSystemInfoIndex, *pu32, *pu32, rc)); 1388 1262 return rc; 1389 1263 } … … 1392 1266 * @callback_method_impl{FNIOMIOPORTOUT, System info data} 1393 1267 */ 1394 PDMBOTHCBDECL(int) acpi SysInfoDataWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)1268 PDMBOTHCBDECL(int) acpiR3SysInfoDataWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 1395 1269 { 1396 1270 ACPIState *pThis = (ACPIState *)pvUser; … … 1437 1311 * @callback_method_impl{FNIOMIOPORTIN, PM1a Enable} 1438 1312 */ 1439 PDMBOTHCBDECL(int) acpi Pm1aEnRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)1313 PDMBOTHCBDECL(int) acpiR3Pm1aEnRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) 1440 1314 { 1441 1315 NOREF(pDevIns); NOREF(Port); … … 1449 1323 1450 1324 DEVACPI_UNLOCK(pThis); 1451 Log(("acpi Pm1aEnRead -> %#x\n", *pu32));1325 Log(("acpiR3Pm1aEnRead -> %#x\n", *pu32)); 1452 1326 return VINF_SUCCESS; 1453 1327 } … … 1456 1330 * @callback_method_impl{FNIOMIOPORTOUT, PM1a Enable} 1457 1331 */ 1458 PDMBOTHCBDECL(int) acpi PM1aEnWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)1332 PDMBOTHCBDECL(int) acpiR3PM1aEnWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 1459 1333 { 1460 1334 if (cb != 2 && cb != 4) … … 1464 1338 DEVACPI_LOCK_R3(pThis); 1465 1339 1466 Log(("acpi PM1aEnWrite: %#x (%#x)\n", u32, u32 & ~(RSR_EN | IGN_EN) & 0xffff));1340 Log(("acpiR3PM1aEnWrite: %#x (%#x)\n", u32, u32 & ~(RSR_EN | IGN_EN) & 0xffff)); 1467 1341 u32 &= ~(RSR_EN | IGN_EN); 1468 1342 u32 &= 0xffff; 1469 update_pm1a(pThis, pThis->pm1a_sts, u32);1343 apicR3UpdatePm1a(pThis, pThis->pm1a_sts, u32); 1470 1344 1471 1345 DEVACPI_UNLOCK(pThis); … … 1476 1350 * @callback_method_impl{FNIOMIOPORTIN, PM1a Status} 1477 1351 */ 1478 PDMBOTHCBDECL(int) acpi Pm1aStsRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)1352 PDMBOTHCBDECL(int) acpiR3Pm1aStsRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) 1479 1353 { 1480 1354 if (cb != 2) … … 1490 1364 1491 1365 DEVACPI_UNLOCK(pThis); 1492 Log(("acpi Pm1aStsRead: %#x\n", *pu32));1366 Log(("acpiR3Pm1aStsRead: %#x\n", *pu32)); 1493 1367 return VINF_SUCCESS; 1494 1368 } … … 1497 1371 * @callback_method_impl{FNIOMIOPORTOUT, PM1a Status} 1498 1372 */ 1499 PDMBOTHCBDECL(int) acpi PM1aStsWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)1373 PDMBOTHCBDECL(int) acpiR3PM1aStsWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 1500 1374 { 1501 1375 if (cb != 2 && cb != 4) … … 1505 1379 DEVACPI_LOCK_R3(pThis); 1506 1380 1507 Log(("acpi PM1aStsWrite: %#x (%#x)\n", u32, u32 & ~(RSR_STS | IGN_STS) & 0xffff));1381 Log(("acpiR3PM1aStsWrite: %#x (%#x)\n", u32, u32 & ~(RSR_STS | IGN_STS) & 0xffff)); 1508 1382 u32 &= 0xffff; 1509 1383 if (u32 & PWRBTN_STS) 1510 1384 pThis->fPowerButtonHandled = true; /* Remember that the guest handled the last power button event */ 1511 1385 u32 = pThis->pm1a_sts & ~(u32 & ~(RSR_STS | IGN_STS)); 1512 update_pm1a(pThis, u32, pThis->pm1a_en);1386 apicR3UpdatePm1a(pThis, u32, pThis->pm1a_en); 1513 1387 1514 1388 DEVACPI_UNLOCK(pThis); … … 1519 1393 * @callback_method_impl{FNIOMIOPORTIN, PM1a Control} 1520 1394 */ 1521 PDMBOTHCBDECL(int) acpi Pm1aCtlRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)1395 PDMBOTHCBDECL(int) acpiR3Pm1aCtlRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) 1522 1396 { 1523 1397 if (cb != 2) … … 1533 1407 1534 1408 DEVACPI_UNLOCK(pThis); 1535 Log(("acpi Pm1aCtlRead: %#x\n", *pu32));1409 Log(("acpiR3Pm1aCtlRead: %#x\n", *pu32)); 1536 1410 return VINF_SUCCESS; 1537 1411 } … … 1540 1414 * @callback_method_impl{FNIOMIOPORTOUT, PM1a Control} 1541 1415 */ 1542 PDMBOTHCBDECL(int) acpi PM1aCtlWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)1416 PDMBOTHCBDECL(int) acpiR3PM1aCtlWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 1543 1417 { 1544 1418 if (cb != 2 && cb != 4) … … 1548 1422 DEVACPI_LOCK_R3(pThis); 1549 1423 1550 Log(("acpi PM1aCtlWrite: %#x (%#x)\n", u32, u32 & ~(RSR_CNT | IGN_CNT) & 0xffff));1424 Log(("acpiR3PM1aCtlWrite: %#x (%#x)\n", u32, u32 & ~(RSR_CNT | IGN_CNT) & 0xffff)); 1551 1425 u32 &= 0xffff; 1552 1426 pThis->pm1a_ctl = u32 & ~(RSR_CNT | IGN_CNT); … … 1566 1440 { 1567 1441 LogRel(("Entering S1 power state (powered-on suspend)\n")); 1568 rc = acpi Sleep(pThis);1442 rc = acpiR3DoSleep(pThis); 1569 1443 break; 1570 1444 } … … 1576 1450 { 1577 1451 LogRel(("Entering S4 power state (suspend to disk)\n")); 1578 rc = acpi PowerOff(pThis);/* Same behavior as S5 */1452 rc = acpiR3DoPowerOff(pThis);/* Same behavior as S5 */ 1579 1453 break; 1580 1454 } … … 1584 1458 case 0x05: /* S5 */ 1585 1459 LogRel(("Entering S5 power state (power down)\n")); 1586 rc = acpi PowerOff(pThis);1460 rc = acpiR3DoPowerOff(pThis); 1587 1461 break; 1588 1462 … … 1594 1468 1595 1469 DEVACPI_UNLOCK(pThis); 1596 Log(("acpi PM1aCtlWrite: rc=%Rrc\n", rc));1470 Log(("acpiR3PM1aCtlWrite: rc=%Rrc\n", rc)); 1597 1471 return rc; 1598 1472 } … … 1641 1515 * @callback_method_impl{FNIOMIOPORTIN, GPE0 Status} 1642 1516 */ 1643 PDMBOTHCBDECL(int) acpi Gpe0StsRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)1517 PDMBOTHCBDECL(int) acpiR3Gpe0StsRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) 1644 1518 { 1645 1519 if (cb != 1) … … 1655 1529 1656 1530 DEVACPI_UNLOCK(pThis); 1657 Log(("acpi Gpe0StsRead: %#x\n", *pu32));1531 Log(("acpiR3Gpe0StsRead: %#x\n", *pu32)); 1658 1532 return VINF_SUCCESS; 1659 1533 } … … 1662 1536 * @callback_method_impl{FNIOMIOPORTOUT, GPE0 Status} 1663 1537 */ 1664 PDMBOTHCBDECL(int) acpi Gpe0StsWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)1538 PDMBOTHCBDECL(int) acpiR3Gpe0StsWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 1665 1539 { 1666 1540 if (cb != 1) … … 1670 1544 DEVACPI_LOCK_R3(pThis); 1671 1545 1672 Log(("acpi Gpe0StsWrite: %#x (%#x)\n", u32, pThis->gpe0_sts & ~u32));1546 Log(("acpiR3Gpe0StsWrite: %#x (%#x)\n", u32, pThis->gpe0_sts & ~u32)); 1673 1547 u32 = pThis->gpe0_sts & ~u32; 1674 update_gpe0(pThis, u32, pThis->gpe0_en);1548 apicR3UpdateGpe0(pThis, u32, pThis->gpe0_en); 1675 1549 1676 1550 DEVACPI_UNLOCK(pThis); … … 1681 1555 * @callback_method_impl{FNIOMIOPORTIN, GPE0 Enable} 1682 1556 */ 1683 PDMBOTHCBDECL(int) acpi Gpe0EnRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)1557 PDMBOTHCBDECL(int) acpiR3Gpe0EnRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) 1684 1558 { 1685 1559 if (cb != 1) … … 1695 1569 1696 1570 DEVACPI_UNLOCK(pThis); 1697 Log(("acpi Gpe0EnRead: %#x\n", *pu32));1571 Log(("acpiR3Gpe0EnRead: %#x\n", *pu32)); 1698 1572 return VINF_SUCCESS; 1699 1573 } … … 1702 1576 * @callback_method_impl{FNIOMIOPORTOUT, GPE0 Enable} 1703 1577 */ 1704 PDMBOTHCBDECL(int) acpi Gpe0EnWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)1578 PDMBOTHCBDECL(int) acpiR3Gpe0EnWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 1705 1579 { 1706 1580 if (cb != 1) … … 1710 1584 DEVACPI_LOCK_R3(pThis); 1711 1585 1712 Log(("acpi Gpe0EnWrite: %#x\n", u32));1713 update_gpe0(pThis, pThis->gpe0_sts, u32);1586 Log(("acpiR3Gpe0EnWrite: %#x\n", u32)); 1587 apicR3UpdateGpe0(pThis, pThis->gpe0_sts, u32); 1714 1588 1715 1589 DEVACPI_UNLOCK(pThis); … … 1720 1594 * @callback_method_impl{FNIOMIOPORTOUT, SMI_CMD} 1721 1595 */ 1722 PDMBOTHCBDECL(int) acpi SmiWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)1723 { 1724 Log(("acpi SmiWrite %#x\n", u32));1596 PDMBOTHCBDECL(int) acpiR3SmiWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 1597 { 1598 Log(("acpiR3SmiWrite %#x\n", u32)); 1725 1599 if (cb != 1) 1726 1600 return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u u32=%#x\n", cb, Port, u32); … … 1734 1608 pThis->pm1a_ctl &= ~SCI_EN; 1735 1609 else 1736 Log(("acpi SmiWrite: %#x <- unknown value\n", u32));1610 Log(("acpiR3SmiWrite: %#x <- unknown value\n", u32)); 1737 1611 1738 1612 DEVACPI_UNLOCK(pThis); … … 1743 1617 * @{FNIOMIOPORTOUT, ACPI_RESET_BLK} 1744 1618 */ 1745 PDMBOTHCBDECL(int) acpiR esetWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)1746 { 1747 Log(("acpiR esetWrite: %#x\n", u32));1619 PDMBOTHCBDECL(int) acpiR3ResetWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 1620 { 1621 Log(("acpiR3ResetWrite: %#x\n", u32)); 1748 1622 NOREF(pvUser); 1749 1623 if (cb != 1) … … 1758 1632 } 1759 1633 else 1760 Log(("acpiR esetWrite: %#x <- unknown value\n", u32));1634 Log(("acpiR3ResetWrite: %#x <- unknown value\n", u32)); 1761 1635 1762 1636 return rc; … … 1768 1642 * @callback_method_impl{FNIOMIOPORTOUT, Debug hex value logger} 1769 1643 */ 1770 PDMBOTHCBDECL(int) acpi DhexWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)1644 PDMBOTHCBDECL(int) acpiR3DhexWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 1771 1645 { 1772 1646 NOREF(pvUser); … … 1790 1664 * @callback_method_impl{FNIOMIOPORTOUT, Debug char logger} 1791 1665 */ 1792 PDMBOTHCBDECL(int) acpi DchrWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)1666 PDMBOTHCBDECL(int) acpiR3DchrWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 1793 1667 { 1794 1668 NOREF(pvUser); … … 1813 1687 * @param offset The offset into the I/O space, or -1 if invalid. 1814 1688 */ 1815 static RTIOPORT acpi CalcPmPort(ACPIState *pThis, int32_t offset)1689 static RTIOPORT acpiR3CalcPmPort(ACPIState *pThis, int32_t offset) 1816 1690 { 1817 1691 Assert(pThis->uPmIoPortBase != 0); … … 1824 1698 1825 1699 /** 1826 * Called by acpi LoadState and acpiUpdatePmHandlers to register the PM1a, PM1700 * Called by acpiR3LoadState and acpiR3UpdatePmHandlers to register the PM1a, PM 1827 1701 * timer and GPE0 I/O ports. 1828 1702 * … … 1830 1704 * @param pThis The ACPI instance. 1831 1705 */ 1832 static int acpiR egisterPmHandlers(ACPIState *pThis)1706 static int acpiR3RegisterPmHandlers(ACPIState *pThis) 1833 1707 { 1834 1708 int rc = VINF_SUCCESS; … … 1836 1710 #define R(offset, cnt, writer, reader, description) \ 1837 1711 do { \ 1838 rc = PDMDevHlpIOPortRegister(pThis->pDevIns, acpi CalcPmPort(pThis, offset), cnt, pThis, writer, reader, \1712 rc = PDMDevHlpIOPortRegister(pThis->pDevIns, acpiR3CalcPmPort(pThis, offset), cnt, pThis, writer, reader, \ 1839 1713 NULL, NULL, description); \ 1840 1714 if (RT_FAILURE(rc)) \ … … 1843 1717 #define L (GPE0_BLK_LEN / 2) 1844 1718 1845 R(PM1a_EVT_OFFSET+2, 1, acpi PM1aEnWrite, acpiPm1aEnRead, "ACPI PM1a Enable");1846 R(PM1a_EVT_OFFSET, 1, acpi PM1aStsWrite, acpiPm1aStsRead, "ACPI PM1a Status");1847 R(PM1a_CTL_OFFSET, 1, acpi PM1aCtlWrite, acpiPm1aCtlRead, "ACPI PM1a Control");1719 R(PM1a_EVT_OFFSET+2, 1, acpiR3PM1aEnWrite, acpiR3Pm1aEnRead, "ACPI PM1a Enable"); 1720 R(PM1a_EVT_OFFSET, 1, acpiR3PM1aStsWrite, acpiR3Pm1aStsRead, "ACPI PM1a Status"); 1721 R(PM1a_CTL_OFFSET, 1, acpiR3PM1aCtlWrite, acpiR3Pm1aCtlRead, "ACPI PM1a Control"); 1848 1722 R(PM_TMR_OFFSET, 1, NULL, acpiPMTmrRead, "ACPI PM Timer"); 1849 R(GPE0_OFFSET + L, L, acpi Gpe0EnWrite, acpiGpe0EnRead, "ACPI GPE0 Enable");1850 R(GPE0_OFFSET, L, acpi Gpe0StsWrite, acpiGpe0StsRead, "ACPI GPE0 Status");1723 R(GPE0_OFFSET + L, L, acpiR3Gpe0EnWrite, acpiR3Gpe0EnRead, "ACPI GPE0 Enable"); 1724 R(GPE0_OFFSET, L, acpiR3Gpe0StsWrite, acpiR3Gpe0StsRead, "ACPI GPE0 Status"); 1851 1725 #undef L 1852 1726 #undef R … … 1855 1729 if (pThis->fGCEnabled) 1856 1730 { 1857 rc = PDMDevHlpIOPortRegisterRC(pThis->pDevIns, acpi CalcPmPort(pThis, PM_TMR_OFFSET),1731 rc = PDMDevHlpIOPortRegisterRC(pThis->pDevIns, acpiR3CalcPmPort(pThis, PM_TMR_OFFSET), 1858 1732 1, 0, NULL, "acpiPMTmrRead", 1859 1733 NULL, NULL, "ACPI PM Timer"); … … 1864 1738 if (pThis->fR0Enabled) 1865 1739 { 1866 rc = PDMDevHlpIOPortRegisterR0(pThis->pDevIns, acpi CalcPmPort(pThis, PM_TMR_OFFSET),1740 rc = PDMDevHlpIOPortRegisterR0(pThis->pDevIns, acpiR3CalcPmPort(pThis, PM_TMR_OFFSET), 1867 1741 1, 0, NULL, "acpiPMTmrRead", 1868 1742 NULL, NULL, "ACPI PM Timer"); … … 1874 1748 1875 1749 /** 1876 * Called by acpi LoadState and acpiUpdatePmHandlers to unregister the PM1a, PM1750 * Called by acpiR3LoadState and acpiR3UpdatePmHandlers to unregister the PM1a, PM 1877 1751 * timer and GPE0 I/O ports. 1878 1752 * … … 1880 1754 * @param pThis The ACPI instance. 1881 1755 */ 1882 static int acpi UnregisterPmHandlers(ACPIState *pThis)1756 static int acpiR3UnregisterPmHandlers(ACPIState *pThis) 1883 1757 { 1884 1758 #define U(offset, cnt) \ 1885 1759 do { \ 1886 int rc = PDMDevHlpIOPortDeregister(pThis->pDevIns, acpi CalcPmPort(pThis, offset), cnt); \1760 int rc = PDMDevHlpIOPortDeregister(pThis->pDevIns, acpiR3CalcPmPort(pThis, offset), cnt); \ 1887 1761 AssertRCReturn(rc, rc); \ 1888 1762 } while (0) … … 1902 1776 1903 1777 /** 1904 * Called by acpi PciConfigWrite and acpiReset to change the location of the1778 * Called by acpiR3PciConfigWrite and acpiReset to change the location of the 1905 1779 * PM1a, PM timer and GPE0 ports. 1906 1780 * … … 1910 1784 * @param NewIoPortBase The new base address of the I/O ports. 1911 1785 */ 1912 static int acpi UpdatePmHandlers(ACPIState *pThis, RTIOPORT NewIoPortBase)1786 static int acpiR3UpdatePmHandlers(ACPIState *pThis, RTIOPORT NewIoPortBase) 1913 1787 { 1914 1788 Log(("acpi: rebasing PM 0x%x -> 0x%x\n", pThis->uPmIoPortBase, NewIoPortBase)); 1915 1789 if (NewIoPortBase != pThis->uPmIoPortBase) 1916 1790 { 1917 int rc = acpi UnregisterPmHandlers(pThis);1791 int rc = acpiR3UnregisterPmHandlers(pThis); 1918 1792 if (RT_FAILURE(rc)) 1919 1793 return rc; … … 1921 1795 pThis->uPmIoPortBase = NewIoPortBase; 1922 1796 1923 rc = acpiR egisterPmHandlers(pThis);1797 rc = acpiR3RegisterPmHandlers(pThis); 1924 1798 if (RT_FAILURE(rc)) 1925 1799 return rc; 1926 1800 1927 1801 /* We have to update FADT table acccording to the new base */ 1928 rc = acpi PlantTables(pThis);1802 rc = acpiR3PlantTables(pThis); 1929 1803 AssertRC(rc); 1930 1804 if (RT_FAILURE(rc)) … … 1999 1873 * @callback_method_impl{FNSSMDEVSAVEEXEC} 2000 1874 */ 2001 static DECLCALLBACK(int) acpi SaveState(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle)1875 static DECLCALLBACK(int) acpiR3SaveState(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle) 2002 1876 { 2003 1877 ACPIState *pThis = PDMINS_2_DATA(pDevIns, ACPIState *); … … 2008 1882 * @callback_method_impl{FNSSMDEVLOADEXEC} 2009 1883 */ 2010 static DECLCALLBACK(int) acpiLoadState(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle, 2011 uint32_t uVersion, uint32_t uPass) 1884 static DECLCALLBACK(int) acpiR3LoadState(PPDMDEVINS pDevIns, PSSMHANDLE pSSMHandle, uint32_t uVersion, uint32_t uPass) 2012 1885 { 2013 1886 ACPIState *pThis = PDMINS_2_DATA(pDevIns, ACPIState *); … … 2018 1891 * successfully loaded. 2019 1892 */ 2020 int rc = acpi UnregisterPmHandlers(pThis);1893 int rc = acpiR3UnregisterPmHandlers(pThis); 2021 1894 if (RT_FAILURE(rc)) 2022 1895 return rc; … … 2039 1912 if (RT_SUCCESS(rc)) 2040 1913 { 2041 rc = acpiR egisterPmHandlers(pThis);1914 rc = acpiR3RegisterPmHandlers(pThis); 2042 1915 if (RT_FAILURE(rc)) 2043 1916 return rc; 2044 rc = acpi FetchBatteryStatus(pThis);1917 rc = acpiR3FetchBatteryStatus(pThis); 2045 1918 if (RT_FAILURE(rc)) 2046 1919 return rc; 2047 rc = acpi FetchBatteryInfo(pThis);1920 rc = acpiR3FetchBatteryInfo(pThis); 2048 1921 if (RT_FAILURE(rc)) 2049 1922 return rc; 2050 1923 TMTimerLock(pThis->pPmTimerR3, VERR_IGNORED); 2051 acpi PmTimerReset(pThis, TMTimerGet(pThis->pPmTimerR3));1924 acpiR3PmTimerReset(pThis, TMTimerGet(pThis->pPmTimerR3)); 2052 1925 TMTimerUnlock(pThis->pPmTimerR3); 2053 1926 } … … 2058 1931 * @interface_method_impl{PDMIBASE,pfnQueryInterface} 2059 1932 */ 2060 static DECLCALLBACK(void *) acpi QueryInterface(PPDMIBASE pInterface, const char *pszIID)1933 static DECLCALLBACK(void *) acpiR3QueryInterface(PPDMIBASE pInterface, const char *pszIID) 2061 1934 { 2062 1935 ACPIState *pThis = RT_FROM_MEMBER(pInterface, ACPIState, IBase); … … 2075 1948 * @param cbData The amount of data to checksum. 2076 1949 */ 2077 static uint8_t acpi Checksum(const void * const pvSrc, size_t cbData)1950 static uint8_t acpiR3Checksum(const void * const pvSrc, size_t cbData) 2078 1951 { 2079 1952 uint8_t const *pbSrc = (uint8_t const *)pvSrc; … … 2087 1960 * Prepare a ACPI table header. 2088 1961 */ 2089 static void acpi PrepareHeader(ACPIState *pThis, ACPITBLHEADER *header,2090 const char au8Signature[4],2091 uint32_t u32Length, uint8_t u8Revision)1962 static void acpiR3PrepareHeader(ACPIState *pThis, ACPITBLHEADER *header, 1963 const char au8Signature[4], 1964 uint32_t u32Length, uint8_t u8Revision) 2092 1965 { 2093 1966 memcpy(header->au8Signature, au8Signature, 4); … … 2105 1978 * Initialize a generic address structure (ACPIGENADDR). 2106 1979 */ 2107 static void acpi WriteGenericAddr(ACPIGENADDR *g, uint8_t u8AddressSpaceId,2108 uint8_t u8RegisterBitWidth, uint8_t u8RegisterBitOffset,2109 uint8_t u8AccessSize, uint64_t u64Address)1980 static void acpiR3WriteGenericAddr(ACPIGENADDR *g, uint8_t u8AddressSpaceId, 1981 uint8_t u8RegisterBitWidth, uint8_t u8RegisterBitOffset, 1982 uint8_t u8AccessSize, uint64_t u64Address) 2110 1983 { 2111 1984 g->u8AddressSpaceId = u8AddressSpaceId; … … 2119 1992 * Wrapper around PDMDevHlpPhysWrite used when planting ACPI tables. 2120 1993 */ 2121 static void acpiPhyscpy(ACPIState *pThis, RTGCPHYS32 dst, const void * const src, size_t size)2122 { 2123 PDMDevHlpPhysWrite(pThis->pDevIns, dst, src, size);1994 DECLINLINE(void) acpiR3PhysCopy(ACPIState *pThis, RTGCPHYS32 GCPhys32Dst, const void *pvSrc, size_t cbToCopy) 1995 { 1996 PDMDevHlpPhysWrite(pThis->pDevIns, GCPhys32Dst, pvSrc, cbToCopy); 2124 1997 } 2125 1998 … … 2127 2000 * Plant the Differentiated System Description Table (DSDT). 2128 2001 */ 2129 static void acpiSetupDSDT(ACPIState *pThis, RTGCPHYS32 addr, 2130 void* pPtr, size_t uDsdtLen) 2131 { 2132 acpiPhyscpy(pThis, addr, pPtr, uDsdtLen); 2002 static void acpiR3SetupDsdt(ACPIState *pThis, RTGCPHYS32 GCPhys32, void *pvPtr, size_t cbDsdt) 2003 { 2004 acpiR3PhysCopy(pThis, GCPhys32, pvPtr, cbDsdt); 2133 2005 } 2134 2006 … … 2136 2008 * Plan the Secondary System Description Table (SSDT). 2137 2009 */ 2138 static void acpi SetupSSDT(ACPIState *pThis, RTGCPHYS32 addr,2010 static void acpiR3SetupSsdt(ACPIState *pThis, RTGCPHYS32 addr, 2139 2011 void* pPtr, size_t uSsdtLen) 2140 2012 { 2141 acpi Physcpy(pThis, addr, pPtr, uSsdtLen);2013 acpiR3PhysCopy(pThis, addr, pPtr, uSsdtLen); 2142 2014 } 2143 2015 … … 2145 2017 * Plant the Firmware ACPI Control Structure (FACS). 2146 2018 */ 2147 static void acpi SetupFACS(ACPIState *pThis, RTGCPHYS32 addr)2019 static void acpiR3SetupFacs(ACPIState *pThis, RTGCPHYS32 addr) 2148 2020 { 2149 2021 ACPITBLFACS facs; … … 2159 2031 facs.u8Version = 1; 2160 2032 2161 acpi Physcpy(pThis, addr, (const uint8_t *)&facs, sizeof(facs));2033 acpiR3PhysCopy(pThis, addr, (const uint8_t *)&facs, sizeof(facs)); 2162 2034 } 2163 2035 … … 2165 2037 * Plant the Fixed ACPI Description Table (FADT aka FACP). 2166 2038 */ 2167 static void acpiSetupFADT(ACPIState *pThis, RTGCPHYS32 GCPhysAcpi1, RTGCPHYS32 GCPhysAcpi2, RTGCPHYS32 GCPhysFacs, RTGCPHYS GCPhysDsdt) 2039 static void acpiR3SetupFadt(ACPIState *pThis, RTGCPHYS32 GCPhysAcpi1, RTGCPHYS32 GCPhysAcpi2, 2040 RTGCPHYS32 GCPhysFacs, RTGCPHYS GCPhysDsdt) 2168 2041 { 2169 2042 ACPITBLFADT fadt; … … 2171 2044 /* First the ACPI version 2+ version of the structure. */ 2172 2045 memset(&fadt, 0, sizeof(fadt)); 2173 acpi PrepareHeader(pThis, &fadt.header, "FACP", sizeof(fadt), 4);2046 acpiR3PrepareHeader(pThis, &fadt.header, "FACP", sizeof(fadt), 4); 2174 2047 fadt.u32FACS = RT_H2LE_U32(GCPhysFacs); 2175 2048 fadt.u32DSDT = RT_H2LE_U32(GCPhysDsdt); … … 2182 2055 fadt.u8S4BIOSReq = 0; 2183 2056 fadt.u8PStateCnt = 0; 2184 fadt.u32PM1aEVTBLK = RT_H2LE_U32(acpi CalcPmPort(pThis, PM1a_EVT_OFFSET));2185 fadt.u32PM1bEVTBLK = RT_H2LE_U32(acpi CalcPmPort(pThis, PM1b_EVT_OFFSET));2186 fadt.u32PM1aCTLBLK = RT_H2LE_U32(acpi CalcPmPort(pThis, PM1a_CTL_OFFSET));2187 fadt.u32PM1bCTLBLK = RT_H2LE_U32(acpi CalcPmPort(pThis, PM1b_CTL_OFFSET));2188 fadt.u32PM2CTLBLK = RT_H2LE_U32(acpi CalcPmPort(pThis, PM2_CTL_OFFSET));2189 fadt.u32PMTMRBLK = RT_H2LE_U32(acpi CalcPmPort(pThis, PM_TMR_OFFSET));2190 fadt.u32GPE0BLK = RT_H2LE_U32(acpi CalcPmPort(pThis, GPE0_OFFSET));2191 fadt.u32GPE1BLK = RT_H2LE_U32(acpi CalcPmPort(pThis, GPE1_OFFSET));2057 fadt.u32PM1aEVTBLK = RT_H2LE_U32(acpiR3CalcPmPort(pThis, PM1a_EVT_OFFSET)); 2058 fadt.u32PM1bEVTBLK = RT_H2LE_U32(acpiR3CalcPmPort(pThis, PM1b_EVT_OFFSET)); 2059 fadt.u32PM1aCTLBLK = RT_H2LE_U32(acpiR3CalcPmPort(pThis, PM1a_CTL_OFFSET)); 2060 fadt.u32PM1bCTLBLK = RT_H2LE_U32(acpiR3CalcPmPort(pThis, PM1b_CTL_OFFSET)); 2061 fadt.u32PM2CTLBLK = RT_H2LE_U32(acpiR3CalcPmPort(pThis, PM2_CTL_OFFSET)); 2062 fadt.u32PMTMRBLK = RT_H2LE_U32(acpiR3CalcPmPort(pThis, PM_TMR_OFFSET)); 2063 fadt.u32GPE0BLK = RT_H2LE_U32(acpiR3CalcPmPort(pThis, GPE0_OFFSET)); 2064 fadt.u32GPE1BLK = RT_H2LE_U32(acpiR3CalcPmPort(pThis, GPE1_OFFSET)); 2192 2065 fadt.u8PM1EVTLEN = 4; 2193 2066 fadt.u8PM1CTLLEN = 2; … … 2218 2091 fadt.u32Flags |= RT_H2LE_U32(FADT_FL_FORCE_APIC_PHYS_DEST_MODE); 2219 2092 2220 acpi WriteGenericAddr(&fadt.ResetReg, 1, 8, 0, 1, ACPI_RESET_BLK);2093 acpiR3WriteGenericAddr(&fadt.ResetReg, 1, 8, 0, 1, ACPI_RESET_BLK); 2221 2094 fadt.u8ResetVal = ACPI_RESET_REG_VAL; 2222 2095 fadt.u64XFACS = RT_H2LE_U64((uint64_t)GCPhysFacs); 2223 2096 fadt.u64XDSDT = RT_H2LE_U64((uint64_t)GCPhysDsdt); 2224 acpi WriteGenericAddr(&fadt.X_PM1aEVTBLK, 1, 32, 0, 2, acpiCalcPmPort(pThis, PM1a_EVT_OFFSET));2225 acpi WriteGenericAddr(&fadt.X_PM1bEVTBLK, 0, 0, 0, 0, acpiCalcPmPort(pThis, PM1b_EVT_OFFSET));2226 acpi WriteGenericAddr(&fadt.X_PM1aCTLBLK, 1, 16, 0, 2, acpiCalcPmPort(pThis, PM1a_CTL_OFFSET));2227 acpi WriteGenericAddr(&fadt.X_PM1bCTLBLK, 0, 0, 0, 0, acpiCalcPmPort(pThis, PM1b_CTL_OFFSET));2228 acpi WriteGenericAddr(&fadt.X_PM2CTLBLK, 0, 0, 0, 0, acpiCalcPmPort(pThis, PM2_CTL_OFFSET));2229 acpi WriteGenericAddr(&fadt.X_PMTMRBLK, 1, 32, 0, 3, acpiCalcPmPort(pThis, PM_TMR_OFFSET));2230 acpi WriteGenericAddr(&fadt.X_GPE0BLK, 1, 16, 0, 1, acpiCalcPmPort(pThis, GPE0_OFFSET));2231 acpi WriteGenericAddr(&fadt.X_GPE1BLK, 0, 0, 0, 0, acpiCalcPmPort(pThis, GPE1_OFFSET));2232 fadt.header.u8Checksum = acpi Checksum(&fadt, sizeof(fadt));2233 acpi Physcpy(pThis, GCPhysAcpi2, &fadt, sizeof(fadt));2097 acpiR3WriteGenericAddr(&fadt.X_PM1aEVTBLK, 1, 32, 0, 2, acpiR3CalcPmPort(pThis, PM1a_EVT_OFFSET)); 2098 acpiR3WriteGenericAddr(&fadt.X_PM1bEVTBLK, 0, 0, 0, 0, acpiR3CalcPmPort(pThis, PM1b_EVT_OFFSET)); 2099 acpiR3WriteGenericAddr(&fadt.X_PM1aCTLBLK, 1, 16, 0, 2, acpiR3CalcPmPort(pThis, PM1a_CTL_OFFSET)); 2100 acpiR3WriteGenericAddr(&fadt.X_PM1bCTLBLK, 0, 0, 0, 0, acpiR3CalcPmPort(pThis, PM1b_CTL_OFFSET)); 2101 acpiR3WriteGenericAddr(&fadt.X_PM2CTLBLK, 0, 0, 0, 0, acpiR3CalcPmPort(pThis, PM2_CTL_OFFSET)); 2102 acpiR3WriteGenericAddr(&fadt.X_PMTMRBLK, 1, 32, 0, 3, acpiR3CalcPmPort(pThis, PM_TMR_OFFSET)); 2103 acpiR3WriteGenericAddr(&fadt.X_GPE0BLK, 1, 16, 0, 1, acpiR3CalcPmPort(pThis, GPE0_OFFSET)); 2104 acpiR3WriteGenericAddr(&fadt.X_GPE1BLK, 0, 0, 0, 0, acpiR3CalcPmPort(pThis, GPE1_OFFSET)); 2105 fadt.header.u8Checksum = acpiR3Checksum(&fadt, sizeof(fadt)); 2106 acpiR3PhysCopy(pThis, GCPhysAcpi2, &fadt, sizeof(fadt)); 2234 2107 2235 2108 /* Now the ACPI 1.0 version. */ … … 2237 2110 fadt.u8IntModel = INT_MODEL_DUAL_PIC; 2238 2111 fadt.header.u8Checksum = 0; /* Must be zeroed before recalculating checksum! */ 2239 fadt.header.u8Checksum = acpi Checksum(&fadt, ACPITBLFADT_VERSION1_SIZE);2240 acpi Physcpy(pThis, GCPhysAcpi1, &fadt, ACPITBLFADT_VERSION1_SIZE);2112 fadt.header.u8Checksum = acpiR3Checksum(&fadt, ACPITBLFADT_VERSION1_SIZE); 2113 acpiR3PhysCopy(pThis, GCPhysAcpi1, &fadt, ACPITBLFADT_VERSION1_SIZE); 2241 2114 } 2242 2115 … … 2248 2121 * ACPI 2.0 and up. 2249 2122 */ 2250 static int acpi SetupRSDT(ACPIState *pThis, RTGCPHYS32 addr, unsigned int nb_entries, uint32_t *addrs)2123 static int acpiR3SetupRsdt(ACPIState *pThis, RTGCPHYS32 addr, unsigned int nb_entries, uint32_t *addrs) 2251 2124 { 2252 2125 ACPITBLRSDT *rsdt; … … 2257 2130 return PDMDEV_SET_ERROR(pThis->pDevIns, VERR_NO_TMP_MEMORY, N_("Cannot allocate RSDT")); 2258 2131 2259 acpi PrepareHeader(pThis, &rsdt->header, "RSDT", (uint32_t)size, 1);2132 acpiR3PrepareHeader(pThis, &rsdt->header, "RSDT", (uint32_t)size, 1); 2260 2133 for (unsigned int i = 0; i < nb_entries; ++i) 2261 2134 { … … 2263 2136 Log(("Setup RSDT: [%d] = %x\n", i, rsdt->u32Entry[i])); 2264 2137 } 2265 rsdt->header.u8Checksum = acpi Checksum(rsdt, size);2266 acpi Physcpy(pThis, addr, rsdt, size);2138 rsdt->header.u8Checksum = acpiR3Checksum(rsdt, size); 2139 acpiR3PhysCopy(pThis, addr, rsdt, size); 2267 2140 RTMemFree(rsdt); 2268 2141 return VINF_SUCCESS; … … 2272 2145 * Plant the Extended System Description Table. 2273 2146 */ 2274 static int acpi SetupXSDT(ACPIState *pThis, RTGCPHYS32 addr, unsigned int nb_entries, uint32_t *addrs)2147 static int acpiR3SetupXsdt(ACPIState *pThis, RTGCPHYS32 addr, unsigned int nb_entries, uint32_t *addrs) 2275 2148 { 2276 2149 ACPITBLXSDT *xsdt; … … 2281 2154 return VERR_NO_TMP_MEMORY; 2282 2155 2283 acpi PrepareHeader(pThis, &xsdt->header, "XSDT", (uint32_t)size, 1 /* according to ACPI 3.0 specs */);2156 acpiR3PrepareHeader(pThis, &xsdt->header, "XSDT", (uint32_t)size, 1 /* according to ACPI 3.0 specs */); 2284 2157 2285 2158 if (pThis->fUseCust) … … 2291 2164 Log(("Setup XSDT: [%d] = %RX64\n", i, xsdt->u64Entry[i])); 2292 2165 } 2293 xsdt->header.u8Checksum = acpi Checksum(xsdt, size);2294 acpi Physcpy(pThis, addr, xsdt, size);2166 xsdt->header.u8Checksum = acpiR3Checksum(xsdt, size); 2167 acpiR3PhysCopy(pThis, addr, xsdt, size); 2295 2168 RTMemFree(xsdt); 2296 2169 return VINF_SUCCESS; … … 2300 2173 * Plant the Root System Description Pointer (RSDP). 2301 2174 */ 2302 static void acpi SetupRSDP(ACPIState *pThis, ACPITBLRSDP *rsdp, RTGCPHYS32 GCPhysRsdt, RTGCPHYS GCPhysXsdt)2175 static void acpiR3SetupRsdp(ACPIState *pThis, ACPITBLRSDP *rsdp, RTGCPHYS32 GCPhysRsdt, RTGCPHYS GCPhysXsdt) 2303 2176 { 2304 2177 memset(rsdp, 0, sizeof(*rsdp)); 2305 2178 2306 /* ACPI 1.0 part (RSDT */2179 /* ACPI 1.0 part (RSDT) */ 2307 2180 memcpy(rsdp->au8Signature, "RSD PTR ", 8); 2308 2181 memcpy(rsdp->au8OemId, pThis->au8OemId, 6); 2309 2182 rsdp->u8Revision = ACPI_REVISION; 2310 2183 rsdp->u32RSDT = RT_H2LE_U32(GCPhysRsdt); 2311 rsdp->u8Checksum = acpi Checksum(rsdp, RT_OFFSETOF(ACPITBLRSDP, u32Length));2184 rsdp->u8Checksum = acpiR3Checksum(rsdp, RT_OFFSETOF(ACPITBLRSDP, u32Length)); 2312 2185 2313 2186 /* ACPI 2.0 part (XSDT) */ 2314 2187 rsdp->u32Length = RT_H2LE_U32(sizeof(ACPITBLRSDP)); 2315 2188 rsdp->u64XSDT = RT_H2LE_U64(GCPhysXsdt); 2316 rsdp->u8ExtChecksum = acpiChecksum(rsdp, sizeof(ACPITBLRSDP)); 2317 } 2189 rsdp->u8ExtChecksum = acpiR3Checksum(rsdp, sizeof(ACPITBLRSDP)); 2190 } 2191 2192 /** 2193 * Multiple APIC Description Table. 2194 * 2195 * This structure looks somewhat convoluted due layout of MADT table in MP case. 2196 * There extpected to be multiple LAPIC records for each CPU, thus we cannot 2197 * use regular C structure and proxy to raw memory instead. 2198 */ 2199 class AcpiTableMadt 2200 { 2201 /** 2202 * All actual data stored in dynamically allocated memory pointed by this field. 2203 */ 2204 uint8_t *m_pbData; 2205 /** 2206 * Number of CPU entries in this MADT. 2207 */ 2208 uint32_t m_cCpus; 2209 2210 /** 2211 * Number of interrupt overrides. 2212 */ 2213 uint32_t m_cIsos; 2214 2215 public: 2216 /** 2217 * Address of ACPI header 2218 */ 2219 inline ACPITBLHEADER *header_addr(void) const 2220 { 2221 return (ACPITBLHEADER *)m_pbData; 2222 } 2223 2224 /** 2225 * Address of local APIC for each CPU. Note that different CPUs address different LAPICs, 2226 * although address is the same for all of them. 2227 */ 2228 inline uint32_t *u32LAPIC_addr(void) const 2229 { 2230 return (uint32_t *)(header_addr() + 1); 2231 } 2232 2233 /** 2234 * Address of APIC flags 2235 */ 2236 inline uint32_t *u32Flags_addr(void) const 2237 { 2238 return (uint32_t *)(u32LAPIC_addr() + 1); 2239 } 2240 2241 /** 2242 * Address of ISO description 2243 */ 2244 inline ACPITBLISO *ISO_addr(void) const 2245 { 2246 return (ACPITBLISO *)(u32Flags_addr() + 1); 2247 } 2248 2249 /** 2250 * Address of per-CPU LAPIC descriptions 2251 */ 2252 inline ACPITBLLAPIC *LApics_addr(void) const 2253 { 2254 return (ACPITBLLAPIC *)(ISO_addr() + m_cIsos); 2255 } 2256 2257 /** 2258 * Address of IO APIC description 2259 */ 2260 inline ACPITBLIOAPIC *IOApic_addr(void) const 2261 { 2262 return (ACPITBLIOAPIC *)(LApics_addr() + m_cCpus); 2263 } 2264 2265 /** 2266 * Size of MADT. 2267 * Note that this function assumes IOApic to be the last field in structure. 2268 */ 2269 inline uint32_t size(void) const 2270 { 2271 return (uint8_t *)(IOApic_addr() + 1) - (uint8_t *)header_addr(); 2272 } 2273 2274 /** 2275 * Raw data of MADT. 2276 */ 2277 inline const uint8_t *data(void) const 2278 { 2279 return m_pbData; 2280 } 2281 2282 /** 2283 * Size of MADT for given ACPI config, useful to compute layout. 2284 */ 2285 static uint32_t sizeFor(ACPIState *pThis, uint32_t cIsos) 2286 { 2287 return AcpiTableMadt(pThis->cCpus, cIsos).size(); 2288 } 2289 2290 /* 2291 * Constructor, only works in Ring 3, doesn't look like a big deal. 2292 */ 2293 AcpiTableMadt(uint32_t cCpus, uint32_t cIsos) 2294 { 2295 m_cCpus = cCpus; 2296 m_cIsos = cIsos; 2297 m_pbData = NULL; /* size() uses this and gcc will complain if not initialized. */ 2298 uint32_t cb = size(); 2299 m_pbData = (uint8_t *)RTMemAllocZ(cb); 2300 } 2301 2302 ~AcpiTableMadt() 2303 { 2304 RTMemFree(m_pbData); 2305 } 2306 }; 2307 2318 2308 2319 2309 /** … … 2324 2314 * @todo All hardcoded, should set this up based on the actual VM config!!!!! 2325 2315 */ 2326 static void acpi SetupMADT(ACPIState *pThis, RTGCPHYS32 addr)2316 static void acpiR3SetupMadt(ACPIState *pThis, RTGCPHYS32 addr) 2327 2317 { 2328 2318 uint16_t cpus = pThis->cCpus; 2329 AcpiTableM ADTmadt(cpus, NUMBER_OF_IRQ_SOURCE_OVERRIDES);2330 2331 acpi PrepareHeader(pThis, madt.header_addr(), "APIC", madt.size(), 2);2319 AcpiTableMadt madt(cpus, NUMBER_OF_IRQ_SOURCE_OVERRIDES); 2320 2321 acpiR3PrepareHeader(pThis, madt.header_addr(), "APIC", madt.size(), 2); 2332 2322 2333 2323 *madt.u32LAPIC_addr() = RT_H2LE_U32(0xfee00000); … … 2388 2378 Assert(NUMBER_OF_IRQ_SOURCE_OVERRIDES == 2); 2389 2379 2390 madt.header_addr()->u8Checksum = acpi Checksum(madt.data(), madt.size());2391 acpi Physcpy(pThis, addr, madt.data(), madt.size());2380 madt.header_addr()->u8Checksum = acpiR3Checksum(madt.data(), madt.size()); 2381 acpiR3PhysCopy(pThis, addr, madt.data(), madt.size()); 2392 2382 } 2393 2383 … … 2395 2385 * Plant the High Performance Event Timer (HPET) descriptor. 2396 2386 */ 2397 static void acpi SetupHPET(ACPIState *pThis, RTGCPHYS32 addr)2387 static void acpiR3SetupHpet(ACPIState *pThis, RTGCPHYS32 addr) 2398 2388 { 2399 2389 ACPITBLHPET hpet; … … 2401 2391 memset(&hpet, 0, sizeof(hpet)); 2402 2392 2403 acpi PrepareHeader(pThis, &hpet.aHeader, "HPET", sizeof(hpet), 1);2393 acpiR3PrepareHeader(pThis, &hpet.aHeader, "HPET", sizeof(hpet), 1); 2404 2394 /* Keep base address consistent with appropriate DSDT entry (vbox.dsl) */ 2405 acpi WriteGenericAddr(&hpet.HpetAddr,2395 acpiR3WriteGenericAddr(&hpet.HpetAddr, 2406 2396 0 /* Memory address space */, 2407 2397 64 /* Register bit width */, … … 2415 2405 hpet.u8Attributes = 0; 2416 2406 2417 hpet.aHeader.u8Checksum = acpi Checksum(&hpet, sizeof(hpet));2418 2419 acpi Physcpy(pThis, addr, (const uint8_t *)&hpet, sizeof(hpet));2407 hpet.aHeader.u8Checksum = acpiR3Checksum(&hpet, sizeof(hpet)); 2408 2409 acpiR3PhysCopy(pThis, addr, (const uint8_t *)&hpet, sizeof(hpet)); 2420 2410 } 2421 2411 2422 2412 2423 2413 /** Custom Description Table */ 2424 static void acpi SetupCUST(ACPIState *pThis, RTGCPHYS32 addr)2414 static void acpiR3SetupCust(ACPIState *pThis, RTGCPHYS32 addr) 2425 2415 { 2426 2416 ACPITBLCUST cust; … … 2428 2418 /* First the ACPI version 1 version of the structure. */ 2429 2419 memset(&cust, 0, sizeof(cust)); 2430 acpi PrepareHeader(pThis, &cust.header, "CUST", sizeof(cust), 1);2420 acpiR3PrepareHeader(pThis, &cust.header, "CUST", sizeof(cust), 1); 2431 2421 2432 2422 memcpy(cust.header.au8OemTabId, pThis->au8OemTabId, 8); 2433 2423 cust.header.u32OemRevision = RT_H2LE_U32(pThis->u32OemRevision); 2434 cust.header.u8Checksum = acpi Checksum((uint8_t *)&cust, sizeof(cust));2435 2436 acpi Physcpy(pThis, addr, pThis->pu8CustBin, pThis->cbCustBin);2437 } 2438 2439 /** 2440 * Used by acpi PlantTables to plant a MMCONFIG PCI config space access (MCFG)2424 cust.header.u8Checksum = acpiR3Checksum((uint8_t *)&cust, sizeof(cust)); 2425 2426 acpiR3PhysCopy(pThis, addr, pThis->pu8CustBin, pThis->cbCustBin); 2427 } 2428 2429 /** 2430 * Used by acpiR3PlantTables to plant a MMCONFIG PCI config space access (MCFG) 2441 2431 * descriptor. 2442 2432 * … … 2444 2434 * @param GCPhysDst Where to plant it. 2445 2435 */ 2446 static void acpi SetupMCFG(ACPIState *pThis, RTGCPHYS32 GCPhysDst)2436 static void acpiR3SetupMcfg(ACPIState *pThis, RTGCPHYS32 GCPhysDst) 2447 2437 { 2448 2438 struct … … 2456 2446 RT_ZERO(tbl); 2457 2447 2458 acpi PrepareHeader(pThis, &tbl.hdr.aHeader, "MCFG", sizeof(tbl), 1);2448 acpiR3PrepareHeader(pThis, &tbl.hdr.aHeader, "MCFG", sizeof(tbl), 1); 2459 2449 tbl.entry.u64BaseAddress = pThis->u64PciConfigMMioAddress; 2460 2450 tbl.entry.u8StartBus = u8StartBus; … … 2462 2452 // u16PciSegmentGroup must match _SEG in ACPI table 2463 2453 2464 tbl.hdr.aHeader.u8Checksum = acpi Checksum(&tbl, sizeof(tbl));2465 2466 acpi Physcpy(pThis, GCPhysDst, (const uint8_t *)&tbl, sizeof(tbl));2467 } 2468 2469 /** 2470 * Used by acpi PlantTables and acpiConstruct.2454 tbl.hdr.aHeader.u8Checksum = acpiR3Checksum(&tbl, sizeof(tbl)); 2455 2456 acpiR3PhysCopy(pThis, GCPhysDst, (const uint8_t *)&tbl, sizeof(tbl)); 2457 } 2458 2459 /** 2460 * Used by acpiR3PlantTables and acpiConstruct. 2471 2461 * 2472 2462 * @returns Guest memory address. 2473 2463 */ 2474 static uint32_t find_rsdp_space(void)2464 static uint32_t apicR3FindRsdpSpace(void) 2475 2465 { 2476 2466 return 0xe0000; … … 2480 2470 * Create the ACPI tables in guest memory. 2481 2471 */ 2482 static int acpi PlantTables(ACPIState *pThis)2472 static int acpiR3PlantTables(ACPIState *pThis) 2483 2473 { 2484 2474 int rc; … … 2566 2556 { 2567 2557 GCPhysApic = GCPhysCur; 2568 GCPhysCur = RT_ALIGN_32(GCPhysCur + AcpiTableM ADT::sizeFor(pThis, NUMBER_OF_IRQ_SOURCE_OVERRIDES), 16);2558 GCPhysCur = RT_ALIGN_32(GCPhysCur + AcpiTableMadt::sizeFor(pThis, NUMBER_OF_IRQ_SOURCE_OVERRIDES), 16); 2569 2559 } 2570 2560 if (pThis->fUseHpet) … … 2586 2576 2587 2577 void *pvSsdtCode = NULL; 2588 size_t cbSsdt Size= 0;2589 rc = acpiPrepareSsdt(pThis->pDevIns, &pvSsdtCode, &cbSsdt Size);2578 size_t cbSsdt = 0; 2579 rc = acpiPrepareSsdt(pThis->pDevIns, &pvSsdtCode, &cbSsdt); 2590 2580 if (RT_FAILURE(rc)) 2591 2581 return rc; 2592 2582 2593 2583 GCPhysSsdt = GCPhysCur; 2594 GCPhysCur = RT_ALIGN_32(GCPhysCur + cbSsdt Size, 16);2584 GCPhysCur = RT_ALIGN_32(GCPhysCur + cbSsdt, 16); 2595 2585 2596 2586 GCPhysDsdt = GCPhysCur; 2597 2587 2598 2588 void *pvDsdtCode = NULL; 2599 size_t cbDsdt Size= 0;2600 rc = acpiPrepareDsdt(pThis->pDevIns, &pvDsdtCode, &cbDsdt Size);2589 size_t cbDsdt = 0; 2590 rc = acpiPrepareDsdt(pThis->pDevIns, &pvDsdtCode, &cbDsdt); 2601 2591 if (RT_FAILURE(rc)) 2602 2592 return rc; 2603 2593 2604 GCPhysCur = RT_ALIGN_32(GCPhysCur + cbDsdt Size, 16);2594 GCPhysCur = RT_ALIGN_32(GCPhysCur + cbDsdt, 16); 2605 2595 2606 2596 if (GCPhysCur > 0x10000) … … 2608 2598 N_("Error: ACPI tables bigger than 64KB")); 2609 2599 2610 Log(("RSDP 0x%08X\n", find_rsdp_space()));2600 Log(("RSDP 0x%08X\n", apicR3FindRsdpSpace())); 2611 2601 addend = pThis->cbRamLow - 0x10000; 2612 2602 Log(("RSDT 0x%08X XSDT 0x%08X\n", GCPhysRsdt + addend, GCPhysXsdt + addend)); … … 2624 2614 Log(("\n")); 2625 2615 2626 acpi SetupRSDP(pThis, (ACPITBLRSDP *)pThis->au8RSDPPage, GCPhysRsdt + addend, GCPhysXsdt + addend);2627 acpi SetupDSDT(pThis, GCPhysDsdt + addend, pvDsdtCode, cbDsdtSize);2616 acpiR3SetupRsdp(pThis, (ACPITBLRSDP *)pThis->au8RSDPPage, GCPhysRsdt + addend, GCPhysXsdt + addend); 2617 acpiR3SetupDsdt(pThis, GCPhysDsdt + addend, pvDsdtCode, cbDsdt); 2628 2618 acpiCleanupDsdt(pThis->pDevIns, pvDsdtCode); 2629 acpi SetupFACS(pThis, GCPhysFacs + addend);2630 acpi SetupFADT(pThis, GCPhysFadtAcpi1 + addend, GCPhysFadtAcpi2 + addend, GCPhysFacs + addend, GCPhysDsdt + addend);2619 acpiR3SetupFacs(pThis, GCPhysFacs + addend); 2620 acpiR3SetupFadt(pThis, GCPhysFadtAcpi1 + addend, GCPhysFadtAcpi2 + addend, GCPhysFacs + addend, GCPhysDsdt + addend); 2631 2621 2632 2622 aGCPhysRsdt[0] = GCPhysFadtAcpi1 + addend; … … 2634 2624 if (pThis->u8UseIOApic) 2635 2625 { 2636 acpi SetupMADT(pThis, GCPhysApic + addend);2626 acpiR3SetupMadt(pThis, GCPhysApic + addend); 2637 2627 aGCPhysRsdt[iMadt] = GCPhysApic + addend; 2638 2628 aGCPhysXsdt[iMadt] = GCPhysApic + addend; … … 2640 2630 if (pThis->fUseHpet) 2641 2631 { 2642 acpi SetupHPET(pThis, GCPhysHpet + addend);2632 acpiR3SetupHpet(pThis, GCPhysHpet + addend); 2643 2633 aGCPhysRsdt[iHpet] = GCPhysHpet + addend; 2644 2634 aGCPhysXsdt[iHpet] = GCPhysHpet + addend; … … 2646 2636 if (pThis->fUseMcfg) 2647 2637 { 2648 acpi SetupMCFG(pThis, GCPhysMcfg + addend);2638 acpiR3SetupMcfg(pThis, GCPhysMcfg + addend); 2649 2639 aGCPhysRsdt[iMcfg] = GCPhysMcfg + addend; 2650 2640 aGCPhysXsdt[iMcfg] = GCPhysMcfg + addend; … … 2652 2642 if (pThis->fUseCust) 2653 2643 { 2654 acpi SetupCUST(pThis, GCPhysCust + addend);2644 acpiR3SetupCust(pThis, GCPhysCust + addend); 2655 2645 aGCPhysRsdt[iCust] = GCPhysCust + addend; 2656 2646 aGCPhysXsdt[iCust] = GCPhysCust + addend; 2657 2647 } 2658 2648 2659 acpi SetupSSDT(pThis, GCPhysSsdt + addend, pvSsdtCode, cbSsdtSize);2649 acpiR3SetupSsdt(pThis, GCPhysSsdt + addend, pvSsdtCode, cbSsdt); 2660 2650 acpiCleanupSsdt(pThis->pDevIns, pvSsdtCode); 2661 2651 aGCPhysRsdt[iSsdt] = GCPhysSsdt + addend; 2662 2652 aGCPhysXsdt[iSsdt] = GCPhysSsdt + addend; 2663 2653 2664 rc = acpi SetupRSDT(pThis, GCPhysRsdt + addend, cAddr, aGCPhysRsdt);2654 rc = acpiR3SetupRsdt(pThis, GCPhysRsdt + addend, cAddr, aGCPhysRsdt); 2665 2655 if (RT_FAILURE(rc)) 2666 2656 return rc; 2667 return acpi SetupXSDT(pThis, GCPhysXsdt + addend, cAddr, aGCPhysXsdt);2657 return acpiR3SetupXsdt(pThis, GCPhysXsdt + addend, cAddr, aGCPhysXsdt); 2668 2658 } 2669 2659 … … 2671 2661 * @callback_method_impl{FNPCICONFIGREAD} 2672 2662 */ 2673 static DECLCALLBACK(uint32_t) acpi PciConfigRead(PPCIDEVICE pPciDev, uint32_t Address, unsigned cb)2663 static DECLCALLBACK(uint32_t) acpiR3PciConfigRead(PPCIDEVICE pPciDev, uint32_t Address, unsigned cb) 2674 2664 { 2675 2665 PPDMDEVINS pDevIns = pPciDev->pDevIns; … … 2683 2673 * @callback_method_impl{FNPCICONFIGWRITE} 2684 2674 */ 2685 static DECLCALLBACK(void) acpi PciConfigWrite(PPCIDEVICE pPciDev, uint32_t Address, uint32_t u32Value, unsigned cb)2675 static DECLCALLBACK(void) acpiR3PciConfigWrite(PPCIDEVICE pPciDev, uint32_t Address, uint32_t u32Value, unsigned cb) 2686 2676 { 2687 2677 PPDMDEVINS pDevIns = pPciDev->pDevIns; … … 2708 2698 NewIoPortBase &= 0xffc0; 2709 2699 2710 int rc = acpi UpdatePmHandlers(pThis, NewIoPortBase);2700 int rc = acpiR3UpdatePmHandlers(pThis, NewIoPortBase); 2711 2701 AssertRC(rc); 2712 2702 } … … 2726 2716 * @remarks This code path is not used during construction. 2727 2717 */ 2728 static DECLCALLBACK(int) acpi Attach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)2718 static DECLCALLBACK(int) acpiR3Attach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags) 2729 2719 { 2730 2720 ACPIState *pThis = PDMINS_2_DATA(pDevIns, ACPIState *); … … 2757 2747 2758 2748 /* Notify the guest */ 2759 update_gpe0(pThis, pThis->gpe0_sts | 0x2, pThis->gpe0_en);2749 apicR3UpdateGpe0(pThis, pThis->gpe0_sts | 0x2, pThis->gpe0_en); 2760 2750 } 2761 2751 } … … 2771 2761 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines. 2772 2762 */ 2773 static DECLCALLBACK(void) acpi Detach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)2763 static DECLCALLBACK(void) acpiR3Detach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags) 2774 2764 { 2775 2765 ACPIState *pThis = PDMINS_2_DATA(pDevIns, ACPIState *); … … 2792 2782 2793 2783 /* Notify the guest */ 2794 update_gpe0(pThis, pThis->gpe0_sts | 0x2, pThis->gpe0_en);2784 apicR3UpdateGpe0(pThis, pThis->gpe0_sts | 0x2, pThis->gpe0_en); 2795 2785 } 2796 2786 else … … 2803 2793 * @interface_method_impl{PDMDEVREG,pfnResume} 2804 2794 */ 2805 static DECLCALLBACK(void) acpiR esume(PPDMDEVINS pDevIns)2795 static DECLCALLBACK(void) acpiR3Resume(PPDMDEVINS pDevIns) 2806 2796 { 2807 2797 ACPIState *pThis = PDMINS_2_DATA(pDevIns, ACPIState *); … … 2817 2807 * @interface_method_impl{PDMDEVREG,pfnReset} 2818 2808 */ 2819 static DECLCALLBACK(void) acpiR eset(PPDMDEVINS pDevIns)2809 static DECLCALLBACK(void) acpiR3Reset(PPDMDEVINS pDevIns) 2820 2810 { 2821 2811 ACPIState *pThis = PDMINS_2_DATA(pDevIns, ACPIState *); … … 2826 2816 pThis->pm1a_ctl = 0; 2827 2817 pThis->u64PmTimerInitial = TMTimerGet(pThis->pPmTimerR3); 2828 acpi PmTimerReset(pThis, pThis->u64PmTimerInitial);2818 acpiR3PmTimerReset(pThis, pThis->u64PmTimerInitial); 2829 2819 pThis->uBatteryIndex = 0; 2830 2820 pThis->uSystemInfoIndex = 0; … … 2835 2825 2836 2826 /** @todo Should we really reset PM base? */ 2837 acpi UpdatePmHandlers(pThis, PM_PORT_BASE);2838 2839 acpi PlantTables(pThis);2827 acpiR3UpdatePmHandlers(pThis, PM_PORT_BASE); 2828 2829 acpiR3PlantTables(pThis); 2840 2830 } 2841 2831 … … 2843 2833 * @interface_method_impl{PDMDEVREG,pfnRelocate} 2844 2834 */ 2845 static DECLCALLBACK(void) acpiR elocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)2835 static DECLCALLBACK(void) acpiR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta) 2846 2836 { 2847 2837 ACPIState *pThis = PDMINS_2_DATA(pDevIns, ACPIState *); … … 2853 2843 * @interface_methid_impl{PDMDEVREG,pfnDestruct} 2854 2844 */ 2855 static DECLCALLBACK(int) acpi Destruct(PPDMDEVINS pDevIns)2845 static DECLCALLBACK(int) acpiR3Destruct(PPDMDEVINS pDevIns) 2856 2846 { 2857 2847 ACPIState *pThis = PDMINS_2_DATA(pDevIns, ACPIState *); … … 2867 2857 * @interface_method_impl{PDMDEVREG,pfnConstruct} 2868 2858 */ 2869 static DECLCALLBACK(int) acpi Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)2859 static DECLCALLBACK(int) acpiR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg) 2870 2860 { 2871 2861 ACPIState *pThis = PDMINS_2_DATA(pDevIns, ACPIState *); … … 2889 2879 2890 2880 /* IBase */ 2891 pThis->IBase.pfnQueryInterface = acpi QueryInterface;2881 pThis->IBase.pfnQueryInterface = acpiR3QueryInterface; 2892 2882 /* IACPIPort */ 2893 pThis->IACPIPort.pfnSleepButtonPress = acpi Port_SleepButtonPress;2894 pThis->IACPIPort.pfnPowerButtonPress = acpi Port_PowerButtonPress;2895 pThis->IACPIPort.pfnGetPowerButtonHandled = acpi Port_GetPowerButtonHandled;2896 pThis->IACPIPort.pfnGetGuestEnteredACPIMode = acpi Port_GetGuestEnteredACPIMode;2897 pThis->IACPIPort.pfnGetCpuStatus = acpi Port_GetCpuStatus;2883 pThis->IACPIPort.pfnSleepButtonPress = acpiR3Port_SleepButtonPress; 2884 pThis->IACPIPort.pfnPowerButtonPress = acpiR3Port_PowerButtonPress; 2885 pThis->IACPIPort.pfnGetPowerButtonHandled = acpiR3Port_GetPowerButtonHandled; 2886 pThis->IACPIPort.pfnGetGuestEnteredACPIMode = acpiR3Port_GetGuestEnteredACPIMode; 2887 pThis->IACPIPort.pfnGetCpuStatus = acpiR3Port_GetCpuStatus; 2898 2888 2899 2889 /* … … 3227 3217 * Plant ACPI tables. 3228 3218 */ 3229 RTGCPHYS32 GCPhysRsdp = find_rsdp_space();3219 RTGCPHYS32 GCPhysRsdp = apicR3FindRsdpSpace(); 3230 3220 if (!GCPhysRsdp) 3231 3221 return PDMDEV_SET_ERROR(pDevIns, VERR_NO_MEMORY, 3232 3222 N_("Can not find space for RSDP. ACPI is disabled")); 3233 3223 3234 rc = acpi PlantTables(pThis);3224 rc = acpiR3PlantTables(pThis); 3235 3225 if (RT_FAILURE(rc)) 3236 3226 return rc; … … 3244 3234 * Register I/O ports. 3245 3235 */ 3246 rc = acpiR egisterPmHandlers(pThis);3236 rc = acpiR3RegisterPmHandlers(pThis); 3247 3237 if (RT_FAILURE(rc)) 3248 3238 return rc; … … 3255 3245 return rc; \ 3256 3246 } while (0) 3257 R(SMI_CMD, 1, acpi SmiWrite, NULL, "ACPI SMI");3247 R(SMI_CMD, 1, acpiR3SmiWrite, NULL, "ACPI SMI"); 3258 3248 #ifdef DEBUG_ACPI 3259 R(DEBUG_HEX, 1, acpi DhexWrite, NULL, "ACPI Debug hex");3260 R(DEBUG_CHR, 1, acpi DchrWrite, NULL, "ACPI Debug char");3249 R(DEBUG_HEX, 1, acpiR3DhexWrite, NULL, "ACPI Debug hex"); 3250 R(DEBUG_CHR, 1, acpiR3DchrWrite, NULL, "ACPI Debug char"); 3261 3251 #endif 3262 R(BAT_INDEX, 1, acpi BatIndexWrite, NULL, "ACPI Battery status index");3263 R(BAT_DATA, 1, NULL, acpi BatDataRead, "ACPI Battery status data");3264 R(SYSI_INDEX, 1, acpi SysInfoIndexWrite, NULL, "ACPI system info index");3265 R(SYSI_DATA, 1, acpi SysInfoDataWrite, acpiSysInfoDataRead, "ACPI system info data");3266 R(ACPI_RESET_BLK, 1, acpiR esetWrite, NULL, "ACPI Reset");3252 R(BAT_INDEX, 1, acpiR3BatIndexWrite, NULL, "ACPI Battery status index"); 3253 R(BAT_DATA, 1, NULL, acpiR3BatDataRead, "ACPI Battery status data"); 3254 R(SYSI_INDEX, 1, acpiR3SysInfoIndexWrite, NULL, "ACPI system info index"); 3255 R(SYSI_DATA, 1, acpiR3SysInfoDataWrite, acpiR3SysInfoDataRead, "ACPI system info data"); 3256 R(ACPI_RESET_BLK, 1, acpiR3ResetWrite, NULL, "ACPI Reset"); 3267 3257 #undef R 3268 3258 … … 3271 3261 */ 3272 3262 PTMTIMER pTimer; 3273 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, acpi PmTimer, &pThis->dev,3263 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, acpiR3PmTimer, &pThis->dev, 3274 3264 TMTIMER_FLAGS_NO_CRIT_SECT, "ACPI PM Timer", &pTimer); 3275 3265 AssertRCReturn(rc, rc); … … 3281 3271 AssertRCReturn(rc, rc); 3282 3272 pThis->u64PmTimerInitial = TMTimerGet(pTimer); 3283 acpi PmTimerReset(pThis, pThis->u64PmTimerInitial);3273 acpiR3PmTimerReset(pThis, pThis->u64PmTimerInitial); 3284 3274 TMTimerUnlock(pTimer); 3285 3275 … … 3320 3310 3321 3311 PDMDevHlpPCISetConfigCallbacks(pDevIns, &pThis->dev, 3322 acpi PciConfigRead, &pThis->pfnAcpiPciConfigRead,3323 acpi PciConfigWrite, &pThis->pfnAcpiPciConfigWrite);3312 acpiR3PciConfigRead, &pThis->pfnAcpiPciConfigRead, 3313 acpiR3PciConfigWrite, &pThis->pfnAcpiPciConfigWrite); 3324 3314 3325 3315 /* 3326 3316 * Register the saved state. 3327 3317 */ 3328 rc = PDMDevHlpSSMRegister(pDevIns, 6, sizeof(*pThis), acpi SaveState, acpiLoadState);3318 rc = PDMDevHlpSSMRegister(pDevIns, 6, sizeof(*pThis), acpiR3SaveState, acpiR3LoadState); 3329 3319 if (RT_FAILURE(rc)) 3330 3320 return rc; … … 3377 3367 sizeof(ACPIState), 3378 3368 /* pfnConstruct */ 3379 acpi Construct,3369 acpiR3Construct, 3380 3370 /* pfnDestruct */ 3381 acpi Destruct,3371 acpiR3Destruct, 3382 3372 /* pfnRelocate */ 3383 acpiR elocate,3373 acpiR3Relocate, 3384 3374 /* pfnIOCtl */ 3385 3375 NULL, … … 3387 3377 NULL, 3388 3378 /* pfnReset */ 3389 acpiR eset,3379 acpiR3Reset, 3390 3380 /* pfnSuspend */ 3391 3381 NULL, 3392 3382 /* pfnResume */ 3393 acpiR esume,3383 acpiR3Resume, 3394 3384 /* pfnAttach */ 3395 acpi Attach,3385 acpiR3Attach, 3396 3386 /* pfnDetach */ 3397 acpi Detach,3387 acpiR3Detach, 3398 3388 /* pfnQueryInterface. */ 3399 3389 NULL,
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