Changeset 44532 in vbox for trunk/src/VBox/Devices/Storage
- Timestamp:
- Feb 4, 2013 8:43:35 PM (12 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/Devices/Storage/DevBusLogic.cpp
r44207 r44532 1 1 /* $Id$ */ 2 2 /** @file 3 * VBox storage devices: BusLogic SCSI host adapter BT-958. 3 * VBox storage devices - BusLogic SCSI host adapter BT-958. 4 * 5 * Based on the Multi-Master Ultra SCSI Systems Technical Reference Manual. 4 6 */ 5 7 6 8 /* 7 * Copyright (C) 2006-201 2Oracle Corporation9 * Copyright (C) 2006-2013 Oracle Corporation 8 10 * 9 11 * This file is part of VirtualBox Open Source Edition (OSE), as … … 16 18 */ 17 19 18 /* Based on the Multi-Master Ultra SCSI Systems Technical Reference Manual */19 20 20 21 /******************************************************************************* 21 22 * Header Files * 22 23 *******************************************************************************/ 23 24 24 #define LOG_GROUP LOG_GROUP_DEV_BUSLOGIC 25 25 #include <VBox/vmm/pdmdev.h> … … 41 41 #include "VBoxDD.h" 42 42 43 /* Maximum number of attached devices the adapter can handle. */ 43 44 /******************************************************************************* 45 * Defined Constants And Macros * 46 *******************************************************************************/ 47 /** Maximum number of attached devices the adapter can handle. */ 44 48 #define BUSLOGIC_MAX_DEVICES 16 45 49 46 /* Maximum number of scatter gather elements this device can handle. */50 /** Maximum number of scatter gather elements this device can handle. */ 47 51 #define BUSLOGIC_MAX_SCATTER_GATHER_LIST_SIZE 128 48 52 49 /* Size of the command buffer. */53 /** Size of the command buffer. */ 50 54 #define BUSLOGIC_COMMAND_SIZE_MAX 5 51 55 52 /* Size of the reply buffer. */ 53 #define BUSLOGIC_REPLY_SIZE_MAX 64 54 55 /* 56 * Custom fixed I/O ports for BIOS controller access. Note that these should 57 * not be in the ISA range (below 400h) to avoid conflicts with ISA device 58 * probing. Addresses in the 300h-340h range should be especially avoided. 59 */ 60 56 /** Size of the reply buffer. */ 57 #define BUSLOGIC_REPLY_SIZE_MAX 64 58 59 /** Custom fixed I/O ports for BIOS controller access. 60 * Note that these should not be in the ISA range (below 400h) to avoid 61 * conflicts with ISA device probing. Addresses in the 300h-340h range should be 62 * especially avoided. 63 */ 61 64 #define BUSLOGIC_BIOS_IO_PORT 0x430 62 65 … … 69 72 #define BUSLOGIC_SAVED_STATE_MINOR_PRE_24BIT_MBOX 2 70 73 71 /** The duration of software-initiated reset. Not documented, set to 50 ms. */ 72 #define BUSLOGIC_RESET_DURATION_NS (50*1000*1000UL) 73 74 /** The duration of software-initiated reset (in nano seconds). 75 * Not documented, set to 50 ms. */ 76 #define BUSLOGIC_RESET_DURATION_NS UINT64_C(50000000) 77 78 79 /******************************************************************************* 80 * Structures and Typedefs * 81 *******************************************************************************/ 74 82 /** 75 83 * State of a device attached to the buslogic host adapter. … … 119 127 } BUSLOGICDEVICE, *PBUSLOGICDEVICE; 120 128 121 /* 129 /** 122 130 * Commands the BusLogic adapter supports. 123 131 */ … … 184 192 uint8_t aHostAdaptertype[6]; 185 193 uint8_t uReserved1; 186 bool fFloppyEnabled :1;187 bool fFloppySecondary :1;188 bool fLevelSensitiveInterrupt :1;189 unsigned char uReserved2 :2;190 unsigned char uSystemRAMAreForBIOS :3;191 unsigned char uDMAChannel :7;192 bool fDMAAutoConfiguration :1;193 unsigned char uIrqChannel :7;194 bool fIrqAutoConfiguration :1;194 bool fFloppyEnabled : 1; 195 bool fFloppySecondary : 1; 196 bool fLevelSensitiveInterrupt : 1; 197 unsigned char uReserved2 : 2; 198 unsigned char uSystemRAMAreForBIOS : 3; 199 unsigned char uDMAChannel : 7; 200 bool fDMAAutoConfiguration : 1; 201 unsigned char uIrqChannel : 7; 202 bool fIrqAutoConfiguration : 1; 195 203 uint8_t uDMATransferRate; 196 204 uint8_t uSCSIId; 197 bool fLowByteTerminated :1;198 bool fParityCheckingEnabled :1;199 bool fHighByteTerminated :1;200 bool fNoisyCablingEnvironment :1;201 bool fFastSynchronousNeogtiation :1;202 bool fBusResetEnabled :1;203 bool fReserved3 :1;204 bool fActiveNegotiationEnabled :1;205 bool fLowByteTerminated : 1; 206 bool fParityCheckingEnabled : 1; 207 bool fHighByteTerminated : 1; 208 bool fNoisyCablingEnvironment : 1; 209 bool fFastSynchronousNeogtiation : 1; 210 bool fBusResetEnabled : 1; 211 bool fReserved3 : 1; 212 bool fActiveNegotiationEnabled : 1; 205 213 uint8_t uBusOnDelay; 206 214 uint8_t uBusOffDelay; 207 bool fHostAdapterBIOSEnabled :1;208 bool fBIOSRedirectionOfInt19 :1;209 bool fExtendedTranslation :1;210 bool fMapRemovableAsFixed :1;211 bool fReserved4 :1;212 bool fBIOSSupportsMoreThan2Drives :1;213 bool fBIOSInterruptMode :1;214 bool fFlopticalSupport :1;215 bool fHostAdapterBIOSEnabled : 1; 216 bool fBIOSRedirectionOfInt19 : 1; 217 bool fExtendedTranslation : 1; 218 bool fMapRemovableAsFixed : 1; 219 bool fReserved4 : 1; 220 bool fBIOSSupportsMoreThan2Drives : 1; 221 bool fBIOSInterruptMode : 1; 222 bool fFlopticalSupport : 1; 215 223 uint16_t u16DeviceEnabledMask; 216 224 uint16_t u16WidePermittedMask; … … 220 228 uint16_t u16SendStartUnitCommandMask; 221 229 uint16_t u16IgnoreInBIOSScanMask; 222 unsigned char uPCIInterruptPin :2;223 unsigned char uHostAdapterIoPortAddress :2;224 bool fStrictRoundRobinMode :1;225 bool fVesaBusSpeedGreaterThan33MHz :1;226 bool fVesaBurstWrite :1;227 bool fVesaBurstRead :1;230 unsigned char uPCIInterruptPin : 2; 231 unsigned char uHostAdapterIoPortAddress : 2; 232 bool fStrictRoundRobinMode : 1; 233 bool fVesaBusSpeedGreaterThan33MHz : 1; 234 bool fVesaBurstWrite : 1; 235 bool fVesaBurstRead : 1; 228 236 uint16_t u16UltraPermittedMask; 229 237 uint32_t uReserved5; 230 238 uint8_t uReserved6; 231 239 uint8_t uAutoSCSIMaximumLUN; 232 bool fReserved7 :1;233 bool fSCAMDominant :1;234 bool fSCAMenabled :1;235 bool fSCAMLevel2 :1;236 unsigned char uReserved8 :4;237 bool fInt13Extension :1;238 bool fReserved9 :1;239 bool fCDROMBoot :1;240 unsigned char uReserved10 :5;241 unsigned char uBootTargetId :4;242 unsigned char uBootChannel :4;243 bool fForceBusDeviceScanningOrder :1;244 unsigned char uReserved11 :7;240 bool fReserved7 : 1; 241 bool fSCAMDominant : 1; 242 bool fSCAMenabled : 1; 243 bool fSCAMLevel2 : 1; 244 unsigned char uReserved8 : 4; 245 bool fInt13Extension : 1; 246 bool fReserved9 : 1; 247 bool fCDROMBoot : 1; 248 unsigned char uReserved10 : 5; 249 unsigned char uBootTargetId : 4; 250 unsigned char uBootChannel : 4; 251 bool fForceBusDeviceScanningOrder : 1; 252 unsigned char uReserved11 : 7; 245 253 uint16_t u16NonTaggedToAlternateLunPermittedMask; 246 254 uint16_t u16RenegotiateSyncAfterCheckConditionMask; … … 257 265 typedef union HostAdapterLocalRam 258 266 { 259 /* Byte view. */267 /** Byte view. */ 260 268 uint8_t u8View[256]; 261 /* Structured view. */269 /** Structured view. */ 262 270 struct 263 271 { … … 271 279 272 280 273 /* Ugly 24-bit big-endian addressing. */ 274 typedef struct { 281 /** Ugly 24-bit big-endian addressing. */ 282 typedef struct 283 { 275 284 uint8_t hi; 276 285 uint8_t mid; … … 284 293 #define U32_TO_LEN U32_TO_ADDR 285 294 286 /* Compatible ISA base I/O port addresses. Disabled if zero. */ 295 /** @name Compatible ISA base I/O port addresses. Disabled if zero. 296 * @{ */ 287 297 #define NUM_ISA_BASES 8 288 298 #define MAX_ISA_BASE (NUM_ISA_BASES - 1) 289 299 #define ISA_BASE_DISABLED 6 290 300 291 static uint16_t aISABases[NUM_ISA_BASES] = { 301 static uint16_t const g_aISABases[NUM_ISA_BASES] = 302 { 292 303 0x330, 0x334, 0x230, 0x234, 0x130, 0x134, 0, 0 293 304 }; 305 /** @} */ 294 306 295 307 /** Pointer to a task state structure. */ … … 362 374 /** Flag whether the ISA I/O port range is disabled 363 375 * to prevent the BIOS to access the device. */ 364 bool fISAEnabled; / /@todo: unused, to be removed376 bool fISAEnabled; /**< @todo unused, to be removed */ 365 377 /** Flag whether 24-bit mailboxes are in use (default is 32-bit). */ 366 bool fMbxIs24Bit; / /@todo: save?378 bool fMbxIs24Bit; /**< @todo save? */ 367 379 /** ISA I/O port base (encoded in FW-compatible format). */ 368 380 uint8_t uISABaseCode; … … 380 392 #endif 381 393 382 /** Time when HBA reset was last initiated. */ / /@todo: does this need to be saved?394 /** Time when HBA reset was last initiated. */ /**< @todo does this need to be saved? */ 383 395 uint64_t u64ResetTime; 384 396 /** Physical base address of the outgoing mailboxes. */ … … 457 469 458 470 /** Register offsets in the I/O port space. */ 459 #define BUSLOGIC_REGISTER_CONTROL 0 /* Writeonly */471 #define BUSLOGIC_REGISTER_CONTROL 0 /**< Writeonly */ 460 472 /** Fields for the control register. */ 461 473 # define BUSLOGIC_REGISTER_CONTROL_SCSI_BUSRESET RT_BIT(4) … … 464 476 # define BUSLOGIC_REGISTER_CONTROL_HARD_RESET RT_BIT(7) 465 477 466 #define BUSLOGIC_REGISTER_STATUS 0 /* Readonly */478 #define BUSLOGIC_REGISTER_STATUS 0 /**< Readonly */ 467 479 /** Fields for the status register. */ 468 480 # define BUSLOGIC_REGISTER_STATUS_COMMAND_INVALID RT_BIT(0) … … 474 486 # define BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE RT_BIT(7) 475 487 476 #define BUSLOGIC_REGISTER_COMMAND 1 /* Writeonly */477 #define BUSLOGIC_REGISTER_DATAIN 1 /* Readonly */478 #define BUSLOGIC_REGISTER_INTERRUPT 2 /* Readonly */488 #define BUSLOGIC_REGISTER_COMMAND 1 /**< Writeonly */ 489 #define BUSLOGIC_REGISTER_DATAIN 1 /**< Readonly */ 490 #define BUSLOGIC_REGISTER_INTERRUPT 2 /**< Readonly */ 479 491 /** Fields for the interrupt register. */ 480 492 # define BUSLOGIC_REGISTER_INTERRUPT_INCOMING_MAILBOX_LOADED RT_BIT(0) … … 487 499 # define BUSLOGIC_REGISTER_GEOMETRY_EXTENTED_TRANSLATION_ENABLED RT_BIT(7) 488 500 489 /* Structure for the INQUIRE_PCI_HOST_ADAPTER_INFORMATION reply. */501 /** Structure for the INQUIRE_PCI_HOST_ADAPTER_INFORMATION reply. */ 490 502 typedef struct ReplyInquirePCIHostAdapterInformation 491 503 { 492 504 uint8_t IsaIOPort; 493 505 uint8_t IRQ; 494 unsigned char LowByteTerminated :1;495 unsigned char HighByteTerminated :1;496 unsigned char uReserved :2; /* Reserved. */497 unsigned char JP1 :1; /* Whatever that means. */498 unsigned char JP2 :1; /* Whatever that means. */499 unsigned char JP3 :1; /* Whatever that means. */506 unsigned char LowByteTerminated : 1; 507 unsigned char HighByteTerminated : 1; 508 unsigned char uReserved : 2; /* Reserved. */ 509 unsigned char JP1 : 1; /* Whatever that means. */ 510 unsigned char JP2 : 1; /* Whatever that means. */ 511 unsigned char JP3 : 1; /* Whatever that means. */ 500 512 /** Whether the provided info is valid. */ 501 513 unsigned char InformationIsValid: 1; … … 504 516 AssertCompileSize(ReplyInquirePCIHostAdapterInformation, 4); 505 517 506 /* Structure for the INQUIRE_CONFIGURATION reply. */518 /** Structure for the INQUIRE_CONFIGURATION reply. */ 507 519 typedef struct ReplyInquireConfiguration 508 520 { 509 unsigned char uReserved1 : 5;510 bool fDmaChannel5 : 1;511 bool fDmaChannel6 : 1;512 bool fDmaChannel7 : 1;513 bool fIrqChannel9 : 1;514 bool fIrqChannel10 : 1;515 bool fIrqChannel11 : 1;516 bool fIrqChannel12 : 1;517 unsigned char uReserved2 : 1;518 bool fIrqChannel14 : 1;519 bool fIrqChannel15 : 1;520 unsigned char uReserved3 : 1;521 unsigned char uHostAdapterId : 4;522 unsigned char uReserved4 : 4;521 unsigned char uReserved1 : 5; 522 bool fDmaChannel5 : 1; 523 bool fDmaChannel6 : 1; 524 bool fDmaChannel7 : 1; 525 bool fIrqChannel9 : 1; 526 bool fIrqChannel10 : 1; 527 bool fIrqChannel11 : 1; 528 bool fIrqChannel12 : 1; 529 unsigned char uReserved2 : 1; 530 bool fIrqChannel14 : 1; 531 bool fIrqChannel15 : 1; 532 unsigned char uReserved3 : 1; 533 unsigned char uHostAdapterId : 4; 534 unsigned char uReserved4 : 4; 523 535 } ReplyInquireConfiguration, *PReplyInquireConfiguration; 524 536 AssertCompileSize(ReplyInquireConfiguration, 3); 525 537 526 /* Structure for the INQUIRE_SETUP_INFORMATION reply. */538 /** Structure for the INQUIRE_SETUP_INFORMATION reply. */ 527 539 typedef struct ReplyInquireSetupInformationSynchronousValue 528 540 { 529 unsigned char uOffset : 4;530 unsigned char uTransferPeriod : 3;531 bool fSynchronous : 1;541 unsigned char uOffset : 4; 542 unsigned char uTransferPeriod : 3; 543 bool fSynchronous : 1; 532 544 }ReplyInquireSetupInformationSynchronousValue, *PReplyInquireSetupInformationSynchronousValue; 533 545 AssertCompileSize(ReplyInquireSetupInformationSynchronousValue, 1); … … 535 547 typedef struct ReplyInquireSetupInformation 536 548 { 537 bool fSynchronousInitiationEnabled : 1;538 bool fParityCheckingEnabled : 1;539 unsigned char uReserved1 : 6;549 bool fSynchronousInitiationEnabled : 1; 550 bool fParityCheckingEnabled : 1; 551 unsigned char uReserved1 : 6; 540 552 uint8_t uBusTransferRate; 541 553 uint8_t uPreemptTimeOnBus; … … 558 570 AssertCompileSize(ReplyInquireSetupInformation, 34); 559 571 560 /* Structure for the INQUIRE_EXTENDED_SETUP_INFORMATION. */572 /** Structure for the INQUIRE_EXTENDED_SETUP_INFORMATION. */ 561 573 #pragma pack(1) 562 574 typedef struct ReplyInquireExtendedSetupInformation … … 567 579 uint8_t cMailbox; 568 580 uint32_t uMailboxAddressBase; 569 unsigned char uReserved1 : 2;570 bool fFastEISA :1;571 unsigned char uReserved2 : 3;572 bool fLevelSensitiveInterrupt : 1;573 unsigned char uReserved3 : 1;581 unsigned char uReserved1 : 2; 582 bool fFastEISA : 1; 583 unsigned char uReserved2 : 3; 584 bool fLevelSensitiveInterrupt : 1; 585 unsigned char uReserved3 : 1; 574 586 unsigned char aFirmwareRevision[3]; 575 bool fHostWideSCSI : 1;576 bool fHostDifferentialSCSI : 1;577 bool fHostSupportsSCAM : 1;578 bool fHostUltraSCSI : 1;579 bool fHostSmartTermination : 1;580 unsigned char uReserved4 : 3;587 bool fHostWideSCSI : 1; 588 bool fHostDifferentialSCSI : 1; 589 bool fHostSupportsSCAM : 1; 590 bool fHostUltraSCSI : 1; 591 bool fHostSmartTermination : 1; 592 unsigned char uReserved4 : 3; 581 593 } ReplyInquireExtendedSetupInformation, *PReplyInquireExtendedSetupInformation; 582 594 AssertCompileSize(ReplyInquireExtendedSetupInformation, 14); 583 595 #pragma pack() 584 596 585 /* Structure for the INITIALIZE EXTENDED MAILBOX request. */597 /** Structure for the INITIALIZE EXTENDED MAILBOX request. */ 586 598 #pragma pack(1) 587 599 typedef struct RequestInitializeExtendedMailbox … … 595 607 #pragma pack() 596 608 597 /* Structure for the INITIALIZE MAILBOX request. */609 /** Structure for the INITIALIZE MAILBOX request. */ 598 610 typedef struct 599 611 { … … 605 617 AssertCompileSize(RequestInitMbx, 4); 606 618 607 /* 619 /** 608 620 * Structure of a mailbox in guest memory. 609 621 * The incoming and outgoing mailbox have the same size … … 646 658 AssertCompileSize(Mailbox32, 8); 647 659 648 /* Old style 24-bit mailbox entry. */660 /** Old style 24-bit mailbox entry. */ 649 661 typedef struct Mailbox24 650 662 { … … 656 668 AssertCompileSize(Mailbox24, 4); 657 669 658 /* 670 /** 659 671 * Action codes for outgoing mailboxes. 660 672 */ … … 666 678 }; 667 679 668 /* 680 /** 669 681 * Completion codes for incoming mailboxes. 670 682 */ … … 679 691 }; 680 692 681 /* 693 /** 682 694 * Host adapter status for incoming mailboxes. 683 695 */ … … 711 723 }; 712 724 713 /* 725 /** 714 726 * Device status codes for incoming mailboxes. 715 727 */ … … 721 733 }; 722 734 723 /* 735 /** 724 736 * Opcode types for CCB. 725 737 */ … … 734 746 }; 735 747 736 /* 748 /** 737 749 * Data transfer direction. 738 750 */ … … 745 757 }; 746 758 747 /* 759 /** 748 760 * The command control block for a SCSI request. 749 761 */ … … 753 765 uint8_t uOpcode; 754 766 /** Reserved */ 755 unsigned char uReserved1 :3;767 unsigned char uReserved1 : 3; 756 768 /** Data direction for the request. */ 757 unsigned char uDataDirection :2;769 unsigned char uDataDirection : 2; 758 770 /** Whether the request is tag queued. */ 759 bool fTagQueued :1;771 bool fTagQueued : 1; 760 772 /** Queue tag mode. */ 761 unsigned char uQueueTag :2;773 unsigned char uQueueTag : 2; 762 774 /** Length of the SCSI CDB. */ 763 775 uint8_t cbCDB; … … 779 791 uint8_t uTargetId; 780 792 /**The LUN in the device. */ 781 unsigned char uLogicalUnit :5;793 unsigned char uLogicalUnit : 5; 782 794 /** Legacy tag. */ 783 bool fLegacyTagEnable : 1;795 bool fLegacyTagEnable : 1; 784 796 /** Legacy queue tag. */ 785 unsigned char uLegacyQueueTag :2;786 /** The SCSI CDB. */787 uint8_t aCDB[12]; /* A CDB can be 12 bytes long. */797 unsigned char uLegacyQueueTag : 2; 798 /** The SCSI CDB. (A CDB can be 12 bytes long.) */ 799 uint8_t aCDB[12]; 788 800 /** Reserved. */ 789 801 uint8_t uReserved3[6]; … … 794 806 795 807 796 /* 808 /** 797 809 * The 24-bit command control block. 798 810 */ … … 802 814 uint8_t uOpcode; 803 815 /** The LUN in the device. */ 804 unsigned char uLogicalUnit :3;816 unsigned char uLogicalUnit : 3; 805 817 /** Data direction for the request. */ 806 unsigned char uDataDirection : 2;818 unsigned char uDataDirection : 2; 807 819 /** The target device ID. */ 808 unsigned char uTargetId :3;820 unsigned char uTargetId : 3; 809 821 /** Length of the SCSI CDB. */ 810 822 uint8_t cbCDB; … … 827 839 /** Two unused bytes. */ 828 840 uint8_t aReserved[2]; 829 /** The SCSI CDB. */830 uint8_t aCDB[12]; /* A CDB can be 12 bytes long. */841 /** The SCSI CDB. (A CDB can be 12 bytes long.) */ 842 uint8_t aCDB[12]; 831 843 } CCB24, *PCCB24; 832 844 AssertCompileSize(CCB24, 30); 833 845 834 /* 846 /** 835 847 * The common 24-bit/32-bit command control block. The 32-bit CCB is laid out 836 848 * such that many fields are in the same location as in the older 24-bit CCB. … … 841 853 uint8_t uOpcode; 842 854 /** The LUN in the device. */ 843 unsigned char uPad1 :3;855 unsigned char uPad1 : 3; 844 856 /** Data direction for the request. */ 845 unsigned char uDataDirection : 2;857 unsigned char uDataDirection : 2; 846 858 /** The target device ID. */ 847 unsigned char uPad2 :3;859 unsigned char uPad2 : 3; 848 860 /** Length of the SCSI CDB. */ 849 861 uint8_t cbCDB; … … 872 884 AssertCompileMemberOffset(CCB32, aCDB, 18); 873 885 874 /* A union of all CCB types (24-bit/32-bit/common). */ 875 typedef union CCBU { 876 CCB32 n; /* New 32-bit CCB. */ 877 CCB24 o; /* Old 24-bit CCB. */ 878 CCBC c; /* Common CCB subset. */ 886 /** A union of all CCB types (24-bit/32-bit/common). */ 887 typedef union CCBU 888 { 889 CCB32 n; /**< New 32-bit CCB. */ 890 CCB24 o; /**< Old 24-bit CCB. */ 891 CCBC c; /**< Common CCB subset. */ 879 892 } CCBU, *PCCBU; 880 893 881 /* 32-bit scatter-gather list entry. */894 /** 32-bit scatter-gather list entry. */ 882 895 typedef struct SGE32 883 896 { … … 887 900 AssertCompileSize(SGE32, 8); 888 901 889 /* 24-bit scatter-gather list entry. */902 /** 24-bit scatter-gather list entry. */ 890 903 typedef struct SGE24 891 904 { … … 895 908 AssertCompileSize(SGE24, 6); 896 909 897 /* 910 /** 898 911 * The structure for the "Execute SCSI Command" command. 899 912 */ … … 909 922 uint8_t uLogicalUnit; 910 923 /** Reserved */ 911 unsigned char uReserved1 :3;924 unsigned char uReserved1 : 3; 912 925 /** Data direction for the request. */ 913 unsigned char uDataDirection : 2;926 unsigned char uDataDirection : 2; 914 927 /** Reserved */ 915 unsigned char uReserved2 :3;928 unsigned char uReserved2 : 3; 916 929 /** Length of the SCSI CDB. */ 917 930 uint8_t cbCDB; 918 /** The SCSI CDB. */919 uint8_t aCDB[12]; /* A CDB can be 12 bytes long. */931 /** The SCSI CDB. (A CDB can be 12 bytes long.) */ 932 uint8_t aCDB[12]; 920 933 } ESCMD, *PESCMD; 921 934 AssertCompileSize(ESCMD, 24); 922 935 923 /* 936 /** 924 937 * Task state for a CCB request. 925 938 */ … … 956 969 #define PDMILEDPORTS_2_PBUSLOGIC(pInterface) ( (PBUSLOGIC)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGIC, ILeds)) ) 957 970 958 static int buslogicRegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode); 971 /******************************************************************************* 972 * Internal Functions * 973 *******************************************************************************/ 974 static int buslogicR3RegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode); 975 959 976 960 977 /** … … 1015 1032 * Advances the mailbox pointer to the next slot. 1016 1033 */ 1017 DECLINLINE(void) buslogic OutgoingMailboxAdvance(PBUSLOGIC pBusLogic)1034 DECLINLINE(void) buslogicR3OutgoingMailboxAdvance(PBUSLOGIC pBusLogic) 1018 1035 { 1019 1036 pBusLogic->uMailboxOutgoingPositionCurrent = (pBusLogic->uMailboxOutgoingPositionCurrent + 1) % pBusLogic->cMailbox; … … 1026 1043 * @param pBusLogic. 1027 1044 */ 1028 static void buslogic InitializeLocalRam(PBUSLOGIC pBusLogic)1045 static void buslogicR3InitializeLocalRam(PBUSLOGIC pBusLogic) 1029 1046 { 1030 1047 /* … … 1046 1063 pBusLogic->LocalRam.structured.autoSCSIData.fStrictRoundRobinMode = pBusLogic->fStrictRoundRobinMode; 1047 1064 pBusLogic->LocalRam.structured.autoSCSIData.u16UltraPermittedMask = ~0; 1048 /* @todo calculate checksum? */1065 /** @todo calculate checksum? */ 1049 1066 } 1050 1067 … … 1056 1073 * @param fResetIO Flag determining whether ISA I/O should be reset. 1057 1074 */ 1058 static int buslogic HwReset(PBUSLOGIC pBusLogic, bool fResetIO)1075 static int buslogicR3HwReset(PBUSLOGIC pBusLogic, bool fResetIO) 1059 1076 { 1060 1077 LogFlowFunc(("pBusLogic=%#p\n", pBusLogic)); … … 1075 1092 if (fResetIO) 1076 1093 { 1077 buslogicR egisterISARange(pBusLogic, pBusLogic->uDefaultISABaseCode);1078 } 1079 buslogic InitializeLocalRam(pBusLogic);1094 buslogicR3RegisterISARange(pBusLogic, pBusLogic->uDefaultISABaseCode); 1095 } 1096 buslogicR3InitializeLocalRam(pBusLogic); 1080 1097 vboxscsiInitialize(&pBusLogic->VBoxSCSI); 1081 1098 1082 1099 return VINF_SUCCESS; 1083 1100 } 1084 #endif 1101 1102 #endif /* IN_RING3 */ 1085 1103 1086 1104 /** … … 1112 1130 1113 1131 #if defined(IN_RING3) 1132 1114 1133 /** 1115 1134 * Initiates a hard reset which was issued from the guest. … … 1119 1138 * @param fHardReset Flag initiating a hard (vs. soft) reset. 1120 1139 */ 1121 static void buslogic InitiateReset(PBUSLOGIC pBusLogic, bool fHardReset)1140 static void buslogicR3InitiateReset(PBUSLOGIC pBusLogic, bool fHardReset) 1122 1141 { 1123 1142 LogFlowFunc(("pBusLogic=%#p fHardReset=%d\n", pBusLogic, fHardReset)); 1124 1143 1125 buslogic HwReset(pBusLogic, false);1144 buslogicR3HwReset(pBusLogic, false); 1126 1145 1127 1146 if (fHardReset) … … 1146 1165 * @param uMailboxCompletionCode Completion status code to set in the mailbox. 1147 1166 */ 1148 static void buslogic SendIncomingMailbox(PBUSLOGIC pBusLogic, PBUSLOGICTASKSTATE pTaskState,1149 uint8_t uHostAdapterStatus, uint8_t uDeviceStatus,1150 uint8_t uMailboxCompletionCode)1167 static void buslogicR3SendIncomingMailbox(PBUSLOGIC pBusLogic, PBUSLOGICTASKSTATE pTaskState, 1168 uint8_t uHostAdapterStatus, uint8_t uDeviceStatus, 1169 uint8_t uMailboxCompletionCode) 1151 1170 { 1152 1171 pTaskState->MailboxGuest.u.in.uHostAdapterStatus = uHostAdapterStatus; … … 1156 1175 int rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_SUCCESS); 1157 1176 AssertRC(rc); 1158 RTGCPHYS GCPhysAddrMailboxIncoming;1159 1177 RTGCPHYS GCPhysAddrCCB = pTaskState->MailboxGuest.u32PhysAddrCCB; 1160 1161 GCPhysAddrMailboxIncoming = pBusLogic->GCPhysAddrMailboxIncomingBase + (pBusLogic->uMailboxIncomingPositionCurrent * (pTaskState->fIs24Bit ? sizeof(Mailbox24) : sizeof(Mailbox32))); 1178 RTGCPHYS GCPhysAddrMailboxIncoming = pBusLogic->GCPhysAddrMailboxIncomingBase 1179 + ( pBusLogic->uMailboxIncomingPositionCurrent 1180 * (pTaskState->fIs24Bit ? sizeof(Mailbox24) : sizeof(Mailbox32)) ); 1162 1181 LogFlowFunc(("Completing CCB %RGp hstat=%u, dstat=%u, outgoing mailbox at %RGp\n", GCPhysAddrCCB, 1163 1182 uHostAdapterStatus, uDeviceStatus, GCPhysAddrMailboxIncoming)); … … 1166 1185 pTaskState->CommandControlBlockGuest.c.uHostAdapterStatus = uHostAdapterStatus; 1167 1186 pTaskState->CommandControlBlockGuest.c.uDeviceStatus = uDeviceStatus; 1168 /* @todo:this is wrong - writing too much! */1187 /** @todo this is wrong - writing too much! */ 1169 1188 PDMDevHlpPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB, &pTaskState->CommandControlBlockGuest, sizeof(CCBC)); 1170 1189 1171 # ifdef RT_STRICT1190 # ifdef RT_STRICT 1172 1191 uint8_t uCode; 1173 1192 unsigned uCodeOffs = pTaskState->fIs24Bit ? RT_OFFSETOF(Mailbox24, uCmdState) : RT_OFFSETOF(Mailbox32, u.out.uActionCode); 1174 1193 PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming + uCodeOffs, &uCode, sizeof(uCode)); 1175 1194 Assert(uCode == BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE); 1176 # endif1195 # endif 1177 1196 1178 1197 /* Update mailbox. */ … … 1197 1216 pBusLogic->uMailboxIncomingPositionCurrent = 0; 1198 1217 1199 # ifdef LOG_ENABLED1218 # ifdef LOG_ENABLED 1200 1219 ASMAtomicIncU32(&pBusLogic->cInMailboxesReady); 1201 # endif1220 # endif 1202 1221 1203 1222 buslogicSetInterrupt(pBusLogic, false, BUSLOGIC_REGISTER_INTERRUPT_INCOMING_MAILBOX_LOADED); … … 1206 1225 } 1207 1226 1208 #if defined(DEBUG) 1227 # ifdef LOG_ENABLED 1228 1209 1229 /** 1210 1230 * Dumps the content of a mailbox for debugging purposes. … … 1215 1235 * false if dumping the incoming state. 1216 1236 */ 1217 static void buslogic DumpMailboxInfo(PMailbox32 pMailbox, bool fOutgoing)1237 static void buslogicR3DumpMailboxInfo(PMailbox32 pMailbox, bool fOutgoing) 1218 1238 { 1219 1239 Log(("%s: Dump for %s mailbox:\n", __FUNCTION__, fOutgoing ? "outgoing" : "incoming")); … … 1238 1258 * @param fIs24BitCCB Flag to determine CCB format. 1239 1259 */ 1240 static void buslogic DumpCCBInfo(PCCBU pCCB, bool fIs24BitCCB)1260 static void buslogicR3DumpCCBInfo(PCCBU pCCB, bool fIs24BitCCB) 1241 1261 { 1242 1262 Log(("%s: Dump for %s Command Control Block:\n", __FUNCTION__, fIs24BitCCB ? "24-bit" : "32-bit")); … … 1270 1290 Log(("%s: uCDB[%d]=%u\n", __FUNCTION__, i, pCCB->c.aCDB[i])); 1271 1291 } 1272 #endif 1292 1293 # endif /* LOG_ENABLED */ 1273 1294 1274 1295 /** … … 1280 1301 * @param pSGEList Pointer to 32-bit S/G list storage. 1281 1302 */ 1282 1283 static void buslogicReadSGEntries(PBUSLOGICTASKSTATE pTaskState, RTGCPHYS GCSGList, uint32_t cEntries, SGE32 *pSGEList) 1303 static void buslogicR3ReadSGEntries(PBUSLOGICTASKSTATE pTaskState, RTGCPHYS GCSGList, uint32_t cEntries, SGE32 *pSGEList) 1284 1304 { 1285 1305 PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns); … … 1292 1312 Log2(("Converting %u 24-bit S/G entries to 32-bit\n", cEntries)); 1293 1313 PDMDevHlpPhysRead(pDevIns, GCSGList, &aSGE24, cEntries * sizeof(SGE24)); 1294 for (u nsignedi = 0; i < cEntries; ++i)1314 for (uint32_t i = 0; i < cEntries; ++i) 1295 1315 { 1296 1316 pSGEList[i].cbSegment = LEN_TO_U32(aSGE24[i].acbSegment); … … 1308 1328 * @param pTaskState Pointer to the task state. 1309 1329 */ 1310 static int buslogic DataBufferAlloc(PBUSLOGICTASKSTATE pTaskState)1330 static int buslogicR3DataBufferAlloc(PBUSLOGICTASKSTATE pTaskState) 1311 1331 { 1312 1332 PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns); … … 1329 1349 && cbDataCCB) 1330 1350 { 1351 /** @todo Check following assumption and what residual means. */ 1331 1352 /* 1332 * @todo: Check following assumption and what residual means.1333 *1334 1353 * The BusLogic adapter can handle two different data buffer formats. 1335 1354 * The first one is that the data pointer entry in the CCB points to … … 1355 1374 cScatterGatherGCLeft -= cScatterGatherGCRead; 1356 1375 1357 buslogicR eadSGEntries(pTaskState, GCPhysAddrScatterGatherCurrent, cScatterGatherGCRead, aScatterGatherReadGC);1376 buslogicR3ReadSGEntries(pTaskState, GCPhysAddrScatterGatherCurrent, cScatterGatherGCRead, aScatterGatherReadGC); 1358 1377 1359 1378 for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++) … … 1397 1416 cScatterGatherGCLeft -= cScatterGatherGCRead; 1398 1417 1399 buslogicR eadSGEntries(pTaskState, GCPhysAddrScatterGatherCurrent, cScatterGatherGCRead, aScatterGatherReadGC);1418 buslogicR3ReadSGEntries(pTaskState, GCPhysAddrScatterGatherCurrent, cScatterGatherGCRead, aScatterGatherReadGC); 1400 1419 1401 1420 for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++) … … 1452 1471 * @param pTaskState Pointer to the task state. 1453 1472 */ 1454 static void buslogic DataBufferFree(PBUSLOGICTASKSTATE pTaskState)1473 static void buslogicR3DataBufferFree(PBUSLOGICTASKSTATE pTaskState) 1455 1474 { 1456 1475 PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns); … … 1497 1516 do 1498 1517 { 1499 cScatterGatherGCRead = 1500 1501 1518 cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC)) 1519 ? cScatterGatherGCLeft 1520 : RT_ELEMENTS(aScatterGatherReadGC); 1502 1521 cScatterGatherGCLeft -= cScatterGatherGCRead; 1503 1522 1504 buslogicR eadSGEntries(pTaskState, GCPhysAddrScatterGatherCurrent, cScatterGatherGCRead, aScatterGatherReadGC);1523 buslogicR3ReadSGEntries(pTaskState, GCPhysAddrScatterGatherCurrent, cScatterGatherGCRead, aScatterGatherReadGC); 1505 1524 1506 1525 for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++) … … 1533 1552 AssertMsg(GCPhysAddrDataBase != 0, ("Physical address is 0\n")); 1534 1553 1535 Log(("Non 1554 Log(("Non-scattered buffer:\n")); 1536 1555 Log(("u32PhysAddrData=%#x\n", u32PhysAddrCCB)); 1537 1556 Log(("cbData=%u\n", cbDataCCB)); … … 1549 1568 uint32_t cbResidual; 1550 1569 1551 / /@todo: we need to get the actual transfer length from the VSCSI layer?!1570 /** @todo we need to get the actual transfer length from the VSCSI layer?! */ 1552 1571 cbResidual = 0; //LEN_TO_U32(pTaskState->CCBGuest.acbData) - ???; 1553 1572 if (pTaskState->fIs24Bit) … … 1562 1581 } 1563 1582 1564 /* Convert sense buffer length taking into account shortcut values. */1565 static uint32_t buslogic ConvertSenseBufferLength(uint32_t cbSense)1583 /** Convert sense buffer length taking into account shortcut values. */ 1584 static uint32_t buslogicR3ConvertSenseBufferLength(uint32_t cbSense) 1566 1585 { 1567 1586 /* Convert special sense buffer length values. */ … … 1583 1602 * @param fCopy If sense data should be copied to guest memory. 1584 1603 */ 1585 static void buslogic SenseBufferFree(PBUSLOGICTASKSTATE pTaskState, bool fCopy)1604 static void buslogicR3SenseBufferFree(PBUSLOGICTASKSTATE pTaskState, bool fCopy) 1586 1605 { 1587 1606 uint32_t cbSenseBuffer; 1588 1607 1589 cbSenseBuffer = buslogic ConvertSenseBufferLength(pTaskState->CommandControlBlockGuest.c.cbSenseData);1608 cbSenseBuffer = buslogicR3ConvertSenseBufferLength(pTaskState->CommandControlBlockGuest.c.cbSenseData); 1590 1609 1591 1610 /* Copy the sense buffer into guest memory if requested. */ … … 1621 1640 * @note Current assumption is that the sense buffer is not scattered and does not cross a page boundary. 1622 1641 */ 1623 static int buslogic SenseBufferAlloc(PBUSLOGICTASKSTATE pTaskState)1642 static int buslogicR3SenseBufferAlloc(PBUSLOGICTASKSTATE pTaskState) 1624 1643 { 1625 1644 PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns); … … 1628 1647 pTaskState->pbSenseBuffer = NULL; 1629 1648 1630 cbSenseBuffer = buslogic ConvertSenseBufferLength(pTaskState->CommandControlBlockGuest.c.cbSenseData);1649 cbSenseBuffer = buslogicR3ConvertSenseBufferLength(pTaskState->CommandControlBlockGuest.c.cbSenseData); 1631 1650 if (cbSenseBuffer) 1632 1651 { … … 1638 1657 return VINF_SUCCESS; 1639 1658 } 1659 1640 1660 #endif /* IN_RING3 */ 1641 1661 … … 1680 1700 #ifdef IN_RING3 1681 1701 Log(("ISA I/O for PCI (code %x)\n", pBusLogic->aCommandBuffer[0])); 1682 buslogicR egisterISARange(pBusLogic, pBusLogic->aCommandBuffer[0]);1702 buslogicR3RegisterISARange(pBusLogic, pBusLogic->aCommandBuffer[0]); 1683 1703 pBusLogic->cbReplyParametersLeft = 0; 1684 1704 fSuppressIrq = true; … … 1761 1781 * therefore we log a warning. 1762 1782 */ 1763 switch (uPciIrq) { 1764 case 9: pReply->fIrqChannel9 = 1; break; 1765 case 10: pReply->fIrqChannel10 = 1; break; 1766 case 11: pReply->fIrqChannel11 = 1; break; 1767 case 12: pReply->fIrqChannel12 = 1; break; 1768 case 14: pReply->fIrqChannel14 = 1; break; 1769 case 15: pReply->fIrqChannel15 = 1; break; 1770 default: 1771 LogRel(("Warning: PCI IRQ %d cannot be represented as ISA!\n", uPciIrq)); 1772 break; 1783 switch (uPciIrq) 1784 { 1785 case 9: pReply->fIrqChannel9 = 1; break; 1786 case 10: pReply->fIrqChannel10 = 1; break; 1787 case 11: pReply->fIrqChannel11 = 1; break; 1788 case 12: pReply->fIrqChannel12 = 1; break; 1789 case 14: pReply->fIrqChannel14 = 1; break; 1790 case 15: pReply->fIrqChannel15 = 1; break; 1791 default: 1792 LogRel(("Warning: PCI IRQ %d cannot be represented as ISA!\n", uPciIrq)); 1793 break; 1773 1794 } 1774 1795 break; … … 1786 1807 memset(pReply, 0, sizeof(ReplyInquireExtendedSetupInformation)); 1787 1808 1788 / /@todo: should this reflect the RAM contents (AutoSCSIRam)?1809 /** @todo should this reflect the RAM contents (AutoSCSIRam)? */ 1789 1810 pReply->uBusType = 'E'; /* EISA style */ 1790 1811 pReply->u16ScatterGatherLimit = 8192; … … 1934 1955 1935 1956 for (uint8_t i = 0; i < pBusLogic->cbReplyParametersLeft; i++) 1936 pBusLogic->aReplyBuffer[i] = 0; /* @todo Figure if we need something other here. It's not needed for the linux driver */1957 pBusLogic->aReplyBuffer[i] = 0; /** @todo Figure if we need something other here. It's not needed for the linux driver */ 1937 1958 1938 1959 break; … … 2111 2132 2112 2133 LogRel(("BusLogic: %s reset\n", fHardReset ? "hard" : "soft")); 2113 buslogic InitiateReset(pBusLogic, fHardReset);2134 buslogicR3InitiateReset(pBusLogic, fHardReset); 2114 2135 #else 2115 2136 rc = VINF_IOM_R3_IOPORT_WRITE; … … 2274 2295 * @param cb Number of bytes read. 2275 2296 */ 2276 PDMBOTHCBDECL(int) buslogicMMIORead(PPDMDEVINS pDevIns, void *pvUser, 2277 RTGCPHYS GCPhysAddr, void *pv, unsigned cb) 2297 PDMBOTHCBDECL(int) buslogicMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb) 2278 2298 { 2279 2299 /* the linux driver does not make use of the MMIO area. */ … … 2293 2313 * @param cb Number of bytes to write. 2294 2314 */ 2295 PDMBOTHCBDECL(int) buslogicMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, 2296 RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 2315 PDMBOTHCBDECL(int) buslogicMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb) 2297 2316 { 2298 2317 /* the linux driver does not make use of the MMIO area. */ … … 2312 2331 * @param cb Number of bytes read. 2313 2332 */ 2314 PDMBOTHCBDECL(int) buslogicIOPortRead (PPDMDEVINS pDevIns, void *pvUser, 2315 RTIOPORT Port, uint32_t *pu32, unsigned cb) 2333 PDMBOTHCBDECL(int) buslogicIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) 2316 2334 { 2317 2335 PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC); … … 2334 2352 * @param cb The value size in bytes. 2335 2353 */ 2336 PDMBOTHCBDECL(int) buslogicIOPortWrite (PPDMDEVINS pDevIns, void *pvUser, 2337 RTIOPORT Port, uint32_t u32, unsigned cb) 2354 PDMBOTHCBDECL(int) buslogicIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 2338 2355 { 2339 2356 PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC); … … 2354 2371 #ifdef IN_RING3 2355 2372 2356 static int buslogic PrepareBIOSSCSIRequest(PBUSLOGIC pBusLogic)2373 static int buslogicR3PrepareBIOSSCSIRequest(PBUSLOGIC pBusLogic) 2357 2374 { 2358 2375 int rc; … … 2417 2434 * @param cb Number of bytes read. 2418 2435 */ 2419 static int buslogicBIOSIOPortRead(PPDMDEVINS pDevIns, void *pvUser, 2420 RTIOPORT Port, uint32_t *pu32, unsigned cb) 2436 static DECLCALLBACK(int) buslogicR3BiosIoPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb) 2421 2437 { 2422 2438 int rc; … … 2444 2460 * @param cb The value size in bytes. 2445 2461 */ 2446 static int buslogicBIOSIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, 2447 RTIOPORT Port, uint32_t u32, unsigned cb) 2462 static DECLCALLBACK(int) buslogicR3BiosIoPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb) 2448 2463 { 2449 2464 int rc; … … 2458 2473 if (rc == VERR_MORE_DATA) 2459 2474 { 2460 rc = buslogic PrepareBIOSSCSIRequest(pBusLogic);2475 rc = buslogicR3PrepareBIOSSCSIRequest(pBusLogic); 2461 2476 AssertRC(rc); 2462 2477 } … … 2471 2486 * @see FNIOMIOPORTOUTSTRING for details. 2472 2487 */ 2473 static DECLCALLBACK(int) buslogicBIOSIOPortWriteStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb) 2488 static DECLCALLBACK(int) buslogicR3BiosIoPortWriteStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, 2489 PRTGCUINTREG pcTransfer, unsigned cb) 2474 2490 { 2475 2491 PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC); … … 2483 2499 if (rc == VERR_MORE_DATA) 2484 2500 { 2485 rc = buslogic PrepareBIOSSCSIRequest(pBusLogic);2501 rc = buslogicR3PrepareBIOSSCSIRequest(pBusLogic); 2486 2502 AssertRC(rc); 2487 2503 } … … 2496 2512 * @see FNIOMIOPORTINSTRING for details. 2497 2513 */ 2498 static DECLCALLBACK(int) buslogicBIOSIOPortReadStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb) 2514 static DECLCALLBACK(int) buslogicR3BiosIoPortReadStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, 2515 PRTGCUINTREG pcTransfer, unsigned cb) 2499 2516 { 2500 2517 PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC); … … 2514 2531 * @param uBaseCode Encoded ISA I/O base; only low 3 bits are used. 2515 2532 */ 2516 static int buslogicR egisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode)2533 static int buslogicR3RegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode) 2517 2534 { 2518 2535 uint8_t uCode = uBaseCode & MAX_ISA_BASE; 2519 uint16_t uNewBase = aISABases[uCode];2536 uint16_t uNewBase = g_aISABases[uCode]; 2520 2537 int rc = VINF_SUCCESS; 2521 2538 … … 2566 2583 } 2567 2584 2568 static void buslogic WarningDiskFull(PPDMDEVINS pDevIns)2585 static void buslogicR3WarningDiskFull(PPDMDEVINS pDevIns) 2569 2586 { 2570 2587 int rc; … … 2575 2592 } 2576 2593 2577 static void buslogic WarningFileTooBig(PPDMDEVINS pDevIns)2594 static void buslogicR3WarningFileTooBig(PPDMDEVINS pDevIns) 2578 2595 { 2579 2596 int rc; … … 2584 2601 } 2585 2602 2586 static void buslogic WarningISCSI(PPDMDEVINS pDevIns)2603 static void buslogicR3WarningISCSI(PPDMDEVINS pDevIns) 2587 2604 { 2588 2605 int rc; … … 2593 2610 } 2594 2611 2595 static void buslogic WarningUnknown(PPDMDEVINS pDevIns, int rc)2612 static void buslogicR3WarningUnknown(PPDMDEVINS pDevIns, int rc) 2596 2613 { 2597 2614 int rc2; … … 2602 2619 } 2603 2620 2604 static void buslogicR edoSetWarning(PBUSLOGIC pThis, int rc)2621 static void buslogicR3RedoSetWarning(PBUSLOGIC pThis, int rc) 2605 2622 { 2606 2623 if (rc == VERR_DISK_FULL) 2607 buslogic WarningDiskFull(pThis->CTX_SUFF(pDevIns));2624 buslogicR3WarningDiskFull(pThis->CTX_SUFF(pDevIns)); 2608 2625 else if (rc == VERR_FILE_TOO_BIG) 2609 buslogic WarningFileTooBig(pThis->CTX_SUFF(pDevIns));2626 buslogicR3WarningFileTooBig(pThis->CTX_SUFF(pDevIns)); 2610 2627 else if (rc == VERR_BROKEN_PIPE || rc == VERR_NET_CONNECTION_REFUSED) 2611 2628 { 2612 2629 /* iSCSI connection abort (first error) or failure to reestablish 2613 2630 * connection (second error). Pause VM. On resume we'll retry. */ 2614 buslogic WarningISCSI(pThis->CTX_SUFF(pDevIns));2631 buslogicR3WarningISCSI(pThis->CTX_SUFF(pDevIns)); 2615 2632 } 2616 2633 else 2617 buslogicWarningUnknown(pThis->CTX_SUFF(pDevIns), rc); 2618 } 2619 2620 2621 static DECLCALLBACK(int) buslogicMMIOMap(PPCIDEVICE pPciDev, /*unsigned*/ int iRegion, 2622 RTGCPHYS GCPhysAddress, uint32_t cb, 2623 PCIADDRESSSPACE enmType) 2634 buslogicR3WarningUnknown(pThis->CTX_SUFF(pDevIns), rc); 2635 } 2636 2637 2638 static DECLCALLBACK(int) buslogicR3MmioMap(PPCIDEVICE pPciDev, /*unsigned*/ int iRegion, 2639 RTGCPHYS GCPhysAddress, uint32_t cb, PCIADDRESSSPACE enmType) 2624 2640 { 2625 2641 PPDMDEVINS pDevIns = pPciDev->pDevIns; … … 2689 2705 } 2690 2706 2691 static DECLCALLBACK(int) buslogic DeviceSCSIRequestCompleted(PPDMISCSIPORT pInterface, PPDMSCSIREQUEST pSCSIRequest,2692 int rcCompletion, bool fRedo, int rcReq)2707 static DECLCALLBACK(int) buslogicR3DeviceSCSIRequestCompleted(PPDMISCSIPORT pInterface, PPDMSCSIREQUEST pSCSIRequest, 2708 int rcCompletion, bool fRedo, int rcReq) 2693 2709 { 2694 2710 int rc; … … 2705 2721 if (!pTaskState->fBIOS) 2706 2722 { 2707 buslogic DataBufferFree(pTaskState);2723 buslogicR3DataBufferFree(pTaskState); 2708 2724 2709 2725 if (pTaskState->pbSenseBuffer) 2710 buslogic SenseBufferFree(pTaskState, false /* fCopy */);2726 buslogicR3SenseBufferFree(pTaskState, false /* fCopy */); 2711 2727 } 2712 2728 … … 2719 2735 /* Suspend the VM if not done already. */ 2720 2736 if (!ASMAtomicXchgBool(&pBusLogic->fRedo, true)) 2721 buslogicR edoSetWarning(pBusLogic, rcReq);2737 buslogicR3RedoSetWarning(pBusLogic, rcReq); 2722 2738 } 2723 2739 else … … 2730 2746 else 2731 2747 { 2732 buslogic DataBufferFree(pTaskState);2748 buslogicR3DataBufferFree(pTaskState); 2733 2749 2734 2750 if (pTaskState->pbSenseBuffer) 2735 buslogic SenseBufferFree(pTaskState, (rcCompletion != SCSI_STATUS_OK));2751 buslogicR3SenseBufferFree(pTaskState, (rcCompletion != SCSI_STATUS_OK)); 2736 2752 2737 2753 if (rcCompletion == SCSI_STATUS_OK) 2738 buslogic SendIncomingMailbox(pBusLogic, pTaskState,2754 buslogicR3SendIncomingMailbox(pBusLogic, pTaskState, 2739 2755 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED, 2740 2756 BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD, 2741 2757 BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR); 2742 2758 else if (rcCompletion == SCSI_STATUS_CHECK_CONDITION) 2743 buslogic SendIncomingMailbox(pBusLogic, pTaskState,2759 buslogicR3SendIncomingMailbox(pBusLogic, pTaskState, 2744 2760 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED, 2745 2761 BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION, … … 2748 2764 AssertMsgFailed(("invalid completion status %d\n", rcCompletion)); 2749 2765 } 2750 #ifdef DEBUG2751 buslogic DumpCCBInfo(&pTaskState->CommandControlBlockGuest, pTaskState->fIs24Bit);2766 #ifdef LOG_ENABLED 2767 buslogicR3DumpCCBInfo(&pTaskState->CommandControlBlockGuest, pTaskState->fIs24Bit); 2752 2768 #endif 2753 2769 … … 2762 2778 } 2763 2779 2764 static DECLCALLBACK(int) buslogic QueryDeviceLocation(PPDMISCSIPORT pInterface, const char **ppcszController,2765 uint32_t *piInstance, uint32_t *piLUN)2780 static DECLCALLBACK(int) buslogicR3QueryDeviceLocation(PPDMISCSIPORT pInterface, const char **ppcszController, 2781 uint32_t *piInstance, uint32_t *piLUN) 2766 2782 { 2767 2783 PBUSLOGICDEVICE pBusLogicDevice = PDMISCSIPORT_2_PBUSLOGICDEVICE(pInterface); … … 2779 2795 } 2780 2796 2781 static int buslogic DeviceSCSIRequestSetup(PBUSLOGIC pBusLogic, PBUSLOGICTASKSTATE pTaskState)2797 static int buslogicR3DeviceSCSIRequestSetup(PBUSLOGIC pBusLogic, PBUSLOGICTASKSTATE pTaskState) 2782 2798 { 2783 2799 int rc = VINF_SUCCESS; … … 2786 2802 2787 2803 /* Fetch the CCB from guest memory. */ 2788 / /@todo: How much do we really have to read?2804 /** @todo How much do we really have to read? */ 2789 2805 RTGCPHYS GCPhysAddrCCB = (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB; 2790 2806 PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB, … … 2795 2811 pTaskState->CTX_SUFF(pTargetDevice) = pTargetDevice; 2796 2812 2797 #ifdef DEBUG2798 buslogic DumpCCBInfo(&pTaskState->CommandControlBlockGuest, pTaskState->fIs24Bit);2813 #ifdef LOG_ENABLED 2814 buslogicR3DumpCCBInfo(&pTaskState->CommandControlBlockGuest, pTaskState->fIs24Bit); 2799 2815 #endif 2800 2816 2801 2817 /* Alloc required buffers. */ 2802 rc = buslogic DataBufferAlloc(pTaskState);2818 rc = buslogicR3DataBufferAlloc(pTaskState); 2803 2819 AssertMsgRC(rc, ("Alloc failed rc=%Rrc\n", rc)); 2804 2820 2805 rc = buslogic SenseBufferAlloc(pTaskState);2821 rc = buslogicR3SenseBufferAlloc(pTaskState); 2806 2822 AssertMsgRC(rc, ("Mapping sense buffer failed rc=%Rrc\n", rc)); 2807 2823 … … 2809 2825 if (!pBusLogic->aDeviceStates[uTargetIdCCB].fPresent) 2810 2826 { 2811 buslogic DataBufferFree(pTaskState);2827 buslogicR3DataBufferFree(pTaskState); 2812 2828 2813 2829 if (pTaskState->pbSenseBuffer) 2814 buslogic SenseBufferFree(pTaskState, true);2815 2816 buslogic SendIncomingMailbox(pBusLogic, pTaskState,2830 buslogicR3SenseBufferFree(pTaskState, true); 2831 2832 buslogicR3SendIncomingMailbox(pBusLogic, pTaskState, 2817 2833 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT, 2818 2834 BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD, … … 2852 2868 pTaskState->PDMScsiRequest.paScatterGatherHead = NULL; 2853 2869 } 2854 pTaskState->PDMScsiRequest.cbSenseBuffer = buslogic ConvertSenseBufferLength(pTaskState->CommandControlBlockGuest.c.cbSenseData);2870 pTaskState->PDMScsiRequest.cbSenseBuffer = buslogicR3ConvertSenseBufferLength(pTaskState->CommandControlBlockGuest.c.cbSenseData); 2855 2871 pTaskState->PDMScsiRequest.pbSenseBuffer = pTaskState->pbSenseBuffer; 2856 2872 pTaskState->PDMScsiRequest.pvUser = pTaskState; … … 2872 2888 * @param pTaskStat Pointer to the task state being set up. 2873 2889 */ 2874 static RTGCPHYS buslogicR eadOutgoingMailbox(PBUSLOGIC pBusLogic, PBUSLOGICTASKSTATE pTaskState)2890 static RTGCPHYS buslogicR3ReadOutgoingMailbox(PBUSLOGIC pBusLogic, PBUSLOGICTASKSTATE pTaskState) 2875 2891 { 2876 2892 RTGCPHYS GCMailbox; … … 2900 2916 * @param pBusLogic Pointer to the BusLogic instance data. 2901 2917 */ 2902 static int buslogic ProcessMailboxNext(PBUSLOGIC pBusLogic)2918 static int buslogicR3ProcessMailboxNext(PBUSLOGIC pBusLogic) 2903 2919 { 2904 2920 PBUSLOGICTASKSTATE pTaskState = NULL; … … 2921 2937 { 2922 2938 /* Fetch mailbox from guest memory. */ 2923 GCPhysAddrMailboxCurrent = buslogicR eadOutgoingMailbox(pBusLogic,pTaskState);2939 GCPhysAddrMailboxCurrent = buslogicR3ReadOutgoingMailbox(pBusLogic,pTaskState); 2924 2940 2925 2941 /* Check the next mailbox. */ 2926 buslogic OutgoingMailboxAdvance(pBusLogic);2942 buslogicR3OutgoingMailboxAdvance(pBusLogic); 2927 2943 } while ( pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE 2928 2944 && uMailboxPosCur != pBusLogic->uMailboxOutgoingPositionCurrent); … … 2931 2947 { 2932 2948 /* Fetch mailbox from guest memory. */ 2933 GCPhysAddrMailboxCurrent = buslogicR eadOutgoingMailbox(pBusLogic,pTaskState);2949 GCPhysAddrMailboxCurrent = buslogicR3ReadOutgoingMailbox(pBusLogic,pTaskState); 2934 2950 } 2935 2951 … … 2948 2964 2949 2965 LogFlow(("Got loaded mailbox at slot %u, CCB phys %RGp\n", pBusLogic->uMailboxOutgoingPositionCurrent, (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB)); 2950 #ifdef DEBUG2951 buslogic DumpMailboxInfo(&pTaskState->MailboxGuest, true);2966 #ifdef LOG_ENABLED 2967 buslogicR3DumpMailboxInfo(&pTaskState->MailboxGuest, true); 2952 2968 #endif 2953 2969 … … 2958 2974 2959 2975 if (pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND) 2960 rc = buslogic DeviceSCSIRequestSetup(pBusLogic, pTaskState);2976 rc = buslogicR3DeviceSCSIRequestSetup(pBusLogic, pTaskState); 2961 2977 else if (pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND) 2962 2978 { … … 2970 2986 /* Advance to the next mailbox. */ 2971 2987 if (pBusLogic->fStrictRoundRobinMode) 2972 buslogic OutgoingMailboxAdvance(pBusLogic);2988 buslogicR3OutgoingMailboxAdvance(pBusLogic); 2973 2989 2974 2990 return rc; … … 2984 3000 * @param pItem The item to consume. Upon return this item will be freed. 2985 3001 */ 2986 static DECLCALLBACK(bool) buslogic NotifyQueueConsumer(PPDMDEVINS pDevIns, PPDMQUEUEITEMCORE pItem)3002 static DECLCALLBACK(bool) buslogicR3NotifyQueueConsumer(PPDMDEVINS pDevIns, PPDMQUEUEITEMCORE pItem) 2987 3003 { 2988 3004 PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC); … … 2991 3007 Assert(pBusLogic->fNotificationSend); 2992 3008 ASMAtomicXchgBool(&pBusLogic->fNotificationSend, false); 2993 ASMAtomicXchgU32(&pBusLogic->cMailboxesReady, 0); /* @todo:Actually not required anymore but to stay compatible with older saved states. */3009 ASMAtomicXchgU32(&pBusLogic->cMailboxesReady, 0); /** @todo Actually not required anymore but to stay compatible with older saved states. */ 2994 3010 2995 3011 /* Process mailboxes. */ … … 2997 3013 do 2998 3014 { 2999 rc = buslogic ProcessMailboxNext(pBusLogic);3015 rc = buslogicR3ProcessMailboxNext(pBusLogic); 3000 3016 AssertMsg(RT_SUCCESS(rc) || rc == VERR_NO_DATA, ("Processing mailbox failed rc=%Rrc\n", rc)); 3001 3017 } while (RT_SUCCESS(rc)); … … 3011 3027 * @param pThis The BusLogic device instance. 3012 3028 */ 3013 static void buslogic Kick(PBUSLOGIC pThis)3029 static void buslogicR3Kick(PBUSLOGIC pThis) 3014 3030 { 3015 3031 if (pThis->fRedo) … … 3020 3036 3021 3037 /* The BIOS had a request active when we got suspended. Resume it. */ 3022 int rc = buslogic PrepareBIOSSCSIRequest(pThis);3038 int rc = buslogicR3PrepareBIOSSCSIRequest(pThis); 3023 3039 AssertRC(rc); 3024 3040 } … … 3034 3050 PBUSLOGICTASKSTATE pCur = pTaskState; 3035 3051 3036 int rc = buslogic DeviceSCSIRequestSetup(pThis, pCur);3052 int rc = buslogicR3DeviceSCSIRequestSetup(pThis, pCur); 3037 3053 AssertRC(rc); 3038 3054 … … 3043 3059 } 3044 3060 3045 static DECLCALLBACK(int) buslogicLiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass) 3061 /** @callback_method_impl{FNSSMDEVLIVEEXEC} */ 3062 static DECLCALLBACK(int) buslogicR3LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass) 3046 3063 { 3047 3064 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC); … … 3054 3071 } 3055 3072 3056 static DECLCALLBACK(int) buslogicSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) 3073 /** @callback_method_impl{FNSSMDEVSAVEEXEC} */ 3074 static DECLCALLBACK(int) buslogicR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) 3057 3075 { 3058 3076 PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC); … … 3137 3155 } 3138 3156 3139 static DECLCALLBACK(int) buslogicLoadDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) 3157 /** @callback_method_impl{FNSSMDEVLOADDONE} */ 3158 static DECLCALLBACK(int) buslogicR3LoadDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) 3140 3159 { 3141 3160 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC); 3142 3161 3143 buslogicR egisterISARange(pThis, pThis->uISABaseCode);3144 buslogic Kick(pThis);3162 buslogicR3RegisterISARange(pThis, pThis->uISABaseCode); 3163 buslogicR3Kick(pThis); 3145 3164 return VINF_SUCCESS; 3146 3165 } 3147 3166 3148 static DECLCALLBACK(int) buslogicLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass) 3167 /** @callback_method_impl{FNSSMDEVLOADEXEC} */ 3168 static DECLCALLBACK(int) buslogicR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass) 3149 3169 { 3150 3170 PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC); … … 3271 3291 3272 3292 /** 3273 * Gets the pointer to the status LED of a device - called from the SCS idriver.3293 * Gets the pointer to the status LED of a device - called from the SCSI driver. 3274 3294 * 3275 3295 * @returns VBox status code. … … 3279 3299 * @param ppLed Where to store the LED pointer. 3280 3300 */ 3281 static DECLCALLBACK(int) buslogic DeviceQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)3301 static DECLCALLBACK(int) buslogicR3DeviceQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed) 3282 3302 { 3283 3303 PBUSLOGICDEVICE pDevice = PDMILEDPORTS_2_PBUSLOGICDEVICE(pInterface); … … 3294 3314 * @interface_method_impl{PDMIBASE,pfnQueryInterface} 3295 3315 */ 3296 static DECLCALLBACK(void *) buslogic DeviceQueryInterface(PPDMIBASE pInterface, const char *pszIID)3316 static DECLCALLBACK(void *) buslogicR3DeviceQueryInterface(PPDMIBASE pInterface, const char *pszIID) 3297 3317 { 3298 3318 PBUSLOGICDEVICE pDevice = PDMIBASE_2_PBUSLOGICDEVICE(pInterface); … … 3311 3331 * @param ppLed Where to store the LED pointer. 3312 3332 */ 3313 static DECLCALLBACK(int) buslogic StatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)3333 static DECLCALLBACK(int) buslogicR3StatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed) 3314 3334 { 3315 3335 PBUSLOGIC pBusLogic = PDMILEDPORTS_2_PBUSLOGIC(pInterface); … … 3326 3346 * @interface_method_impl{PDMIBASE,pfnQueryInterface} 3327 3347 */ 3328 static DECLCALLBACK(void *) buslogic StatusQueryInterface(PPDMIBASE pInterface, const char *pszIID)3348 static DECLCALLBACK(void *) buslogicR3StatusQueryInterface(PPDMIBASE pInterface, const char *pszIID) 3329 3349 { 3330 3350 PBUSLOGIC pThis = PDMIBASE_2_PBUSLOGIC(pInterface); … … 3341 3361 * @param pszArgs The arguments. 3342 3362 */ 3343 static DECLCALLBACK(void) buslogic Info(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)3363 static DECLCALLBACK(void) buslogicR3Info(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) 3344 3364 { 3345 3365 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC); … … 3363 3383 pHlp->pfnPrintf(pHlp, "Mailbox not initialized\n"); 3364 3384 else 3365 {3366 3385 pHlp->pfnPrintf(pHlp, "%u-bit mailbox with %u entries at %RGp\n", 3367 3386 pThis->fMbxIs24Bit ? 24 : 32, pThis->cMailbox, 3368 3387 pThis->GCPhysAddrMailboxOutgoingBase); 3369 }3370 3388 3371 3389 /* Print register contents. */ … … 3383 3401 * Checks if all asynchronous I/O is finished. 3384 3402 * 3385 * Used by buslogicR eset, buslogicSuspend and buslogicPowerOff.3403 * Used by buslogicR3Reset, buslogicR3Suspend and buslogicR3PowerOff. 3386 3404 * 3387 3405 * @returns true if quiesced, false if busy. … … 3475 3493 * @param pDevIns The device instance data. 3476 3494 */ 3477 static DECLCALLBACK(void) buslogic Suspend(PPDMDEVINS pDevIns)3478 { 3479 Log(("buslogic Suspend\n"));3495 static DECLCALLBACK(void) buslogicR3Suspend(PPDMDEVINS pDevIns) 3496 { 3497 Log(("buslogicR3Suspend\n")); 3480 3498 buslogicR3SuspendOrPowerOff(pDevIns, false /* fPoweroff */); 3481 3499 } … … 3486 3504 * @param pDevIns The device instance data. 3487 3505 */ 3488 static DECLCALLBACK(void) buslogicR esume(PPDMDEVINS pDevIns)3489 { 3490 Log(("buslogicR esume\n"));3506 static DECLCALLBACK(void) buslogicR3Resume(PPDMDEVINS pDevIns) 3507 { 3508 Log(("buslogicR3Resume\n")); 3491 3509 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC); 3492 buslogic Kick(pThis);3510 buslogicR3Kick(pThis); 3493 3511 } 3494 3512 … … 3504 3522 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines. 3505 3523 */ 3506 static DECLCALLBACK(void) buslogic Detach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)3524 static DECLCALLBACK(void) buslogicR3Detach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags) 3507 3525 { 3508 3526 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC); … … 3532 3550 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines. 3533 3551 */ 3534 static DECLCALLBACK(int) buslogic Attach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)3552 static DECLCALLBACK(int) buslogicR3Attach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags) 3535 3553 { 3536 3554 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC); … … 3584 3602 ASMAtomicWriteBool(&pThis->fSignalIdle, false); 3585 3603 3586 buslogic HwReset(pThis, true);3604 buslogicR3HwReset(pThis, true); 3587 3605 return true; 3588 3606 } … … 3591 3609 * @copydoc FNPDMDEVRESET 3592 3610 */ 3593 static DECLCALLBACK(void) buslogicR eset(PPDMDEVINS pDevIns)3611 static DECLCALLBACK(void) buslogicR3Reset(PPDMDEVINS pDevIns) 3594 3612 { 3595 3613 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC); … … 3601 3619 { 3602 3620 ASMAtomicWriteBool(&pThis->fSignalIdle, false); 3603 buslogicHwReset(pThis, true); 3604 } 3605 } 3606 3607 static DECLCALLBACK(void) buslogicRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta) 3608 { 3609 uint32_t i; 3610 PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC); 3611 3612 pBusLogic->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 3613 pBusLogic->pNotifierQueueRC = PDMQueueRCPtr(pBusLogic->pNotifierQueueR3); 3614 3615 for (i = 0; i < BUSLOGIC_MAX_DEVICES; i++) 3616 { 3617 PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i]; 3621 buslogicR3HwReset(pThis, true); 3622 } 3623 } 3624 3625 static DECLCALLBACK(void) buslogicR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta) 3626 { 3627 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC); 3628 3629 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 3630 pThis->pNotifierQueueRC = PDMQueueRCPtr(pThis->pNotifierQueueR3); 3631 3632 for (uint32_t i = 0; i < BUSLOGIC_MAX_DEVICES; i++) 3633 { 3634 PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[i]; 3618 3635 3619 3636 pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns); … … 3627 3644 * @param pDevIns Pointer to the device instance 3628 3645 */ 3629 static DECLCALLBACK(void) buslogic PowerOff(PPDMDEVINS pDevIns)3630 { 3631 Log(("buslogic PowerOff\n"));3646 static DECLCALLBACK(void) buslogicR3PowerOff(PPDMDEVINS pDevIns) 3647 { 3648 Log(("buslogicR3PowerOff\n")); 3632 3649 buslogicR3SuspendOrPowerOff(pDevIns, true /* fPoweroff */); 3633 3650 } … … 3641 3658 * @param pDevIns The device instance data. 3642 3659 */ 3643 static DECLCALLBACK(int) buslogic Destruct(PPDMDEVINS pDevIns)3660 static DECLCALLBACK(int) buslogicR3Destruct(PPDMDEVINS pDevIns) 3644 3661 { 3645 3662 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC); … … 3680 3697 * @interface_method_impl{PDMDEVREG,pfnConstruct} 3681 3698 */ 3682 static DECLCALLBACK(int) buslogic Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)3699 static DECLCALLBACK(int) buslogicR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg) 3683 3700 { 3684 3701 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC); … … 3687 3704 char achISACompat[16]; 3688 3705 PDMDEV_CHECK_VERSIONS_RETURN(pDevIns); 3706 3707 /* 3708 * Init instance data (do early because of constructor). 3709 */ 3710 pThis->hTaskCache = NIL_RTMEMCACHE; 3711 pThis->pDevInsR3 = pDevIns; 3712 pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns); 3713 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 3714 pThis->IBase.pfnQueryInterface = buslogicR3StatusQueryInterface; 3715 pThis->ILeds.pfnQueryStatusLed = buslogicR3StatusQueryStatusLed; 3716 3717 PCIDevSetVendorId (&pThis->dev, 0x104b); /* BusLogic */ 3718 PCIDevSetDeviceId (&pThis->dev, 0x1040); /* BT-958 */ 3719 PCIDevSetCommand (&pThis->dev, 0x0003); 3720 PCIDevSetRevisionId (&pThis->dev, 0x01); 3721 PCIDevSetClassProg (&pThis->dev, 0x00); /* SCSI */ 3722 PCIDevSetClassSub (&pThis->dev, 0x00); /* SCSI */ 3723 PCIDevSetClassBase (&pThis->dev, 0x01); /* Mass storage */ 3724 PCIDevSetBaseAddress (&pThis->dev, 0, true /*IO*/, false /*Pref*/, false /*64-bit*/, 0x00000000); 3725 PCIDevSetBaseAddress (&pThis->dev, 1, false /*IO*/, false /*Pref*/, false /*64-bit*/, 0x00000000); 3726 PCIDevSetSubSystemVendorId(&pThis->dev, 0x104b); 3727 PCIDevSetSubSystemId (&pThis->dev, 0x1040); 3728 PCIDevSetInterruptLine (&pThis->dev, 0x00); 3729 PCIDevSetInterruptPin (&pThis->dev, 0x01); 3689 3730 3690 3731 /* … … 3732 3773 N_("BusLogic configuration error: invalid ISACompat setting")); 3733 3774 3734 pThis->pDevInsR3 = pDevIns;3735 pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);3736 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);3737 pThis->IBase.pfnQueryInterface = buslogicStatusQueryInterface;3738 pThis->ILeds.pfnQueryStatusLed = buslogicStatusQueryStatusLed;3739 3740 PCIDevSetVendorId (&pThis->dev, 0x104b); /* BusLogic */3741 PCIDevSetDeviceId (&pThis->dev, 0x1040); /* BT-958 */3742 PCIDevSetCommand (&pThis->dev, 0x0003);3743 PCIDevSetRevisionId (&pThis->dev, 0x01);3744 PCIDevSetClassProg (&pThis->dev, 0x00); /* SCSI */3745 PCIDevSetClassSub (&pThis->dev, 0x00); /* SCSI */3746 PCIDevSetClassBase (&pThis->dev, 0x01); /* Mass storage */3747 PCIDevSetBaseAddress (&pThis->dev, 0, true /*IO*/, false /*Pref*/, false /*64-bit*/, 0x00000000);3748 PCIDevSetBaseAddress (&pThis->dev, 1, false /*IO*/, false /*Pref*/, false /*64-bit*/, 0x00000000);3749 PCIDevSetSubSystemVendorId(&pThis->dev, 0x104b);3750 PCIDevSetSubSystemId (&pThis->dev, 0x1040);3751 PCIDevSetInterruptLine (&pThis->dev, 0x00);3752 PCIDevSetInterruptPin (&pThis->dev, 0x01);3753 3754 3775 /* 3755 3776 * Register the PCI device and its I/O regions. 3756 3777 */ 3757 rc = PDMDevHlpPCIRegister 3778 rc = PDMDevHlpPCIRegister(pDevIns, &pThis->dev); 3758 3779 if (RT_FAILURE(rc)) 3759 3780 return rc; 3760 3781 3761 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 32, PCI_ADDRESS_SPACE_IO, buslogic MMIOMap);3782 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 32, PCI_ADDRESS_SPACE_IO, buslogicR3MmioMap); 3762 3783 if (RT_FAILURE(rc)) 3763 3784 return rc; 3764 3785 3765 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 32, PCI_ADDRESS_SPACE_MEM, buslogic MMIOMap);3786 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 32, PCI_ADDRESS_SPACE_MEM, buslogicR3MmioMap); 3766 3787 if (RT_FAILURE(rc)) 3767 3788 return rc; … … 3771 3792 /* Register I/O port space for BIOS access. */ 3772 3793 rc = PDMDevHlpIOPortRegister(pDevIns, BUSLOGIC_BIOS_IO_PORT, 4, NULL, 3773 buslogic BIOSIOPortWrite, buslogicBIOSIOPortRead,3774 buslogic BIOSIOPortWriteStr, buslogicBIOSIOPortReadStr,3794 buslogicR3BiosIoPortWrite, buslogicR3BiosIoPortRead, 3795 buslogicR3BiosIoPortWriteStr, buslogicR3BiosIoPortReadStr, 3775 3796 "BusLogic BIOS"); 3776 3797 if (RT_FAILURE(rc)) … … 3779 3800 3780 3801 /* Set up the compatibility I/O range. */ 3781 rc = buslogicR egisterISARange(pThis, pThis->uDefaultISABaseCode);3802 rc = buslogicR3RegisterISARange(pThis, pThis->uDefaultISABaseCode); 3782 3803 if (RT_FAILURE(rc)) 3783 3804 return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register ISA I/O handlers")); … … 3792 3813 /* Initialize task queue. */ 3793 3814 rc = PDMDevHlpQueueCreate(pDevIns, sizeof(PDMQUEUEITEMCORE), 5, 0, 3794 buslogic NotifyQueueConsumer, true, "BusLogicTask", &pThis->pNotifierQueueR3);3815 buslogicR3NotifyQueueConsumer, true, "BusLogicTask", &pThis->pNotifierQueueR3); 3795 3816 if (RT_FAILURE(rc)) 3796 3817 return rc; … … 3800 3821 rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSectIntr, RT_SRC_POS, "BusLogic-Intr#%u", pDevIns->iInstance); 3801 3822 if (RT_FAILURE(rc)) 3802 return PDMDEV_SET_ERROR(pDevIns, rc, 3803 N_("BusLogic: cannot create critical section")); 3823 return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic: cannot create critical section")); 3804 3824 3805 3825 /* Initialize per device state. */ … … 3809 3829 PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[i]; 3810 3830 3811 RTStrPrintf(szName, sizeof(szName), "Device% d", i);3831 RTStrPrintf(szName, sizeof(szName), "Device%u", i); 3812 3832 3813 3833 /* Initialize static parts of the device. */ … … 3817 3837 pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns); 3818 3838 pDevice->Led.u32Magic = PDMLED_MAGIC; 3819 pDevice->IBase.pfnQueryInterface = buslogic DeviceQueryInterface;3820 pDevice->ISCSIPort.pfnSCSIRequestCompleted = buslogic DeviceSCSIRequestCompleted;3821 pDevice->ISCSIPort.pfnQueryDeviceLocation = buslogic QueryDeviceLocation;3822 pDevice->ILed.pfnQueryStatusLed = buslogic DeviceQueryStatusLed;3839 pDevice->IBase.pfnQueryInterface = buslogicR3DeviceQueryInterface; 3840 pDevice->ISCSIPort.pfnSCSIRequestCompleted = buslogicR3DeviceSCSIRequestCompleted; 3841 pDevice->ISCSIPort.pfnQueryDeviceLocation = buslogicR3QueryDeviceLocation; 3842 pDevice->ILed.pfnQueryStatusLed = buslogicR3DeviceQueryStatusLed; 3823 3843 3824 3844 /* Attach SCSI driver. */ … … 3860 3880 3861 3881 rc = PDMDevHlpSSMRegisterEx(pDevIns, BUSLOGIC_SAVED_STATE_MINOR_VERSION, sizeof(*pThis), NULL, 3862 NULL, buslogic LiveExec, NULL,3863 NULL, buslogic SaveExec, NULL,3864 NULL, buslogic LoadExec, buslogicLoadDone);3882 NULL, buslogicR3LiveExec, NULL, 3883 NULL, buslogicR3SaveExec, NULL, 3884 NULL, buslogicR3LoadExec, buslogicR3LoadDone); 3865 3885 if (RT_FAILURE(rc)) 3866 3886 return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register save state handlers")); … … 3871 3891 char szTmp[128]; 3872 3892 RTStrPrintf(szTmp, sizeof(szTmp), "%s%d", pDevIns->pReg->szName, pDevIns->iInstance); 3873 PDMDevHlpDBGFInfoRegister(pDevIns, szTmp, "BusLogic HBA info", buslogic Info);3874 3875 rc = buslogic HwReset(pThis, true);3893 PDMDevHlpDBGFInfoRegister(pDevIns, szTmp, "BusLogic HBA info", buslogicR3Info); 3894 3895 rc = buslogicR3HwReset(pThis, true); 3876 3896 AssertMsgRC(rc, ("hardware reset of BusLogic host adapter failed rc=%Rrc\n", rc)); 3877 3897 … … 3905 3925 sizeof(BUSLOGIC), 3906 3926 /* pfnConstruct */ 3907 buslogic Construct,3927 buslogicR3Construct, 3908 3928 /* pfnDestruct */ 3909 buslogic Destruct,3929 buslogicR3Destruct, 3910 3930 /* pfnRelocate */ 3911 buslogicR elocate,3931 buslogicR3Relocate, 3912 3932 /* pfnIOCtl */ 3913 3933 NULL, … … 3915 3935 NULL, 3916 3936 /* pfnReset */ 3917 buslogicR eset,3937 buslogicR3Reset, 3918 3938 /* pfnSuspend */ 3919 buslogic Suspend,3939 buslogicR3Suspend, 3920 3940 /* pfnResume */ 3921 buslogicR esume,3941 buslogicR3Resume, 3922 3942 /* pfnAttach */ 3923 buslogic Attach,3943 buslogicR3Attach, 3924 3944 /* pfnDetach */ 3925 buslogic Detach,3945 buslogicR3Detach, 3926 3946 /* pfnQueryInterface. */ 3927 3947 NULL, … … 3929 3949 NULL, 3930 3950 /* pfnPowerOff */ 3931 buslogic PowerOff,3951 buslogicR3PowerOff, 3932 3952 /* pfnSoftReset */ 3933 3953 NULL,
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