Changeset 44541 in vbox
- Timestamp:
- Feb 5, 2013 1:06:13 PM (12 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Network/DevE1000.cpp
r44540 r44541 187 187 //#undef DEBUG 188 188 189 #define INSTANCE(pState) pState->szInstance190 189 #define STATE_TO_DEVINS(pState) (((E1KSTATE *)pState)->CTX_SUFF(pDevIns)) 191 190 #define E1K_RELOCATE(p, o) *(RTHCUINTPTR *)&p += o … … 1003 1002 struct E1kState_st 1004 1003 { 1005 char sz Instance[8]; /**< Instance name, e.g. E1000#1. */1004 char szPrf[8]; /**< Log prefix, e.g. E1000#1. */ 1006 1005 PDMIBASE IBase; 1007 1006 PDMINETWORKDOWN INetworkDown; … … 1540 1539 1541 1540 E1kLog2(("%s Arming %s timer to fire in %d usec...\n", 1542 INSTANCE(pState), e1kGetTimerName(pState, pTimer), uExpireIn));1541 pState->szPrf, e1kGetTimerName(pState, pTimer), uExpireIn)); 1543 1542 TMTimerSetMicro(pTimer, uExpireIn); 1544 1543 } … … 1553 1552 { 1554 1553 E1kLog2(("%s Stopping %s timer...\n", 1555 INSTANCE(pState), e1kGetTimerName(pState, pTimer)));1554 pState->szPrf, e1kGetTimerName(pState, pTimer))); 1556 1555 int rc = TMTimerStop(pTimer); 1557 1556 if (RT_FAILURE(rc)) 1558 1557 { 1559 1558 E1kLog2(("%s e1kCancelTimer: TMTimerStop() failed with %Rrc\n", 1560 INSTANCE(pState), rc));1559 pState->szPrf, rc)); 1561 1560 } 1562 1561 } … … 1589 1588 { 1590 1589 STAM_COUNTER_INC(&pState->StatRxOverflowWakeup); 1591 E1kLog(("%s Waking up Out-of-RX-space semaphore\n", INSTANCE(pState)));1590 E1kLog(("%s Waking up Out-of-RX-space semaphore\n", pState->szPrf)); 1592 1591 RTSemEventSignal(pState->hEventMoreRxDescAvail); 1593 1592 } … … 1601 1600 static void e1kHardReset(E1KSTATE *pState) 1602 1601 { 1603 E1kLog(("%s Hard reset triggered\n", INSTANCE(pState)));1602 E1kLog(("%s Hard reset triggered\n", pState->szPrf)); 1604 1603 memset(pState->auRegs, 0, sizeof(pState->auRegs)); 1605 1604 memset(pState->aRecAddr.au32, 0, sizeof(pState->aRecAddr.au32)); … … 1688 1687 { 1689 1688 E1kLog(("%s --- %s packet #%d: ---\n", 1690 INSTANCE(pState), cszText, ++pState->u32PktNo));1689 pState->szPrf, cszText, ++pState->u32PktNo)); 1691 1690 E1kLog3(("%.*Rhxd\n", cb, cpPacket)); 1692 1691 e1kCsLeave(pState); … … 1725 1724 static void e1kPrintRDesc(E1KSTATE* pState, E1KRXDESC* pDesc) 1726 1725 { 1727 E1kLog2(("%s <-- Receive Descriptor (%d bytes):\n", INSTANCE(pState), pDesc->u16Length));1726 E1kLog2(("%s <-- Receive Descriptor (%d bytes):\n", pState->szPrf, pDesc->u16Length)); 1728 1727 E1kLog2((" Address=%16LX Length=%04X Csum=%04X\n", 1729 1728 pDesc->u64BufAddr, pDesc->u16Length, pDesc->u16Checksum)); … … 1764 1763 case E1K_DTYP_CONTEXT: 1765 1764 E1kLogX(uLevel, ("%s %s Context Transmit Descriptor %s\n", 1766 INSTANCE(pState), cszDir, cszDir));1765 pState->szPrf, cszDir, cszDir)); 1767 1766 E1kLogX(uLevel, (" IPCSS=%02X IPCSO=%02X IPCSE=%04X TUCSS=%02X TUCSO=%02X TUCSE=%04X\n", 1768 1767 pDesc->context.ip.u8CSS, pDesc->context.ip.u8CSO, pDesc->context.ip.u16CSE, … … 1781 1780 case E1K_DTYP_DATA: 1782 1781 E1kLogX(uLevel, ("%s %s Data Transmit Descriptor (%d bytes) %s\n", 1783 INSTANCE(pState), cszDir, pDesc->data.cmd.u20DTALEN, cszDir));1782 pState->szPrf, cszDir, pDesc->data.cmd.u20DTALEN, cszDir)); 1784 1783 E1kLogX(uLevel, (" Address=%16LX DTALEN=%05X\n", 1785 1784 pDesc->data.u64BufAddr, … … 1804 1803 case E1K_DTYP_LEGACY: 1805 1804 E1kLogX(uLevel, ("%s %s Legacy Transmit Descriptor (%d bytes) %s\n", 1806 INSTANCE(pState), cszDir, pDesc->legacy.cmd.u16Length, cszDir));1805 pState->szPrf, cszDir, pDesc->legacy.cmd.u16Length, cszDir)); 1807 1806 E1kLogX(uLevel, (" Address=%16LX DTALEN=%05X\n", 1808 1807 pDesc->data.u64BufAddr, … … 1827 1826 default: 1828 1827 E1kLog(("%s %s Invalid Transmit Descriptor %s\n", 1829 INSTANCE(pState), cszDir, cszDir));1828 pState->szPrf, cszDir, cszDir)); 1830 1829 break; 1831 1830 } … … 1853 1852 pState->iStatIntLostOne = 1; 1854 1853 E1kLog2(("%s e1kRaiseInterrupt: Delayed. ICR=%08x\n", 1855 INSTANCE(pState), ICR));1854 pState->szPrf, ICR)); 1856 1855 #define E1K_LOST_IRQ_THRSLD 20 1857 1856 //#define E1K_LOST_IRQ_THRSLD 200000000 … … 1859 1858 { 1860 1859 E1kLog2(("%s WARNING! Disabling delayed interrupt logic: delayed=%d, delivered=%d\n", 1861 INSTANCE(pState), pState->uStatIntDly, pState->uStatIntLate));1860 pState->szPrf, pState->uStatIntDly, pState->uStatIntLate)); 1862 1861 pState->fIntMaskUsed = false; 1863 1862 pState->uStatDisDly++; … … 1870 1869 E1K_INC_ISTAT_CNT(pState->uStatIntSkip); 1871 1870 E1kLog2(("%s e1kRaiseInterrupt: Already raised, skipped. ICR&IMS=%08x\n", 1872 INSTANCE(pState), ICR & IMS));1871 pState->szPrf, ICR & IMS)); 1873 1872 } 1874 1873 else … … 1878 1877 /* interrupts/sec = 1 / (256 * 10E-9 * ITR) */ 1879 1878 E1kLog2(("%s e1kRaiseInterrupt: tstamp - pState->u64AckedAt = %d, ITR * 256 = %d\n", 1880 INSTANCE(pState), (uint32_t)(tstamp - pState->u64AckedAt), ITR * 256));1879 pState->szPrf, (uint32_t)(tstamp - pState->u64AckedAt), ITR * 256)); 1881 1880 //if (!!ITR && pState->fIntMaskUsed && tstamp - pState->u64AckedAt < ITR * 256) 1882 1881 if (!!ITR && tstamp - pState->u64AckedAt < ITR * 256 && !(ICR & ICR_RXT0)) … … 1884 1883 E1K_INC_ISTAT_CNT(pState->uStatIntEarly); 1885 1884 E1kLog2(("%s e1kRaiseInterrupt: Too early to raise again: %d ns < %d ns.\n", 1886 INSTANCE(pState), (uint32_t)(tstamp - pState->u64AckedAt), ITR * 256));1885 pState->szPrf, (uint32_t)(tstamp - pState->u64AckedAt), ITR * 256)); 1887 1886 } 1888 1887 else … … 1902 1901 PDMDevHlpPCISetIrq(pState->CTX_SUFF(pDevIns), 0, 1); 1903 1902 E1kLog(("%s e1kRaiseInterrupt: Raised. ICR&IMS=%08x\n", 1904 INSTANCE(pState), ICR & IMS));1903 pState->szPrf, ICR & IMS)); 1905 1904 } 1906 1905 } … … 1910 1909 E1K_INC_ISTAT_CNT(pState->uStatIntMasked); 1911 1910 E1kLog2(("%s e1kRaiseInterrupt: Not raising, ICR=%08x, IMS=%08x\n", 1912 INSTANCE(pState), ICR, IMS));1911 pState->szPrf, ICR, IMS)); 1913 1912 } 1914 1913 e1kCsLeave(pState); … … 1961 1960 E1kLogRel(("E1000: low on RX descriptors, RDH=%x RDT=%x len=%x threshold=%x\n", RDH, RDT, uRQueueLen, uMinRQThreshold)); 1962 1961 E1kLog2(("%s Low on RX descriptors, RDH=%x RDT=%x len=%x threshold=%x, raise an interrupt\n", 1963 INSTANCE(pState), RDH, RDT, uRQueueLen, uMinRQThreshold));1962 pState->szPrf, RDH, RDT, uRQueueLen, uMinRQThreshold)); 1964 1963 E1K_INC_ISTAT_CNT(pState->uStatIntRXDMT0); 1965 1964 e1kRaiseInterrupt(pState, VERR_SEM_BUSY, ICR_RXDMT0); 1966 1965 } 1967 1966 E1kLog2(("%s e1kAdvanceRDH: at exit RDH=%x RDT=%x len=%x\n", 1968 INSTANCE(pState), RDH, RDT, uRQueueLen));1967 pState->szPrf, RDH, RDT, uRQueueLen)); 1969 1968 //e1kCsLeave(pState); 1970 1969 } … … 2025 2024 E1kLog3(("%s e1kRxDPrefetch: nDescsAvailable=%u nDescsToFetch=%u " 2026 2025 "nDescsTotal=%u nFirstNotLoaded=0x%x nDescsInSingleRead=%u\n", 2027 INSTANCE(pState), nDescsAvailable, nDescsToFetch, nDescsTotal,2026 pState->szPrf, nDescsAvailable, nDescsToFetch, nDescsTotal, 2028 2027 nFirstNotLoaded, nDescsInSingleRead)); 2029 2028 if (nDescsToFetch == 0) … … 2038 2037 // { 2039 2038 // pState->aRxDescAddr[i] = addrBase + (nFirstNotLoaded + i - pState->nRxDFetched) * sizeof(E1KRXDESC); 2040 // E1kLog3(("%s aRxDescAddr[%d] = %p\n", INSTANCE(pState), i, pState->aRxDescAddr[i]));2039 // E1kLog3(("%s aRxDescAddr[%d] = %p\n", pState->szPrf, i, pState->aRxDescAddr[i])); 2041 2040 // } 2042 2041 E1kLog3(("%s Fetched %u RX descriptors at %08x%08x(0x%x), RDLEN=%08x, RDH=%08x, RDT=%08x\n", 2043 INSTANCE(pState), nDescsInSingleRead,2042 pState->szPrf, nDescsInSingleRead, 2044 2043 RDBAH, RDBAL + RDH * sizeof(E1KRXDESC), 2045 2044 nFirstNotLoaded, RDLEN, RDH, RDT)); … … 2054 2053 // { 2055 2054 // pState->aRxDescAddr[i] = addrBase + j * sizeof(E1KRXDESC); 2056 // E1kLog3(("%s aRxDescAddr[%d] = %p\n", INSTANCE(pState), i, pState->aRxDescAddr[i]));2055 // E1kLog3(("%s aRxDescAddr[%d] = %p\n", pState->szPrf, i, pState->aRxDescAddr[i])); 2057 2056 // } 2058 2057 E1kLog3(("%s Fetched %u RX descriptors at %08x%08x\n", 2059 INSTANCE(pState), nDescsToFetch - nDescsInSingleRead,2058 pState->szPrf, nDescsToFetch - nDescsInSingleRead, 2060 2059 RDBAH, RDBAL)); 2061 2060 } … … 2125 2124 STAM_PROFILE_ADV_START(&pState->StatReceiveStore, a); 2126 2125 E1kLog2(("%s e1kStoreRxFragment: store fragment of %04X at %016LX, EOP=%d\n", 2127 INSTANCE(pState), cb, pDesc->u64BufAddr, pDesc->status.fEOP));2126 pState->szPrf, cb, pDesc->u64BufAddr, pDesc->status.fEOP)); 2128 2127 PDMDevHlpPhysWrite(pState->CTX_SUFF(pDevIns), pDesc->u64BufAddr, pvBuf, cb); 2129 2128 pDesc->u16Length = (uint16_t)cb; Assert(pDesc->u16Length == cb); … … 2147 2146 { 2148 2147 STAM_PROFILE_ADV_START(&pState->StatReceiveStore, a); 2149 E1kLog2(("%s e1kStoreRxFragment: store fragment of %04X at %016LX, EOP=%d\n", pState->sz Instance, cb, pDesc->u64BufAddr, pDesc->status.fEOP));2148 E1kLog2(("%s e1kStoreRxFragment: store fragment of %04X at %016LX, EOP=%d\n", pState->szPrf, cb, pDesc->u64BufAddr, pDesc->status.fEOP)); 2150 2149 PDMDevHlpPhysWrite(pState->CTX_SUFF(pDevIns), pDesc->u64BufAddr, pvBuf, cb); 2151 2150 pDesc->u16Length = (uint16_t)cb; Assert(pDesc->u16Length == cb); … … 2156 2155 /* Advance head */ 2157 2156 e1kAdvanceRDH(pState); 2158 //E1kLog2(("%s e1kStoreRxFragment: EOP=%d RDTR=%08X RADV=%08X\n", INSTANCE(pState), pDesc->fEOP, RDTR, RADV));2157 //E1kLog2(("%s e1kStoreRxFragment: EOP=%d RDTR=%08X RADV=%08X\n", pState->szPrf, pDesc->fEOP, RDTR, RADV)); 2159 2158 if (pDesc->status.fEOP) 2160 2159 { … … 2229 2228 uint16_t uEtherType = ntohs(*(uint16_t*)(pFrame + 12)); 2230 2229 2231 E1kLog2(("%s e1kRxChecksumOffload: EtherType=%x\n", INSTANCE(pState), uEtherType));2230 E1kLog2(("%s e1kRxChecksumOffload: EtherType=%x\n", pState->szPrf, uEtherType)); 2232 2231 2233 2232 switch (uEtherType) … … 2285 2284 Assert(cb > 16); 2286 2285 size_t cbMax = ((RCTL & RCTL_LPE) ? E1K_MAX_RX_PKT_SIZE - 4 : 1518) - (status.fVP ? 0 : 4); 2287 E1kLog3(("%s Max RX packet size is %u\n", INSTANCE(pState), cbMax));2286 E1kLog3(("%s Max RX packet size is %u\n", pState->szPrf, cbMax)); 2288 2287 if (status.fVP) 2289 2288 { … … 2297 2296 cb -= 4; 2298 2297 E1kLog3(("%s Stripped tag for VLAN %u (cb=%u)\n", 2299 INSTANCE(pState), status.u16Special, cb));2298 pState->szPrf, status.u16Special, cb)); 2300 2299 } 2301 2300 else … … 2322 2321 cb += sizeof(uint32_t); 2323 2322 STAM_PROFILE_ADV_STOP(&pState->StatReceiveCRC, a); 2324 E1kLog3(("%s Added FCS (cb=%u)\n", INSTANCE(pState), cb));2323 E1kLog3(("%s Added FCS (cb=%u)\n", pState->szPrf, cb)); 2325 2324 } 2326 2325 /* Compute checksum of complete packet */ … … 2361 2360 E1kLog(("%s Out of receive buffers, dropping the packet " 2362 2361 "(cb=%u, in_cache=%u, RDH=%x RDT=%x)\n", 2363 INSTANCE(pState), cb, e1kRxDInCache(pState), RDH, RDT));2362 pState->szPrf, cb, e1kRxDInCache(pState), RDH, RDT)); 2364 2363 break; 2365 2364 } … … 2368 2367 { 2369 2368 E1kLog(("%s Out of receive buffers, dropping the packet\n", 2370 INSTANCE(pState)));2369 pState->szPrf)); 2371 2370 } 2372 2371 /* Store the packet to receive buffers */ … … 2437 2436 2438 2437 if (cb > 0) 2439 E1kLog(("%s Out of receive buffers, dropping %u bytes", INSTANCE(pState), cb));2438 E1kLog(("%s Out of receive buffers, dropping %u bytes", pState->szPrf, cb)); 2440 2439 2441 2440 pState->led.Actual.s.fReading = 0; … … 2480 2479 { 2481 2480 E1kLog(("%s Will bring up the link in %d seconds...\n", 2482 INSTANCE(pState), pState->cMsLinkUpDelay / 1000));2481 pState->szPrf, pState->cMsLinkUpDelay / 1000)); 2483 2482 e1kArmTimer(pState, pState->CTX_SUFF(pLUTimer), pState->cMsLinkUpDelay * 1000); 2484 2483 } … … 2500 2499 { 2501 2500 E1kLog(("%s e1kRegReadCTRL: mdio dir=%s mdc dir=%s mdc=%d\n", 2502 INSTANCE(pState), (CTRL & CTRL_MDIO_DIR)?"OUT":"IN ",2501 pState->szPrf, (CTRL & CTRL_MDIO_DIR)?"OUT":"IN ", 2503 2502 (CTRL & CTRL_MDC_DIR)?"OUT":"IN ", !!(CTRL & CTRL_MDC))); 2504 2503 if ((CTRL & CTRL_MDIO_DIR) == 0 && (CTRL & CTRL_MDC)) … … 2510 2509 *pu32Value = CTRL & ~CTRL_MDIO; 2511 2510 E1kLog(("%s e1kRegReadCTRL: Phy::readMDIO(%d)\n", 2512 INSTANCE(pState), !!(*pu32Value & CTRL_MDIO)));2511 pState->szPrf, !!(*pu32Value & CTRL_MDIO))); 2513 2512 } 2514 2513 else … … 2562 2561 if (value & CTRL_VME) 2563 2562 { 2564 E1kLog(("%s VLAN Mode Enabled\n", INSTANCE(pState)));2563 E1kLog(("%s VLAN Mode Enabled\n", pState->szPrf)); 2565 2564 } 2566 2565 E1kLog(("%s e1kRegWriteCTRL: mdio dir=%s mdc dir=%s mdc=%s mdio=%d\n", 2567 INSTANCE(pState), (value & CTRL_MDIO_DIR)?"OUT":"IN ",2566 pState->szPrf, (value & CTRL_MDIO_DIR)?"OUT":"IN ", 2568 2567 (value & CTRL_MDC_DIR)?"OUT":"IN ", (value & CTRL_MDC)?"HIGH":"LOW ", !!(value & CTRL_MDIO))); 2569 2568 if (value & CTRL_MDC) … … 2571 2570 if (value & CTRL_MDIO_DIR) 2572 2571 { 2573 E1kLog(("%s e1kRegWriteCTRL: Phy::writeMDIO(%d)\n", INSTANCE(pState), !!(value & CTRL_MDIO)));2572 E1kLog(("%s e1kRegWriteCTRL: Phy::writeMDIO(%d)\n", pState->szPrf, !!(value & CTRL_MDIO))); 2574 2573 /* MDIO direction pin is set to output and MDC is high, write MDIO pin value to PHY */ 2575 2574 Phy::writeMDIO(&pState->phy, !!(value & CTRL_MDIO)); … … 2582 2581 value &= ~CTRL_MDIO; 2583 2582 E1kLog(("%s e1kRegWriteCTRL: Phy::readMDIO(%d)\n", 2584 INSTANCE(pState), !!(value & CTRL_MDIO)));2583 pState->szPrf, !!(value & CTRL_MDIO))); 2585 2584 } 2586 2585 } … … 2717 2716 { 2718 2717 E1kLog(("%s ERROR! Interrupt at the end of an MDI cycle is not supported yet.\n", 2719 INSTANCE(pState)));2718 pState->szPrf)); 2720 2719 } 2721 2720 else if (value & MDIC_READY) 2722 2721 { 2723 2722 E1kLog(("%s ERROR! Ready bit is not reset by software during write operation.\n", 2724 INSTANCE(pState)));2723 pState->szPrf)); 2725 2724 } 2726 2725 else if (GET_BITS_V(value, MDIC, PHY) != 1) 2727 2726 { 2728 2727 E1kLog(("%s ERROR! Access to invalid PHY detected, phy=%d.\n", 2729 INSTANCE(pState), GET_BITS_V(value, MDIC, PHY)));2728 pState->szPrf, GET_BITS_V(value, MDIC, PHY))); 2730 2729 } 2731 2730 else … … 2802 2801 */ 2803 2802 E1kLogRel(("E1000: irq lowered, icr=0x%x\n", ICR)); 2804 E1kLog(("%s e1kRegReadICR: Lowered IRQ (%08x)\n", INSTANCE(pState), ICR));2803 E1kLog(("%s e1kRegReadICR: Lowered IRQ (%08x)\n", pState->szPrf, ICR)); 2805 2804 /* Clear all pending interrupts */ 2806 2805 ICR = 0; … … 2819 2818 * just before re-enabling interrupts 2820 2819 */ 2821 E1kLog(("%s e1kRegReadICR: Suppressing auto-clear due to disabled interrupts (%08x)\n", INSTANCE(pState), ICR));2820 E1kLog(("%s e1kRegReadICR: Suppressing auto-clear due to disabled interrupts (%08x)\n", pState->szPrf, ICR)); 2822 2821 } 2823 2822 } … … 2863 2862 IMS |= value; 2864 2863 E1kLogRel(("E1000: irq enabled, RDH=%x RDT=%x TDH=%x TDT=%x\n", RDH, RDT, TDH, TDT)); 2865 E1kLog(("%s e1kRegWriteIMS: IRQ enabled\n", INSTANCE(pState)));2864 E1kLog(("%s e1kRegWriteIMS: IRQ enabled\n", pState->szPrf)); 2866 2865 /* Mask changes, we need to raise pending interrupts. */ 2867 2866 if ((ICR & IMS) && !pState->fLocked) 2868 2867 { 2869 2868 E1kLog2(("%s e1kRegWriteIMS: IRQ pending (%08x), arming late int timer...\n", 2870 INSTANCE(pState), ICR));2869 pState->szPrf, ICR)); 2871 2870 /* Raising an interrupt immediately causes win7 to hang upon NIC reconfiguration, see @bugref{5023}. */ 2872 2871 TMTimerSet(pState->CTX_SUFF(pIntTimer), TMTimerFromNano(pState->CTX_SUFF(pIntTimer), ITR * 256) + … … 2907 2906 PDMDevHlpPCISetIrq(pState->CTX_SUFF(pDevIns), 0, 0); 2908 2907 pState->fIntRaised = false; 2909 E1kLog(("%s e1kRegWriteIMC: Lowered IRQ: ICR=%08x\n", INSTANCE(pState), ICR));2908 E1kLog(("%s e1kRegWriteIMC: Lowered IRQ: ICR=%08x\n", pState->szPrf, ICR)); 2910 2909 } 2911 2910 IMS &= ~value; 2912 E1kLog(("%s e1kRegWriteIMC: IRQ disabled\n", INSTANCE(pState)));2911 E1kLog(("%s e1kRegWriteIMC: IRQ disabled\n", pState->szPrf)); 2913 2912 e1kCsLeave(pState); 2914 2913 … … 2947 2946 if (cbRxBuf != pState->u16RxBSize) 2948 2947 E1kLog2(("%s e1kRegWriteRCTL: Setting receive buffer size to %d (old %d)\n", 2949 INSTANCE(pState), cbRxBuf, pState->u16RxBSize));2948 pState->szPrf, cbRxBuf, pState->u16RxBSize)); 2950 2949 pState->u16RxBSize = cbRxBuf; 2951 2950 … … 3000 2999 if (RT_LIKELY(rc == VINF_SUCCESS)) 3001 3000 { 3002 E1kLog(("%s e1kRegWriteRDT\n", INSTANCE(pState)));3001 E1kLog(("%s e1kRegWriteRDT\n", pState->szPrf)); 3003 3002 rc = e1kRegWriteDefault(pState, offset, index, value); 3004 3003 #ifdef E1K_WITH_RXD_CACHE … … 3244 3243 return; 3245 3244 3246 E1kLog(("%s e1kLinkUpTimer: Link is up\n", INSTANCE(pState)));3245 E1kLog(("%s e1kLinkUpTimer: Link is up\n", pState->szPrf)); 3247 3246 STATUS |= STATUS_LU; 3248 3247 Phy::setLinkStatus(&pState->phy, true); … … 3550 3549 } 3551 3550 E1kLog3(("%s Allocated buffer for TX packet: cb=%u %s%s\n", 3552 INSTANCE(pState), pState->cbTxAlloc,3551 pState->szPrf, pState->cbTxAlloc, 3553 3552 pState->fVTag ? "VLAN " : "", 3554 3553 pState->fGSO ? "GSO " : "")); … … 3629 3628 E1kLog3(("%s e1kTxDLoadMore: nDescsAvailable=%u nDescsToFetch=%u " 3630 3629 "nDescsTotal=%u nFirstNotLoaded=0x%x nDescsInSingleRead=%u\n", 3631 INSTANCE(pState), nDescsAvailable, nDescsToFetch, nDescsTotal,3630 pState->szPrf, nDescsAvailable, nDescsToFetch, nDescsTotal, 3632 3631 nFirstNotLoaded, nDescsInSingleRead)); 3633 3632 if (nDescsToFetch == 0) … … 3638 3637 pFirstEmptyDesc, nDescsInSingleRead * sizeof(E1KTXDESC)); 3639 3638 E1kLog3(("%s Fetched %u TX descriptors at %08x%08x(0x%x), TDLEN=%08x, TDH=%08x, TDT=%08x\n", 3640 INSTANCE(pState), nDescsInSingleRead,3639 pState->szPrf, nDescsInSingleRead, 3641 3640 TDBAH, TDBAL + TDH * sizeof(E1KTXDESC), 3642 3641 nFirstNotLoaded, TDLEN, TDH, TDT)); … … 3648 3647 (nDescsToFetch - nDescsInSingleRead) * sizeof(E1KTXDESC)); 3649 3648 E1kLog3(("%s Fetched %u TX descriptors at %08x%08x\n", 3650 INSTANCE(pState), nDescsToFetch - nDescsInSingleRead,3649 pState->szPrf, nDescsToFetch - nDescsInSingleRead, 3651 3650 TDBAH, TDBAL)); 3652 3651 } … … 3732 3731 { 3733 3732 E1kLog3(("%s Inserting VLAN tag %08x\n", 3734 INSTANCE(pState), RT_BE2H_U16(VET) | (RT_BE2H_U16(pState->u16VTagTCI) << 16)));3733 pState->szPrf, RT_BE2H_U16(VET) | (RT_BE2H_U16(pState->u16VTagTCI) << 16))); 3735 3734 memmove((uint8_t*)pSg->aSegs[0].pvSeg + 16, (uint8_t*)pSg->aSegs[0].pvSeg + 12, cbFrame - 12); 3736 3735 *((uint32_t*)pSg->aSegs[0].pvSeg + 3) = RT_BE2H_U16(VET) | (RT_BE2H_U16(pState->u16VTagTCI) << 16); … … 3743 3742 "%.*Rhxd\n" 3744 3743 "%s < < < < < < < < < < < < < End of dump > > > > > > > > > > > >\n", 3745 INSTANCE(pState), cbFrame, pSg->aSegs[0].pvSeg, INSTANCE(pState)));*/3744 pState->szPrf, cbFrame, pSg->aSegs[0].pvSeg, pState->szPrf));*/ 3746 3745 3747 3746 /* Update the stats */ … … 3837 3836 { 3838 3837 E1kLog2(("%s css(%X) is greater than packet length-1(%X), checksum is not inserted\n", 3839 INSTANCE(pState), cso, u16PktLen));3838 pState->szPrf, cso, u16PktLen)); 3840 3839 return; 3841 3840 } … … 3844 3843 { 3845 3844 E1kLog2(("%s cso(%X) is greater than packet length-2(%X), checksum is not inserted\n", 3846 INSTANCE(pState), cso, u16PktLen));3845 pState->szPrf, cso, u16PktLen)); 3847 3846 return; 3848 3847 } … … 3851 3850 cse = u16PktLen - 1; 3852 3851 uint16_t u16ChkSum = e1kCSum16(pPkt + css, cse - css + 1); 3853 E1kLog2(("%s Inserting csum: %04X at %02X, old value: %04X\n", INSTANCE(pState),3852 E1kLog2(("%s Inserting csum: %04X at %02X, old value: %04X\n", pState->szPrf, 3854 3853 u16ChkSum, cso, *(uint16_t*)(pPkt + cso))); 3855 3854 *(uint16_t*)(pPkt + cso) = u16ChkSum; … … 3881 3880 3882 3881 E1kLog3(("%s e1kFallbackAddSegment: Length=%x, remaining payload=%x, header=%x, send=%RTbool\n", 3883 INSTANCE(pState), u16Len, pState->u32PayRemain, pState->u16HdrRemain, fSend));3882 pState->szPrf, u16Len, pState->u32PayRemain, pState->u16HdrRemain, fSend)); 3884 3883 Assert(pState->u32PayRemain + pState->u16HdrRemain > 0); 3885 3884 … … 3889 3888 "%.*Rhxd\n" 3890 3889 "%s --- End of dump ---\n", 3891 INSTANCE(pState), u16Len, pState->aTxPacketFallback + pState->u16TxPktLen, INSTANCE(pState)));3890 pState->szPrf, u16Len, pState->aTxPacketFallback + pState->u16TxPktLen, pState->szPrf)); 3892 3891 pState->u16TxPktLen += u16Len; 3893 3892 E1kLog3(("%s e1kFallbackAddSegment: pState->u16TxPktLen=%x\n", 3894 INSTANCE(pState), pState->u16TxPktLen));3893 pState->szPrf, pState->u16TxPktLen)); 3895 3894 if (pState->u16HdrRemain > 0) 3896 3895 { … … 3912 3911 pState->u16HdrRemain -= u16Len; 3913 3912 E1kLog3(("%s e1kFallbackAddSegment: Header is still incomplete, 0x%x bytes remain.\n", 3914 INSTANCE(pState), pState->u16HdrRemain));3913 pState->szPrf, pState->u16HdrRemain)); 3915 3914 return; 3916 3915 } … … 3925 3924 pIpHdr->total_len = htons(pState->u16TxPktLen - pState->contextTSE.ip.u8CSS); 3926 3925 E1kLog3(("%s e1kFallbackAddSegment: End of packet, pIpHdr->total_len=%x\n", 3927 INSTANCE(pState), ntohs(pIpHdr->total_len)));3926 pState->szPrf, ntohs(pIpHdr->total_len))); 3928 3927 /* Update IP Checksum */ 3929 3928 pIpHdr->chksum = 0; … … 3988 3987 3989 3988 E1kLog3(("%s e1kFallbackAddSegment: Length=%x, remaining payload=%x, header=%x, send=%RTbool\n", 3990 INSTANCE(pState), u16Len, pState->u32PayRemain, pState->u16HdrRemain, fSend));3989 pState->szPrf, u16Len, pState->u32PayRemain, pState->u16HdrRemain, fSend)); 3991 3990 Assert(pState->u32PayRemain + pState->u16HdrRemain > 0); 3992 3991 … … 3996 3995 "%.*Rhxd\n" 3997 3996 "%s --- End of dump ---\n", 3998 INSTANCE(pState), u16Len, pState->aTxPacketFallback + pState->u16TxPktLen, INSTANCE(pState)));3997 pState->szPrf, u16Len, pState->aTxPacketFallback + pState->u16TxPktLen, pState->szPrf)); 3999 3998 pState->u16TxPktLen += u16Len; 4000 3999 E1kLog3(("%s e1kFallbackAddSegment: pState->u16TxPktLen=%x\n", 4001 INSTANCE(pState), pState->u16TxPktLen));4000 pState->szPrf, pState->u16TxPktLen)); 4002 4001 if (pState->u16HdrRemain > 0) 4003 4002 { … … 4019 4018 pState->u16HdrRemain -= u16Len; 4020 4019 E1kLog3(("%s e1kFallbackAddSegment: Header is still incomplete, 0x%x bytes remain.\n", 4021 INSTANCE(pState), pState->u16HdrRemain));4020 pState->szPrf, pState->u16HdrRemain)); 4022 4021 return rc; 4023 4022 } … … 4032 4031 pIpHdr->total_len = htons(pState->u16TxPktLen - pState->contextTSE.ip.u8CSS); 4033 4032 E1kLog3(("%s e1kFallbackAddSegment: End of packet, pIpHdr->total_len=%x\n", 4034 INSTANCE(pState), ntohs(pIpHdr->total_len)));4033 pState->szPrf, ntohs(pIpHdr->total_len))); 4035 4034 /* Update IP Checksum */ 4036 4035 pIpHdr->chksum = 0; … … 4249 4248 if (RT_UNLIKELY( !fGso && cbNewPkt > E1K_MAX_TX_PKT_SIZE )) 4250 4249 { 4251 E1kLog(("%s Transmit packet is too large: %u > %u(max)\n", INSTANCE(pThis), cbNewPkt, E1K_MAX_TX_PKT_SIZE));4250 E1kLog(("%s Transmit packet is too large: %u > %u(max)\n", pThis->szPrf, cbNewPkt, E1K_MAX_TX_PKT_SIZE)); 4252 4251 return false; 4253 4252 } 4254 4253 if (RT_UNLIKELY( fGso && cbNewPkt > pTxSg->cbAvailable )) 4255 4254 { 4256 E1kLog(("%s Transmit packet is too large: %u > %u(max)/GSO\n", INSTANCE(pThis), cbNewPkt, pTxSg->cbAvailable));4255 E1kLog(("%s Transmit packet is too large: %u > %u(max)/GSO\n", pThis->szPrf, cbNewPkt, pTxSg->cbAvailable)); 4257 4256 return false; 4258 4257 } … … 4324 4323 /* If absolute timer delay is enabled and the timer is not running yet, arm it. */ 4325 4324 E1kLog2(("%s Checking if TAD timer is running\n", 4326 INSTANCE(pState)));4325 pState->szPrf)); 4327 4326 if (TADV != 0 && !TMTimerIsActive(pState->CTX_SUFF(pTADTimer))) 4328 4327 e1kArmTimer(pState, pState->CTX_SUFF(pTADTimer), TADV); … … 4332 4331 { 4333 4332 E1kLog2(("%s No IDE set, cancel TAD timer and raise interrupt\n", 4334 INSTANCE(pState)));4333 pState->szPrf)); 4335 4334 # ifndef E1K_NO_TAD 4336 4335 /* Cancel both timers if armed and fire immediately. */ … … 4394 4393 } 4395 4394 E1kLog2(("%s %s context updated: IP CSS=%02X, IP CSO=%02X, IP CSE=%04X" 4396 ", TU CSS=%02X, TU CSO=%02X, TU CSE=%04X\n", INSTANCE(pState),4395 ", TU CSS=%02X, TU CSO=%02X, TU CSE=%04X\n", pState->szPrf, 4397 4396 pDesc->context.dw2.fTSE ? "TSE" : "Normal", 4398 4397 pDesc->context.ip.u8CSS, … … 4410 4409 if (pDesc->data.cmd.u20DTALEN == 0 || pDesc->data.u64BufAddr == 0) 4411 4410 { 4412 E1kLog2(("% Empty data descriptor, skipped.\n", INSTANCE(pState)));4411 E1kLog2(("% Empty data descriptor, skipped.\n", pState->szPrf)); 4413 4412 /** @todo Same as legacy when !TSE. See below. */ 4414 4413 break; … … 4440 4439 pState->fIPcsum = pDesc->data.dw3.fIXSM; 4441 4440 pState->fTCPcsum = pDesc->data.dw3.fTXSM; 4442 E1kLog2(("%s Saving checksum flags:%s%s; \n", INSTANCE(pState),4441 E1kLog2(("%s Saving checksum flags:%s%s; \n", pState->szPrf, 4443 4442 pState->fIPcsum ? " IP" : "", 4444 4443 pState->fTCPcsum ? " TCP/UDP" : "")); … … 4454 4453 else 4455 4454 cbVTag = 4; 4456 E1kLog3(("%s About to allocate TX buffer: cbVTag=%u\n", INSTANCE(pState), cbVTag));4455 E1kLog3(("%s About to allocate TX buffer: cbVTag=%u\n", pState->szPrf, cbVTag)); 4457 4456 if (e1kCanDoGso(pState, &pState->GsoCtx, &pDesc->data, &pState->contextTSE)) 4458 4457 rc = e1kXmitAllocBuf(pState, pState->contextTSE.dw2.u20PAYLEN + pState->contextTSE.dw3.u8HDRLEN + cbVTag, … … 4498 4497 { 4499 4498 if (fRc) 4500 E1kLog(("%s bad GSO/TSE %p or %u < %u\n" , INSTANCE(pState),4499 E1kLog(("%s bad GSO/TSE %p or %u < %u\n" , pState->szPrf, 4501 4500 pState->CTX_SUFF(pTxSg), pState->CTX_SUFF(pTxSg) ? pState->CTX_SUFF(pTxSg)->cbUsed : 0, 4502 4501 pState->contextTSE.dw3.u8HDRLEN + pState->contextTSE.dw2.u20PAYLEN)); … … 4547 4546 if (pDesc->legacy.cmd.u16Length == 0 || pDesc->legacy.u64BufAddr == 0) 4548 4547 { 4549 E1kLog(("%s Empty legacy descriptor, skipped.\n", INSTANCE(pState)));4548 E1kLog(("%s Empty legacy descriptor, skipped.\n", pState->szPrf)); 4550 4549 /** @todo 3.3.3, Length/Buffer Address: RS set -> write DD when processing. */ 4551 4550 break; … … 4561 4560 else 4562 4561 cbVTag = 4; 4563 E1kLog3(("%s About to allocate TX buffer: cbVTag=%u\n", INSTANCE(pState), cbVTag));4562 E1kLog3(("%s About to allocate TX buffer: cbVTag=%u\n", pState->szPrf, cbVTag)); 4564 4563 /** @todo reset status bits? */ 4565 4564 rc = e1kXmitAllocBuf(pState, pDesc->legacy.cmd.u16Length + cbVTag, pDesc->legacy.cmd.fEOP, false /*fGso*/); … … 4602 4601 default: 4603 4602 E1kLog(("%s ERROR Unsupported transmit descriptor type: 0x%04x\n", 4604 INSTANCE(pState), e1kGetDescType(pDesc)));4603 pState->szPrf, e1kGetDescType(pDesc))); 4605 4604 break; 4606 4605 } … … 4653 4652 if (pDesc->data.cmd.u20DTALEN == 0 || pDesc->data.u64BufAddr == 0) 4654 4653 { 4655 E1kLog2(("% Empty data descriptor, skipped.\n", INSTANCE(pState)));4654 E1kLog2(("% Empty data descriptor, skipped.\n", pState->szPrf)); 4656 4655 } 4657 4656 else … … 4677 4676 { 4678 4677 if (fRc) 4679 E1kLog(("%s bad GSO/TSE %p or %u < %u\n" , INSTANCE(pState),4678 E1kLog(("%s bad GSO/TSE %p or %u < %u\n" , pState->szPrf, 4680 4679 pState->CTX_SUFF(pTxSg), pState->CTX_SUFF(pTxSg) ? pState->CTX_SUFF(pTxSg)->cbUsed : 0, 4681 4680 pState->contextTSE.dw3.u8HDRLEN + pState->contextTSE.dw2.u20PAYLEN)); … … 4728 4727 if (pDesc->legacy.cmd.u16Length == 0 || pDesc->legacy.u64BufAddr == 0) 4729 4728 { 4730 E1kLog(("%s Empty legacy descriptor, skipped.\n", INSTANCE(pState)));4729 E1kLog(("%s Empty legacy descriptor, skipped.\n", pState->szPrf)); 4731 4730 } 4732 4731 else … … 4766 4765 default: 4767 4766 E1kLog(("%s ERROR Unsupported transmit descriptor type: 0x%04x\n", 4768 INSTANCE(pState), e1kGetDescType(pDesc)));4767 pState->szPrf, e1kGetDescType(pDesc))); 4769 4768 break; 4770 4769 } … … 4790 4789 } 4791 4790 E1kLog2(("%s %s context updated: IP CSS=%02X, IP CSO=%02X, IP CSE=%04X" 4792 ", TU CSS=%02X, TU CSO=%02X, TU CSE=%04X\n", INSTANCE(pState),4791 ", TU CSS=%02X, TU CSO=%02X, TU CSE=%04X\n", pState->szPrf, 4793 4792 pDesc->context.dw2.fTSE ? "TSE" : "Normal", 4794 4793 pDesc->context.ip.u8CSS, … … 4804 4803 { 4805 4804 LogFlow(("%s e1kLocateTxPacket: ENTER cbTxAlloc=%d\n", 4806 INSTANCE(pState), pState->cbTxAlloc));4805 pState->szPrf, pState->cbTxAlloc)); 4807 4806 /* Check if we have located the packet already. */ 4808 4807 if (pState->cbTxAlloc) 4809 4808 { 4810 4809 LogFlow(("%s e1kLocateTxPacket: RET true cbTxAlloc=%d\n", 4811 INSTANCE(pState), pState->cbTxAlloc));4810 pState->szPrf, pState->cbTxAlloc)); 4812 4811 return true; 4813 4812 } … … 4881 4880 pState->cbTxAlloc += 4; 4882 4881 LogFlow(("%s e1kLocateTxPacket: RET true cbTxAlloc=%d\n", 4883 INSTANCE(pState), pState->cbTxAlloc));4882 pState->szPrf, pState->cbTxAlloc)); 4884 4883 return true; 4885 4884 } … … 4890 4889 /* All descriptors were empty, we need to process them as a dummy packet */ 4891 4890 LogFlow(("%s e1kLocateTxPacket: RET true cbTxAlloc=%d, zero packet!\n", 4892 INSTANCE(pState), pState->cbTxAlloc));4891 pState->szPrf, pState->cbTxAlloc)); 4893 4892 return true; 4894 4893 } 4895 4894 LogFlow(("%s e1kLocateTxPacket: RET false cbTxAlloc=%d\n", 4896 INSTANCE(pState), pState->cbTxAlloc));4895 pState->szPrf, pState->cbTxAlloc)); 4897 4896 return false; 4898 4897 } … … 4904 4903 4905 4904 LogFlow(("%s e1kXmitPacket: ENTER current=%d fetched=%d\n", 4906 INSTANCE(pState), pState->iTxDCurrent, pState->nTxDFetched));4905 pState->szPrf, pState->iTxDCurrent, pState->nTxDFetched)); 4907 4906 4908 4907 while (pState->iTxDCurrent < pState->nTxDFetched) … … 4910 4909 E1KTXDESC *pDesc = &pState->aTxDescriptors[pState->iTxDCurrent]; 4911 4910 E1kLog3(("%s About to process new TX descriptor at %08x%08x, TDLEN=%08x, TDH=%08x, TDT=%08x\n", 4912 INSTANCE(pState), TDBAH, TDBAL + TDH * sizeof(E1KTXDESC), TDLEN, TDH, TDT));4911 pState->szPrf, TDBAH, TDBAL + TDH * sizeof(E1KTXDESC), TDLEN, TDH, TDT)); 4913 4912 rc = e1kXmitDesc(pState, pDesc, e1kDescAddr(TDBAH, TDBAL, TDH), fOnWorkerThread); 4914 4913 if (RT_FAILURE(rc)) … … 4920 4919 { 4921 4920 E1kLog2(("%s Low on transmit descriptors, raise ICR.TXD_LOW, len=%x thresh=%x\n", 4922 INSTANCE(pState), e1kGetTxLen(pState), GET_BITS(TXDCTL, LWTHRESH)*8));4921 pState->szPrf, e1kGetTxLen(pState), GET_BITS(TXDCTL, LWTHRESH)*8)); 4923 4922 e1kRaiseInterrupt(pState, VERR_SEM_BUSY, ICR_TXD_LOW); 4924 4923 } … … 4929 4928 4930 4929 LogFlow(("%s e1kXmitPacket: RET %Rrc current=%d fetched=%d\n", 4931 INSTANCE(pState), rc, pState->iTxDCurrent, pState->nTxDFetched));4930 pState->szPrf, rc, pState->iTxDCurrent, pState->nTxDFetched)); 4932 4931 return rc; 4933 4932 } … … 4974 4973 E1KTXDESC desc; 4975 4974 E1kLog3(("%s About to process new TX descriptor at %08x%08x, TDLEN=%08x, TDH=%08x, TDT=%08x\n", 4976 INSTANCE(pState), TDBAH, TDBAL + TDH * sizeof(desc), TDLEN, TDH, TDT));4975 pState->szPrf, TDBAH, TDBAL + TDH * sizeof(desc), TDLEN, TDH, TDT)); 4977 4976 4978 4977 e1kLoadDesc(pState, &desc, ((uint64_t)TDBAH << 32) + TDBAL + TDH * sizeof(desc)); … … 4987 4986 { 4988 4987 E1kLog2(("%s Low on transmit descriptors, raise ICR.TXD_LOW, len=%x thresh=%x\n", 4989 INSTANCE(pState), e1kGetTxLen(pState), GET_BITS(TXDCTL, LWTHRESH)*8));4988 pState->szPrf, e1kGetTxLen(pState), GET_BITS(TXDCTL, LWTHRESH)*8)); 4990 4989 e1kRaiseInterrupt(pState, VERR_SEM_BUSY, ICR_TXD_LOW); 4991 4990 } … … 5103 5102 LogRel(("%s No complete packets in%s TxD cache! " 5104 5103 "Fetched=%d, current=%d, TX len=%d.\n", 5105 INSTANCE(pState),5104 pState->szPrf, 5106 5105 u8Remain == E1K_TXD_CACHE_SIZE ? " full" : "", 5107 5106 pState->nTxDFetched, pState->iTxDCurrent, … … 5128 5127 Log4(("%s Incomplete packet at %d. Already fetched %d, " 5129 5128 "%d more are available\n", 5130 INSTANCE(pState), pState->iTxDCurrent, u8Remain,5129 pState->szPrf, pState->iTxDCurrent, u8Remain, 5131 5130 e1kGetTxLen(pState) - u8Remain)); 5132 5131 … … 5150 5149 { 5151 5150 E1kLog2(("%s Out of transmit descriptors, raise ICR.TXD_LOW\n", 5152 INSTANCE(pState)));5151 pState->szPrf)); 5153 5152 e1kRaiseInterrupt(pState, VERR_SEM_BUSY, ICR_TXD_LOW); 5154 5153 } … … 5198 5197 NOREF(pItem); 5199 5198 E1KSTATE *pState = PDMINS_2_DATA(pDevIns, E1KSTATE *); 5200 E1kLog2(("%s e1kTxQueueConsumer:\n", INSTANCE(pState)));5199 E1kLog2(("%s e1kTxQueueConsumer:\n", pState->szPrf)); 5201 5200 5202 5201 int rc = e1kXmitPending(pState, false /*fOnWorkerThread*/); … … 5234 5233 /* Process them. */ 5235 5234 E1kLog2(("%s e1kRegWriteTDT: TDBAL=%08x, TDBAH=%08x, TDLEN=%08x, TDH=%08x, TDT=%08x\n", 5236 INSTANCE(pState), TDBAL, TDBAH, TDLEN, TDH, TDT));5235 pState->szPrf, TDBAL, TDBAH, TDLEN, TDH, TDT)); 5237 5236 5238 5237 /* Ignore TDT writes when the link is down. */ … … 5241 5240 E1kLogRel(("E1000: TDT write: %d descriptors to process\n", e1kGetTxLen(pState))); 5242 5241 E1kLog(("%s e1kRegWriteTDT: %d descriptors to process\n", 5243 INSTANCE(pState), e1kGetTxLen(pState)));5242 pState->szPrf, e1kGetTxLen(pState))); 5244 5243 5245 5244 /* Transmit pending packets if possible, defer it if we cannot do it … … 5405 5404 { 5406 5405 E1kLog(("%s At %08X read (00000000) attempt from unimplemented register %s (%s)\n", 5407 INSTANCE(pState), offset, s_e1kRegMap[index].abbrev, s_e1kRegMap[index].name));5406 pState->szPrf, offset, s_e1kRegMap[index].abbrev, s_e1kRegMap[index].name)); 5408 5407 *pu32Value = 0; 5409 5408 … … 5477 5476 { 5478 5477 E1kLog(("%s At %08X write attempt (%08X) to unimplemented register %s (%s)\n", 5479 INSTANCE(pState), offset, value, s_e1kRegMap[index].abbrev, s_e1kRegMap[index].name));5478 pState->szPrf, offset, value, s_e1kRegMap[index].abbrev, s_e1kRegMap[index].name)); 5480 5479 5481 5480 return VINF_SUCCESS; … … 5551 5550 int rc = VINF_SUCCESS; 5552 5551 int index = e1kRegLookup(pState, uOffset); 5553 const char *szInst = INSTANCE(pState);5552 const char *szInst = pState->szPrf; 5554 5553 #ifdef DEBUG 5555 5554 char buf[9]; … … 5651 5650 { 5652 5651 E1kLog(("%s e1kRegWrite: Spec violation: unsupported op size: offset=%#10x cb=%#10x, ignored.\n", 5653 INSTANCE(pState), offReg, cb));5652 pState->szPrf, offReg, cb)); 5654 5653 return VINF_SUCCESS; 5655 5654 } … … 5657 5656 { 5658 5657 E1kLog(("%s e1kRegWrite: Spec violation: misaligned offset: %#10x cb=%#10x, ignored.\n", 5659 INSTANCE(pState), offReg, cb));5658 pState->szPrf, offReg, cb)); 5660 5659 return VINF_SUCCESS; 5661 5660 } … … 5670 5669 */ 5671 5670 E1kLog2(("%s At %08X write %08X to %s (%s)\n", 5672 INSTANCE(pState), offReg, u32, s_e1kRegMap[index].abbrev, s_e1kRegMap[index].name));5671 pState->szPrf, offReg, u32, s_e1kRegMap[index].abbrev, s_e1kRegMap[index].name)); 5673 5672 //rc = e1kCsEnter(pState, VERR_SEM_BUSY, RT_SRC_POS); 5674 5673 if (RT_UNLIKELY(rc != VINF_SUCCESS)) … … 5683 5682 { 5684 5683 E1kLog(("%s At %08X write attempt (%08X) to read-only register %s (%s)\n", 5685 INSTANCE(pState), offReg, u32, s_e1kRegMap[index].abbrev, s_e1kRegMap[index].name));5684 pState->szPrf, offReg, u32, s_e1kRegMap[index].abbrev, s_e1kRegMap[index].name)); 5686 5685 } 5687 5686 } … … 5689 5688 { 5690 5689 E1kLog(("%s At %08X write attempt (%08X) to non-existing register\n", 5691 INSTANCE(pState), offReg, u32));5690 pState->szPrf, offReg, u32)); 5692 5691 } 5693 5692 return rc; … … 5772 5771 E1KSTATE *pState = PDMINS_2_DATA(pDevIns, E1KSTATE *); 5773 5772 int rc = VINF_SUCCESS; 5774 const char *szInst = INSTANCE(pState);5773 const char *szInst = pState->szPrf; 5775 5774 STAM_PROFILE_ADV_START(&pState->CTX_SUFF_Z(StatIORead), a); 5776 5775 … … 5822 5821 E1KSTATE *pState = PDMINS_2_DATA(pDevIns, E1KSTATE *); 5823 5822 int rc = VINF_SUCCESS; 5824 const char *szInst = INSTANCE(pState);5823 const char *szInst = pState->szPrf; 5825 5824 STAM_PROFILE_ADV_START(&pState->CTX_SUFF_Z(StatIOWrite), a); 5826 5825 … … 5871 5870 for (int i = 0; i < E1K_NUM_OF_32BIT_REGS; ++i) 5872 5871 { 5873 E1kLog2(("%s %8.8s = %08x\n", INSTANCE(pState),5872 E1kLog2(("%s %8.8s = %08x\n", pState->szPrf, 5874 5873 s_e1kRegMap[i].abbrev, pState->auRegs[i])); 5875 5874 } 5876 5875 # ifdef E1K_INT_STATS 5877 LogRel(("%s Interrupt attempts: %d\n", INSTANCE(pState), pState->uStatIntTry));5878 LogRel(("%s Interrupts raised : %d\n", INSTANCE(pState), pState->uStatInt));5879 LogRel(("%s Interrupts lowered: %d\n", INSTANCE(pState), pState->uStatIntLower));5880 LogRel(("%s Interrupts delayed: %d\n", INSTANCE(pState), pState->uStatIntDly));5881 LogRel(("%s Disabled delayed: %d\n", INSTANCE(pState), pState->uStatDisDly));5882 LogRel(("%s Interrupts skipped: %d\n", INSTANCE(pState), pState->uStatIntSkip));5883 LogRel(("%s Masked interrupts : %d\n", INSTANCE(pState), pState->uStatIntMasked));5884 LogRel(("%s Early interrupts : %d\n", INSTANCE(pState), pState->uStatIntEarly));5885 LogRel(("%s Late interrupts : %d\n", INSTANCE(pState), pState->uStatIntLate));5886 LogRel(("%s Lost interrupts : %d\n", INSTANCE(pState), pState->iStatIntLost));5887 LogRel(("%s Interrupts by RX : %d\n", INSTANCE(pState), pState->uStatIntRx));5888 LogRel(("%s Interrupts by TX : %d\n", INSTANCE(pState), pState->uStatIntTx));5889 LogRel(("%s Interrupts by ICS : %d\n", INSTANCE(pState), pState->uStatIntICS));5890 LogRel(("%s Interrupts by RDTR: %d\n", INSTANCE(pState), pState->uStatIntRDTR));5891 LogRel(("%s Interrupts by RDMT: %d\n", INSTANCE(pState), pState->uStatIntRXDMT0));5892 LogRel(("%s Interrupts by TXQE: %d\n", INSTANCE(pState), pState->uStatIntTXQE));5893 LogRel(("%s TX int delay asked: %d\n", INSTANCE(pState), pState->uStatTxIDE));5894 LogRel(("%s TX delayed: %d\n", INSTANCE(pState), pState->uStatTxDelayed));5895 LogRel(("%s TX delay expired: %d\n", INSTANCE(pState), pState->uStatTxDelayExp));5896 LogRel(("%s TX no report asked: %d\n", INSTANCE(pState), pState->uStatTxNoRS));5897 LogRel(("%s TX abs timer expd : %d\n", INSTANCE(pState), pState->uStatTAD));5898 LogRel(("%s TX int timer expd : %d\n", INSTANCE(pState), pState->uStatTID));5899 LogRel(("%s RX abs timer expd : %d\n", INSTANCE(pState), pState->uStatRAD));5900 LogRel(("%s RX int timer expd : %d\n", INSTANCE(pState), pState->uStatRID));5901 LogRel(("%s TX CTX descriptors: %d\n", INSTANCE(pState), pState->uStatDescCtx));5902 LogRel(("%s TX DAT descriptors: %d\n", INSTANCE(pState), pState->uStatDescDat));5903 LogRel(("%s TX LEG descriptors: %d\n", INSTANCE(pState), pState->uStatDescLeg));5904 LogRel(("%s Received frames : %d\n", INSTANCE(pState), pState->uStatRxFrm));5905 LogRel(("%s Transmitted frames: %d\n", INSTANCE(pState), pState->uStatTxFrm));5906 LogRel(("%s TX frames up to 1514: %d\n", INSTANCE(pState), pState->uStatTx1514));5907 LogRel(("%s TX frames up to 2962: %d\n", INSTANCE(pState), pState->uStatTx2962));5908 LogRel(("%s TX frames up to 4410: %d\n", INSTANCE(pState), pState->uStatTx4410));5909 LogRel(("%s TX frames up to 5858: %d\n", INSTANCE(pState), pState->uStatTx5858));5910 LogRel(("%s TX frames up to 7306: %d\n", INSTANCE(pState), pState->uStatTx7306));5911 LogRel(("%s TX frames up to 8754: %d\n", INSTANCE(pState), pState->uStatTx8754));5912 LogRel(("%s TX frames up to 16384: %d\n", INSTANCE(pState), pState->uStatTx16384));5913 LogRel(("%s TX frames up to 32768: %d\n", INSTANCE(pState), pState->uStatTx32768));5914 LogRel(("%s Larger TX frames : %d\n", INSTANCE(pState), pState->uStatTxLarge));5915 LogRel(("%s Max TX Delay : %lld\n", INSTANCE(pState), pState->uStatMaxTxDelay));5876 LogRel(("%s Interrupt attempts: %d\n", pState->szPrf, pState->uStatIntTry)); 5877 LogRel(("%s Interrupts raised : %d\n", pState->szPrf, pState->uStatInt)); 5878 LogRel(("%s Interrupts lowered: %d\n", pState->szPrf, pState->uStatIntLower)); 5879 LogRel(("%s Interrupts delayed: %d\n", pState->szPrf, pState->uStatIntDly)); 5880 LogRel(("%s Disabled delayed: %d\n", pState->szPrf, pState->uStatDisDly)); 5881 LogRel(("%s Interrupts skipped: %d\n", pState->szPrf, pState->uStatIntSkip)); 5882 LogRel(("%s Masked interrupts : %d\n", pState->szPrf, pState->uStatIntMasked)); 5883 LogRel(("%s Early interrupts : %d\n", pState->szPrf, pState->uStatIntEarly)); 5884 LogRel(("%s Late interrupts : %d\n", pState->szPrf, pState->uStatIntLate)); 5885 LogRel(("%s Lost interrupts : %d\n", pState->szPrf, pState->iStatIntLost)); 5886 LogRel(("%s Interrupts by RX : %d\n", pState->szPrf, pState->uStatIntRx)); 5887 LogRel(("%s Interrupts by TX : %d\n", pState->szPrf, pState->uStatIntTx)); 5888 LogRel(("%s Interrupts by ICS : %d\n", pState->szPrf, pState->uStatIntICS)); 5889 LogRel(("%s Interrupts by RDTR: %d\n", pState->szPrf, pState->uStatIntRDTR)); 5890 LogRel(("%s Interrupts by RDMT: %d\n", pState->szPrf, pState->uStatIntRXDMT0)); 5891 LogRel(("%s Interrupts by TXQE: %d\n", pState->szPrf, pState->uStatIntTXQE)); 5892 LogRel(("%s TX int delay asked: %d\n", pState->szPrf, pState->uStatTxIDE)); 5893 LogRel(("%s TX delayed: %d\n", pState->szPrf, pState->uStatTxDelayed)); 5894 LogRel(("%s TX delay expired: %d\n", pState->szPrf, pState->uStatTxDelayExp)); 5895 LogRel(("%s TX no report asked: %d\n", pState->szPrf, pState->uStatTxNoRS)); 5896 LogRel(("%s TX abs timer expd : %d\n", pState->szPrf, pState->uStatTAD)); 5897 LogRel(("%s TX int timer expd : %d\n", pState->szPrf, pState->uStatTID)); 5898 LogRel(("%s RX abs timer expd : %d\n", pState->szPrf, pState->uStatRAD)); 5899 LogRel(("%s RX int timer expd : %d\n", pState->szPrf, pState->uStatRID)); 5900 LogRel(("%s TX CTX descriptors: %d\n", pState->szPrf, pState->uStatDescCtx)); 5901 LogRel(("%s TX DAT descriptors: %d\n", pState->szPrf, pState->uStatDescDat)); 5902 LogRel(("%s TX LEG descriptors: %d\n", pState->szPrf, pState->uStatDescLeg)); 5903 LogRel(("%s Received frames : %d\n", pState->szPrf, pState->uStatRxFrm)); 5904 LogRel(("%s Transmitted frames: %d\n", pState->szPrf, pState->uStatTxFrm)); 5905 LogRel(("%s TX frames up to 1514: %d\n", pState->szPrf, pState->uStatTx1514)); 5906 LogRel(("%s TX frames up to 2962: %d\n", pState->szPrf, pState->uStatTx2962)); 5907 LogRel(("%s TX frames up to 4410: %d\n", pState->szPrf, pState->uStatTx4410)); 5908 LogRel(("%s TX frames up to 5858: %d\n", pState->szPrf, pState->uStatTx5858)); 5909 LogRel(("%s TX frames up to 7306: %d\n", pState->szPrf, pState->uStatTx7306)); 5910 LogRel(("%s TX frames up to 8754: %d\n", pState->szPrf, pState->uStatTx8754)); 5911 LogRel(("%s TX frames up to 16384: %d\n", pState->szPrf, pState->uStatTx16384)); 5912 LogRel(("%s TX frames up to 32768: %d\n", pState->szPrf, pState->uStatTx32768)); 5913 LogRel(("%s Larger TX frames : %d\n", pState->szPrf, pState->uStatTxLarge)); 5914 LogRel(("%s Max TX Delay : %lld\n", pState->szPrf, pState->uStatMaxTxDelay)); 5916 5915 # endif /* E1K_INT_STATS */ 5917 5916 } … … 6012 6011 } 6013 6012 E1kLog2(("%s e1kCanReceive: at exit RDH=%d RDT=%d RDLEN=%d u16RxBSize=%d cb=%lu\n", 6014 INSTANCE(pState), RDH, RDT, RDLEN, pState->u16RxBSize, cb));6013 pState->szPrf, RDH, RDT, RDLEN, pState->u16RxBSize, cb)); 6015 6014 6016 6015 e1kCsRxLeave(pState); … … 6036 6035 } 6037 6036 E1kLog2(("%s e1kCanReceive: at exit in_cache=%d RDH=%d RDT=%d RDLEN=%d" 6038 " u16RxBSize=%d rc=%Rrc\n", INSTANCE(pState),6037 " u16RxBSize=%d rc=%Rrc\n", pState->szPrf, 6039 6038 e1kRxDInCache(pState), RDH, RDT, RDLEN, pState->u16RxBSize, rc)); 6040 6039 … … 6071 6070 } 6072 6071 E1kLogRel(("E1000 e1kNetworkDown_WaitReceiveAvail: waiting cMillies=%u...\n", cMillies)); 6073 E1kLog(("%s e1kNetworkDown_WaitReceiveAvail: waiting cMillies=%u...\n", INSTANCE(pState), cMillies));6072 E1kLog(("%s e1kNetworkDown_WaitReceiveAvail: waiting cMillies=%u...\n", pState->szPrf, cMillies)); 6074 6073 RTSemEventWait(pState->hEventMoreRxDescAvail, cMillies); 6075 6074 } … … 6103 6102 //unsigned char *pAddr = (unsigned char*)pvBuf + sizeof(ra->addr)*(ra->ctl & RA_CTL_AS); 6104 6103 //E1kLog3(("%s Matching %02x:%02x:%02x:%02x:%02x:%02x against %02x:%02x:%02x:%02x:%02x:%02x...\n", 6105 // INSTANCE(pState), pAddr[0], pAddr[1], pAddr[2], pAddr[3], pAddr[4], pAddr[5],6104 // pState->szPrf, pAddr[0], pAddr[1], pAddr[2], pAddr[3], pAddr[4], pAddr[5], 6106 6105 // ra->addr[0], ra->addr[1], ra->addr[2], ra->addr[3], ra->addr[4], ra->addr[5])); 6107 6106 /* … … 6179 6178 { 6180 6179 E1kLog(("%s ERROR: Incoming packet is too big, cb=%d > max=%d\n", 6181 INSTANCE(pState), cb, E1K_MAX_RX_PKT_SIZE));6180 pState->szPrf, cb, E1K_MAX_RX_PKT_SIZE)); 6182 6181 E1K_INC_CNT32(ROC); 6183 6182 return false; … … 6187 6186 /* When long packet reception is disabled packets over 1522 are discarded */ 6188 6187 E1kLog(("%s Discarding incoming packet (LPE=0), cb=%d\n", 6189 INSTANCE(pState), cb));6188 pState->szPrf, cb)); 6190 6189 E1K_INC_CNT32(ROC); 6191 6190 return false; … … 6203 6202 if (RCTL & RCTL_CFIEN) 6204 6203 { 6205 E1kLog3(("%s VLAN filter: VLAN=%d CFI=%d RCTL_CFI=%d\n", INSTANCE(pState),6204 E1kLog3(("%s VLAN filter: VLAN=%d CFI=%d RCTL_CFI=%d\n", pState->szPrf, 6206 6205 E1K_SPEC_VLAN(RT_BE2H_U16(u16Ptr[7])), 6207 6206 E1K_SPEC_CFI(RT_BE2H_U16(u16Ptr[7])), … … 6210 6209 { 6211 6210 E1kLog2(("%s Packet filter: CFIs do not match in packet and RCTL (%d!=%d)\n", 6212 INSTANCE(pState), E1K_SPEC_CFI(RT_BE2H_U16(u16Ptr[7])), !!(RCTL & RCTL_CFI)));6211 pState->szPrf, E1K_SPEC_CFI(RT_BE2H_U16(u16Ptr[7])), !!(RCTL & RCTL_CFI))); 6213 6212 return false; 6214 6213 } 6215 6214 } 6216 6215 else 6217 E1kLog3(("%s VLAN filter: VLAN=%d\n", INSTANCE(pState),6216 E1kLog3(("%s VLAN filter: VLAN=%d\n", pState->szPrf, 6218 6217 E1K_SPEC_VLAN(RT_BE2H_U16(u16Ptr[7])))); 6219 6218 if (!ASMBitTest(pState->auVFTA, E1K_SPEC_VLAN(RT_BE2H_U16(u16Ptr[7])))) 6220 6219 { 6221 6220 E1kLog2(("%s Packet filter: no VLAN match (id=%d)\n", 6222 INSTANCE(pState), E1K_SPEC_VLAN(RT_BE2H_U16(u16Ptr[7]))));6221 pState->szPrf, E1K_SPEC_VLAN(RT_BE2H_U16(u16Ptr[7])))); 6223 6222 return false; 6224 6223 } … … 6228 6227 if (e1kIsBroadcast(pvBuf) && (RCTL & RCTL_BAM)) 6229 6228 return true; 6230 E1kLog2(("%s Packet filter: not a broadcast\n", INSTANCE(pState)));6229 E1kLog2(("%s Packet filter: not a broadcast\n", pState->szPrf)); 6231 6230 if (e1kIsMulticast(pvBuf)) 6232 6231 { … … 6234 6233 if (RCTL & RCTL_MPE) 6235 6234 return true; 6236 E1kLog2(("%s Packet filter: no promiscuous multicast\n", INSTANCE(pState)));6235 E1kLog2(("%s Packet filter: no promiscuous multicast\n", pState->szPrf)); 6237 6236 /* Try perfect matches first */ 6238 6237 if (e1kPerfectMatch(pState, pvBuf)) … … 6241 6240 return true; 6242 6241 } 6243 E1kLog2(("%s Packet filter: no perfect match\n", INSTANCE(pState)));6242 E1kLog2(("%s Packet filter: no perfect match\n", pState->szPrf)); 6244 6243 if (e1kImperfectMatch(pState, pvBuf)) 6245 6244 return true; 6246 E1kLog2(("%s Packet filter: no imperfect match\n", INSTANCE(pState)));6245 E1kLog2(("%s Packet filter: no imperfect match\n", pState->szPrf)); 6247 6246 } 6248 6247 else { … … 6250 6249 if (RCTL & RCTL_UPE) 6251 6250 return true; 6252 E1kLog2(("%s Packet filter: no promiscuous unicast\n", INSTANCE(pState)));6251 E1kLog2(("%s Packet filter: no promiscuous unicast\n", pState->szPrf)); 6253 6252 if (e1kPerfectMatch(pState, pvBuf)) 6254 6253 { … … 6256 6255 return true; 6257 6256 } 6258 E1kLog2(("%s Packet filter: no perfect match\n", INSTANCE(pState)));6259 } 6260 E1kLog2(("%s Packet filter: packet discarded\n", INSTANCE(pState)));6257 E1kLog2(("%s Packet filter: no perfect match\n", pState->szPrf)); 6258 } 6259 E1kLog2(("%s Packet filter: packet discarded\n", pState->szPrf)); 6261 6260 return false; 6262 6261 } … … 6277 6276 && enmVMState != VMSTATE_RUNNING_LS) 6278 6277 { 6279 E1kLog(("%s Dropping incoming packet as VM is not running.\n", INSTANCE(pState)));6278 E1kLog(("%s Dropping incoming packet as VM is not running.\n", pState->szPrf)); 6280 6279 return VINF_SUCCESS; 6281 6280 } … … 6284 6283 if (!(RCTL & RCTL_EN) || pState->fLocked || !(STATUS & STATUS_LU)) 6285 6284 { 6286 E1kLog(("%s Dropping incoming packet as receive operation is disabled.\n", INSTANCE(pState)));6285 E1kLog(("%s Dropping incoming packet as receive operation is disabled.\n", pState->szPrf)); 6287 6286 return VINF_SUCCESS; 6288 6287 } … … 6376 6375 { 6377 6376 E1kLog(("%s Link will be up in approximately %d secs\n", 6378 INSTANCE(pState), pState->cMsLinkUpDelay / 1000));6377 pState->szPrf, pState->cMsLinkUpDelay / 1000)); 6379 6378 pState->fCableConnected = true; 6380 6379 STATUS &= ~STATUS_LU; … … 6386 6385 else 6387 6386 { 6388 E1kLog(("%s Link is down\n", INSTANCE(pState)));6387 E1kLog(("%s Link is down\n", pState->szPrf)); 6389 6388 pState->fCableConnected = false; 6390 6389 STATUS &= ~STATUS_LU; … … 6472 6471 e1kCancelTimer(pState, pState->CTX_SUFF(pIntTimer)); 6473 6472 /* 3) Did I forget anything? */ 6474 E1kLog(("%s Locked\n", INSTANCE(pState)));6473 E1kLog(("%s Locked\n", pState->szPrf)); 6475 6474 return VINF_SUCCESS; 6476 6475 #endif … … 6523 6522 #endif /* E1K_WITH_TXD_CACHE */ 6524 6523 /**@todo GSO requires some more state here. */ 6525 E1kLog(("%s State has been saved\n", INSTANCE(pState)));6524 E1kLog(("%s State has been saved\n", pState->szPrf)); 6526 6525 return VINF_SUCCESS; 6527 6526 } … … 6539 6538 pState->fLocked = false; 6540 6539 else 6541 E1kLog(("%s VM is not running -- remain locked\n", INSTANCE(pState)));6542 E1kLog(("%s Unlocked\n", INSTANCE(pState)));6540 E1kLog(("%s VM is not running -- remain locked\n", pState->szPrf)); 6541 E1kLog(("%s Unlocked\n", pState->szPrf)); 6543 6542 return VINF_SUCCESS; 6544 6543 } … … 6584 6583 if ( memcmp(&macConfigured, &pState->macConfigured, sizeof(macConfigured)) 6585 6584 && (uPass == 0 || !PDMDevHlpVMTeleportedAndNotFullyResumedYet(pDevIns)) ) 6586 LogRel(("%s: The mac address differs: config=%RTmac saved=%RTmac\n", INSTANCE(pState), &pState->macConfigured, &macConfigured));6585 LogRel(("%s: The mac address differs: config=%RTmac saved=%RTmac\n", pState->szPrf, &pState->macConfigured, &macConfigured)); 6587 6586 6588 6587 E1KCHIP eChip; … … 6657 6656 e1kSetupGsoCtx(&pState->GsoCtx, &pState->contextTSE); 6658 6657 6659 E1kLog(("%s State has been restored\n", INSTANCE(pState)));6658 E1kLog(("%s State has been restored\n", pState->szPrf)); 6660 6659 e1kDumpState(pState); 6661 6660 } … … 6684 6683 && pState->cMsLinkUpDelay) 6685 6684 { 6686 E1kLog(("%s Link is down temporarily\n", INSTANCE(pState)));6685 E1kLog(("%s Link is down temporarily\n", pState->szPrf)); 6687 6686 STATUS &= ~STATUS_LU; 6688 6687 Phy::setLinkStatus(&pState->phy, false); … … 7004 7003 { 7005 7004 E1KSTATE *pState = PDMINS_2_DATA(pDevIns, E1KSTATE*); 7006 Log(("%s e1kR3Detach:\n", INSTANCE(pState)));7005 Log(("%s e1kR3Detach:\n", pState->szPrf)); 7007 7006 7008 7007 AssertLogRelReturnVoid(iLUN == 0); … … 7040 7039 { 7041 7040 E1KSTATE *pState = PDMINS_2_DATA(pDevIns, E1KSTATE*); 7042 LogFlow(("%s e1kR3Attach:\n", INSTANCE(pState)));7041 LogFlow(("%s e1kR3Attach:\n", pState->szPrf)); 7043 7042 7044 7043 AssertLogRelReturn(iLUN == 0, VERR_PDM_NO_SUCH_LUN); … … 7079 7078 /* This should never happen because this function is not called 7080 7079 * if there is no driver to attach! */ 7081 Log(("%s No attached driver!\n", INSTANCE(pState)));7080 Log(("%s No attached driver!\n", pState->szPrf)); 7082 7081 } 7083 7082 … … 7195 7194 7196 7195 e1kDumpState(pState); 7197 E1kLog(("%s Destroying instance\n", INSTANCE(pState)));7196 E1kLog(("%s Destroying instance\n", pState->szPrf)); 7198 7197 if (PDMCritSectIsInitialized(&pState->cs)) 7199 7198 { … … 7300 7299 * Note! Caller has initialized it to ZERO already. 7301 7300 */ 7302 RTStrPrintf(pThis->sz Instance, sizeof(pThis->szInstance), "E1000#%d", iInstance);7303 E1kLog(("%s Constructing new instance sizeof(E1KRXDESC)=%d\n", INSTANCE(pThis), sizeof(E1KRXDESC)));7301 RTStrPrintf(pThis->szPrf, sizeof(pThis->szPrf), "E1000#%d", iInstance); 7302 E1kLog(("%s Constructing new instance sizeof(E1KRXDESC)=%d\n", pThis->szPrf, sizeof(E1KRXDESC))); 7304 7303 pThis->hEventMoreRxDescAvail = NIL_RTSEMEVENT; 7305 7304 pThis->pDevInsR3 = pDevIns; … … 7386 7385 Assert(pThis->cMsLinkUpDelay <= 300000); /* less than 5 minutes */ 7387 7386 if (pThis->cMsLinkUpDelay > 5000) 7388 LogRel(("%s WARNING! Link up delay is set to %u seconds!\n", INSTANCE(pThis), pThis->cMsLinkUpDelay / 1000));7387 LogRel(("%s WARNING! Link up delay is set to %u seconds!\n", pThis->szPrf, pThis->cMsLinkUpDelay / 1000)); 7389 7388 else if (pThis->cMsLinkUpDelay == 0) 7390 LogRel(("%s WARNING! Link up delay is disabled!\n", INSTANCE(pThis)));7391 7392 E1kLog(("%s Chip=%s LinkUpDelay=%ums EthernetCRC=%s GSO=%s\n", INSTANCE(pThis),7389 LogRel(("%s WARNING! Link up delay is disabled!\n", pThis->szPrf)); 7390 7391 E1kLog(("%s Chip=%s LinkUpDelay=%ums EthernetCRC=%s GSO=%s\n", pThis->szPrf, 7393 7392 g_Chips[pThis->eChip].pcszName, pThis->cMsLinkUpDelay, 7394 7393 pThis->fEthernetCRC ? "on" : "off", … … 7406 7405 AssertRCReturn(rc, rc); 7407 7406 7408 rc = PDMDevHlpCritSectInit(pDevIns, &pThis->cs, RT_SRC_POS, " %s", pThis->szInstance);7407 rc = PDMDevHlpCritSectInit(pDevIns, &pThis->cs, RT_SRC_POS, "E1000#%d", iInstance); 7409 7408 if (RT_FAILURE(rc)) 7410 7409 return rc; 7411 rc = PDMDevHlpCritSectInit(pDevIns, &pThis->csRx, RT_SRC_POS, " %sRX", pThis->szInstance);7410 rc = PDMDevHlpCritSectInit(pDevIns, &pThis->csRx, RT_SRC_POS, "E1000#%dRX", iInstance); 7412 7411 if (RT_FAILURE(rc)) 7413 7412 return rc; 7414 7413 #ifdef E1K_WITH_TX_CS 7415 rc = PDMDevHlpCritSectInit(pDevIns, &pThis->csTx, RT_SRC_POS, " %sTX", pThis->szInstance);7414 rc = PDMDevHlpCritSectInit(pDevIns, &pThis->csTx, RT_SRC_POS, "E1000#%dTX", iInstance); 7416 7415 if (RT_FAILURE(rc)) 7417 7416 return rc; … … 7571 7570 { 7572 7571 /* No error! */ 7573 E1kLog(("%s This adapter is not attached to any network!\n", INSTANCE(pThis)));7572 E1kLog(("%s This adapter is not attached to any network!\n", pThis->szPrf)); 7574 7573 } 7575 7574 else
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